oxygen.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * C-Media CMI8788 driver for C-Media's reference design and similar models
  4. *
  5. * Copyright (c) Clemens Ladisch <[email protected]>
  6. */
  7. /*
  8. * CMI8788:
  9. *
  10. * SPI 0 -> 1st AK4396 (front)
  11. * SPI 1 -> 2nd AK4396 (surround)
  12. * SPI 2 -> 3rd AK4396 (center/LFE)
  13. * SPI 3 -> WM8785
  14. * SPI 4 -> 4th AK4396 (back)
  15. *
  16. * GPIO 0 -> DFS0 of AK5385
  17. * GPIO 1 -> DFS1 of AK5385
  18. *
  19. * X-Meridian models:
  20. * GPIO 4 -> enable extension S/PDIF input
  21. * GPIO 6 -> enable on-board S/PDIF input
  22. *
  23. * Claro models:
  24. * GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
  25. * GPIO 8 -> enable headphone amplifier
  26. *
  27. * CM9780:
  28. *
  29. * LINE_OUT -> input of ADC
  30. *
  31. * AUX_IN <- aux
  32. * CD_IN <- CD
  33. * MIC_IN <- mic
  34. *
  35. * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
  36. */
  37. #include <linux/delay.h>
  38. #include <linux/mutex.h>
  39. #include <linux/pci.h>
  40. #include <linux/module.h>
  41. #include <sound/ac97_codec.h>
  42. #include <sound/control.h>
  43. #include <sound/core.h>
  44. #include <sound/info.h>
  45. #include <sound/initval.h>
  46. #include <sound/pcm.h>
  47. #include <sound/pcm_params.h>
  48. #include <sound/tlv.h>
  49. #include "oxygen.h"
  50. #include "xonar_dg.h"
  51. #include "ak4396.h"
  52. #include "wm8785.h"
  53. MODULE_AUTHOR("Clemens Ladisch <[email protected]>");
  54. MODULE_DESCRIPTION("C-Media CMI8788 driver");
  55. MODULE_LICENSE("GPL v2");
  56. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  57. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  58. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  59. module_param_array(index, int, NULL, 0444);
  60. MODULE_PARM_DESC(index, "card index");
  61. module_param_array(id, charp, NULL, 0444);
  62. MODULE_PARM_DESC(id, "ID string");
  63. module_param_array(enable, bool, NULL, 0444);
  64. MODULE_PARM_DESC(enable, "enable card");
  65. enum {
  66. MODEL_CMEDIA_REF,
  67. MODEL_MERIDIAN,
  68. MODEL_MERIDIAN_2G,
  69. MODEL_CLARO,
  70. MODEL_CLARO_HALO,
  71. MODEL_FANTASIA,
  72. MODEL_SERENADE,
  73. MODEL_2CH_OUTPUT,
  74. MODEL_HG2PCI,
  75. MODEL_XONAR_DG,
  76. MODEL_XONAR_DGX,
  77. };
  78. static const struct pci_device_id oxygen_ids[] = {
  79. /* C-Media's reference design */
  80. { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
  81. { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
  82. { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
  83. { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
  84. { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
  85. { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
  86. { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
  87. { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
  88. { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
  89. /* Asus Xonar DG */
  90. { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
  91. /* Asus Xonar DGX */
  92. { OXYGEN_PCI_SUBID(0x1043, 0x8521), .driver_data = MODEL_XONAR_DGX },
  93. /* PCI 2.0 HD Audio */
  94. { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
  95. /* Kuroutoshikou CMI8787-HG2PCI */
  96. { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
  97. /* TempoTec HiFier Fantasia */
  98. { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
  99. /* TempoTec HiFier Serenade */
  100. { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
  101. /* AuzenTech X-Meridian */
  102. { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
  103. /* AuzenTech X-Meridian 2G */
  104. { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
  105. /* HT-Omega Claro */
  106. { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
  107. /* HT-Omega Claro halo */
  108. { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
  109. { }
  110. };
  111. MODULE_DEVICE_TABLE(pci, oxygen_ids);
  112. #define GPIO_AK5385_DFS_MASK 0x0003
  113. #define GPIO_AK5385_DFS_NORMAL 0x0000
  114. #define GPIO_AK5385_DFS_DOUBLE 0x0001
  115. #define GPIO_AK5385_DFS_QUAD 0x0002
  116. #define GPIO_MERIDIAN_DIG_MASK 0x0050
  117. #define GPIO_MERIDIAN_DIG_EXT 0x0010
  118. #define GPIO_MERIDIAN_DIG_BOARD 0x0040
  119. #define GPIO_CLARO_DIG_COAX 0x0040
  120. #define GPIO_CLARO_HP 0x0100
  121. struct generic_data {
  122. unsigned int dacs;
  123. u8 ak4396_regs[4][5];
  124. u16 wm8785_regs[3];
  125. };
  126. static void ak4396_write(struct oxygen *chip, unsigned int codec,
  127. u8 reg, u8 value)
  128. {
  129. /* maps ALSA channel pair number to SPI output */
  130. static const u8 codec_spi_map[4] = {
  131. 0, 1, 2, 4
  132. };
  133. struct generic_data *data = chip->model_data;
  134. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  135. OXYGEN_SPI_DATA_LENGTH_2 |
  136. OXYGEN_SPI_CLOCK_160 |
  137. (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  138. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  139. AK4396_WRITE | (reg << 8) | value);
  140. data->ak4396_regs[codec][reg] = value;
  141. }
  142. static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
  143. u8 reg, u8 value)
  144. {
  145. struct generic_data *data = chip->model_data;
  146. if (value != data->ak4396_regs[codec][reg])
  147. ak4396_write(chip, codec, reg, value);
  148. }
  149. static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
  150. {
  151. struct generic_data *data = chip->model_data;
  152. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  153. OXYGEN_SPI_DATA_LENGTH_2 |
  154. OXYGEN_SPI_CLOCK_160 |
  155. (3 << OXYGEN_SPI_CODEC_SHIFT) |
  156. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  157. (reg << 9) | value);
  158. if (reg < ARRAY_SIZE(data->wm8785_regs))
  159. data->wm8785_regs[reg] = value;
  160. }
  161. static void ak4396_registers_init(struct oxygen *chip)
  162. {
  163. struct generic_data *data = chip->model_data;
  164. unsigned int i;
  165. for (i = 0; i < data->dacs; ++i) {
  166. ak4396_write(chip, i, AK4396_CONTROL_1,
  167. AK4396_DIF_24_MSB | AK4396_RSTN);
  168. ak4396_write(chip, i, AK4396_CONTROL_2,
  169. data->ak4396_regs[0][AK4396_CONTROL_2]);
  170. ak4396_write(chip, i, AK4396_CONTROL_3,
  171. AK4396_PCM);
  172. ak4396_write(chip, i, AK4396_LCH_ATT,
  173. chip->dac_volume[i * 2]);
  174. ak4396_write(chip, i, AK4396_RCH_ATT,
  175. chip->dac_volume[i * 2 + 1]);
  176. }
  177. }
  178. static void ak4396_init(struct oxygen *chip)
  179. {
  180. struct generic_data *data = chip->model_data;
  181. data->dacs = chip->model.dac_channels_pcm / 2;
  182. data->ak4396_regs[0][AK4396_CONTROL_2] =
  183. AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
  184. ak4396_registers_init(chip);
  185. snd_component_add(chip->card, "AK4396");
  186. }
  187. static void ak5385_init(struct oxygen *chip)
  188. {
  189. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
  190. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
  191. snd_component_add(chip->card, "AK5385");
  192. }
  193. static void wm8785_registers_init(struct oxygen *chip)
  194. {
  195. struct generic_data *data = chip->model_data;
  196. wm8785_write(chip, WM8785_R7, 0);
  197. wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
  198. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  199. }
  200. static void wm8785_init(struct oxygen *chip)
  201. {
  202. struct generic_data *data = chip->model_data;
  203. data->wm8785_regs[0] =
  204. WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
  205. data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
  206. wm8785_registers_init(chip);
  207. snd_component_add(chip->card, "WM8785");
  208. }
  209. static void generic_init(struct oxygen *chip)
  210. {
  211. ak4396_init(chip);
  212. wm8785_init(chip);
  213. }
  214. static void meridian_init(struct oxygen *chip)
  215. {
  216. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  217. GPIO_MERIDIAN_DIG_MASK);
  218. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  219. GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
  220. ak4396_init(chip);
  221. ak5385_init(chip);
  222. }
  223. static void claro_enable_hp(struct oxygen *chip)
  224. {
  225. msleep(300);
  226. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
  227. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  228. }
  229. static void claro_init(struct oxygen *chip)
  230. {
  231. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  232. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  233. ak4396_init(chip);
  234. wm8785_init(chip);
  235. claro_enable_hp(chip);
  236. }
  237. static void claro_halo_init(struct oxygen *chip)
  238. {
  239. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  240. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  241. ak4396_init(chip);
  242. ak5385_init(chip);
  243. claro_enable_hp(chip);
  244. }
  245. static void fantasia_init(struct oxygen *chip)
  246. {
  247. ak4396_init(chip);
  248. snd_component_add(chip->card, "CS5340");
  249. }
  250. static void stereo_output_init(struct oxygen *chip)
  251. {
  252. ak4396_init(chip);
  253. }
  254. static void generic_cleanup(struct oxygen *chip)
  255. {
  256. }
  257. static void claro_disable_hp(struct oxygen *chip)
  258. {
  259. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  260. }
  261. static void claro_cleanup(struct oxygen *chip)
  262. {
  263. claro_disable_hp(chip);
  264. }
  265. static void claro_suspend(struct oxygen *chip)
  266. {
  267. claro_disable_hp(chip);
  268. }
  269. static void generic_resume(struct oxygen *chip)
  270. {
  271. ak4396_registers_init(chip);
  272. wm8785_registers_init(chip);
  273. }
  274. static void meridian_resume(struct oxygen *chip)
  275. {
  276. ak4396_registers_init(chip);
  277. }
  278. static void claro_resume(struct oxygen *chip)
  279. {
  280. ak4396_registers_init(chip);
  281. claro_enable_hp(chip);
  282. }
  283. static void stereo_resume(struct oxygen *chip)
  284. {
  285. ak4396_registers_init(chip);
  286. }
  287. static void set_ak4396_params(struct oxygen *chip,
  288. struct snd_pcm_hw_params *params)
  289. {
  290. struct generic_data *data = chip->model_data;
  291. unsigned int i;
  292. u8 value;
  293. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
  294. if (params_rate(params) <= 54000)
  295. value |= AK4396_DFS_NORMAL;
  296. else if (params_rate(params) <= 108000)
  297. value |= AK4396_DFS_DOUBLE;
  298. else
  299. value |= AK4396_DFS_QUAD;
  300. msleep(1); /* wait for the new MCLK to become stable */
  301. if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
  302. for (i = 0; i < data->dacs; ++i) {
  303. ak4396_write(chip, i, AK4396_CONTROL_1,
  304. AK4396_DIF_24_MSB);
  305. ak4396_write(chip, i, AK4396_CONTROL_2, value);
  306. ak4396_write(chip, i, AK4396_CONTROL_1,
  307. AK4396_DIF_24_MSB | AK4396_RSTN);
  308. }
  309. }
  310. }
  311. static void update_ak4396_volume(struct oxygen *chip)
  312. {
  313. struct generic_data *data = chip->model_data;
  314. unsigned int i;
  315. for (i = 0; i < data->dacs; ++i) {
  316. ak4396_write_cached(chip, i, AK4396_LCH_ATT,
  317. chip->dac_volume[i * 2]);
  318. ak4396_write_cached(chip, i, AK4396_RCH_ATT,
  319. chip->dac_volume[i * 2 + 1]);
  320. }
  321. }
  322. static void update_ak4396_mute(struct oxygen *chip)
  323. {
  324. struct generic_data *data = chip->model_data;
  325. unsigned int i;
  326. u8 value;
  327. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
  328. if (chip->dac_mute)
  329. value |= AK4396_SMUTE;
  330. for (i = 0; i < data->dacs; ++i)
  331. ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
  332. }
  333. static void set_wm8785_params(struct oxygen *chip,
  334. struct snd_pcm_hw_params *params)
  335. {
  336. struct generic_data *data = chip->model_data;
  337. unsigned int value;
  338. value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
  339. if (params_rate(params) <= 48000)
  340. value |= WM8785_OSR_SINGLE;
  341. else if (params_rate(params) <= 96000)
  342. value |= WM8785_OSR_DOUBLE;
  343. else
  344. value |= WM8785_OSR_QUAD;
  345. if (value != data->wm8785_regs[0]) {
  346. wm8785_write(chip, WM8785_R7, 0);
  347. wm8785_write(chip, WM8785_R0, value);
  348. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  349. }
  350. }
  351. static void set_ak5385_params(struct oxygen *chip,
  352. struct snd_pcm_hw_params *params)
  353. {
  354. unsigned int value;
  355. if (params_rate(params) <= 54000)
  356. value = GPIO_AK5385_DFS_NORMAL;
  357. else if (params_rate(params) <= 108000)
  358. value = GPIO_AK5385_DFS_DOUBLE;
  359. else
  360. value = GPIO_AK5385_DFS_QUAD;
  361. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  362. value, GPIO_AK5385_DFS_MASK);
  363. }
  364. static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
  365. {
  366. }
  367. static int rolloff_info(struct snd_kcontrol *ctl,
  368. struct snd_ctl_elem_info *info)
  369. {
  370. static const char *const names[2] = {
  371. "Sharp Roll-off", "Slow Roll-off"
  372. };
  373. return snd_ctl_enum_info(info, 1, 2, names);
  374. }
  375. static int rolloff_get(struct snd_kcontrol *ctl,
  376. struct snd_ctl_elem_value *value)
  377. {
  378. struct oxygen *chip = ctl->private_data;
  379. struct generic_data *data = chip->model_data;
  380. value->value.enumerated.item[0] =
  381. (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
  382. return 0;
  383. }
  384. static int rolloff_put(struct snd_kcontrol *ctl,
  385. struct snd_ctl_elem_value *value)
  386. {
  387. struct oxygen *chip = ctl->private_data;
  388. struct generic_data *data = chip->model_data;
  389. unsigned int i;
  390. int changed;
  391. u8 reg;
  392. mutex_lock(&chip->mutex);
  393. reg = data->ak4396_regs[0][AK4396_CONTROL_2];
  394. if (value->value.enumerated.item[0])
  395. reg |= AK4396_SLOW;
  396. else
  397. reg &= ~AK4396_SLOW;
  398. changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
  399. if (changed) {
  400. for (i = 0; i < data->dacs; ++i)
  401. ak4396_write(chip, i, AK4396_CONTROL_2, reg);
  402. }
  403. mutex_unlock(&chip->mutex);
  404. return changed;
  405. }
  406. static const struct snd_kcontrol_new rolloff_control = {
  407. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  408. .name = "DAC Filter Playback Enum",
  409. .info = rolloff_info,
  410. .get = rolloff_get,
  411. .put = rolloff_put,
  412. };
  413. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  414. {
  415. static const char *const names[2] = {
  416. "None", "High-pass Filter"
  417. };
  418. return snd_ctl_enum_info(info, 1, 2, names);
  419. }
  420. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  421. {
  422. struct oxygen *chip = ctl->private_data;
  423. struct generic_data *data = chip->model_data;
  424. value->value.enumerated.item[0] =
  425. (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
  426. return 0;
  427. }
  428. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  429. {
  430. struct oxygen *chip = ctl->private_data;
  431. struct generic_data *data = chip->model_data;
  432. unsigned int reg;
  433. int changed;
  434. mutex_lock(&chip->mutex);
  435. reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
  436. if (value->value.enumerated.item[0])
  437. reg |= WM8785_HPFR | WM8785_HPFL;
  438. changed = reg != data->wm8785_regs[WM8785_R2];
  439. if (changed)
  440. wm8785_write(chip, WM8785_R2, reg);
  441. mutex_unlock(&chip->mutex);
  442. return changed;
  443. }
  444. static const struct snd_kcontrol_new hpf_control = {
  445. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  446. .name = "ADC Filter Capture Enum",
  447. .info = hpf_info,
  448. .get = hpf_get,
  449. .put = hpf_put,
  450. };
  451. static int meridian_dig_source_info(struct snd_kcontrol *ctl,
  452. struct snd_ctl_elem_info *info)
  453. {
  454. static const char *const names[2] = { "On-board", "Extension" };
  455. return snd_ctl_enum_info(info, 1, 2, names);
  456. }
  457. static int claro_dig_source_info(struct snd_kcontrol *ctl,
  458. struct snd_ctl_elem_info *info)
  459. {
  460. static const char *const names[2] = { "Optical", "Coaxial" };
  461. return snd_ctl_enum_info(info, 1, 2, names);
  462. }
  463. static int meridian_dig_source_get(struct snd_kcontrol *ctl,
  464. struct snd_ctl_elem_value *value)
  465. {
  466. struct oxygen *chip = ctl->private_data;
  467. value->value.enumerated.item[0] =
  468. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  469. GPIO_MERIDIAN_DIG_EXT);
  470. return 0;
  471. }
  472. static int claro_dig_source_get(struct snd_kcontrol *ctl,
  473. struct snd_ctl_elem_value *value)
  474. {
  475. struct oxygen *chip = ctl->private_data;
  476. value->value.enumerated.item[0] =
  477. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  478. GPIO_CLARO_DIG_COAX);
  479. return 0;
  480. }
  481. static int meridian_dig_source_put(struct snd_kcontrol *ctl,
  482. struct snd_ctl_elem_value *value)
  483. {
  484. struct oxygen *chip = ctl->private_data;
  485. u16 old_reg, new_reg;
  486. int changed;
  487. mutex_lock(&chip->mutex);
  488. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  489. new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
  490. if (value->value.enumerated.item[0] == 0)
  491. new_reg |= GPIO_MERIDIAN_DIG_BOARD;
  492. else
  493. new_reg |= GPIO_MERIDIAN_DIG_EXT;
  494. changed = new_reg != old_reg;
  495. if (changed)
  496. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  497. mutex_unlock(&chip->mutex);
  498. return changed;
  499. }
  500. static int claro_dig_source_put(struct snd_kcontrol *ctl,
  501. struct snd_ctl_elem_value *value)
  502. {
  503. struct oxygen *chip = ctl->private_data;
  504. u16 old_reg, new_reg;
  505. int changed;
  506. mutex_lock(&chip->mutex);
  507. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  508. new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
  509. if (value->value.enumerated.item[0])
  510. new_reg |= GPIO_CLARO_DIG_COAX;
  511. changed = new_reg != old_reg;
  512. if (changed)
  513. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  514. mutex_unlock(&chip->mutex);
  515. return changed;
  516. }
  517. static const struct snd_kcontrol_new meridian_dig_source_control = {
  518. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  519. .name = "IEC958 Source Capture Enum",
  520. .info = meridian_dig_source_info,
  521. .get = meridian_dig_source_get,
  522. .put = meridian_dig_source_put,
  523. };
  524. static const struct snd_kcontrol_new claro_dig_source_control = {
  525. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  526. .name = "IEC958 Source Capture Enum",
  527. .info = claro_dig_source_info,
  528. .get = claro_dig_source_get,
  529. .put = claro_dig_source_put,
  530. };
  531. static int generic_mixer_init(struct oxygen *chip)
  532. {
  533. return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
  534. }
  535. static int generic_wm8785_mixer_init(struct oxygen *chip)
  536. {
  537. int err;
  538. err = generic_mixer_init(chip);
  539. if (err < 0)
  540. return err;
  541. err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
  542. if (err < 0)
  543. return err;
  544. return 0;
  545. }
  546. static int meridian_mixer_init(struct oxygen *chip)
  547. {
  548. int err;
  549. err = generic_mixer_init(chip);
  550. if (err < 0)
  551. return err;
  552. err = snd_ctl_add(chip->card,
  553. snd_ctl_new1(&meridian_dig_source_control, chip));
  554. if (err < 0)
  555. return err;
  556. return 0;
  557. }
  558. static int claro_mixer_init(struct oxygen *chip)
  559. {
  560. int err;
  561. err = generic_wm8785_mixer_init(chip);
  562. if (err < 0)
  563. return err;
  564. err = snd_ctl_add(chip->card,
  565. snd_ctl_new1(&claro_dig_source_control, chip));
  566. if (err < 0)
  567. return err;
  568. return 0;
  569. }
  570. static int claro_halo_mixer_init(struct oxygen *chip)
  571. {
  572. int err;
  573. err = generic_mixer_init(chip);
  574. if (err < 0)
  575. return err;
  576. err = snd_ctl_add(chip->card,
  577. snd_ctl_new1(&claro_dig_source_control, chip));
  578. if (err < 0)
  579. return err;
  580. return 0;
  581. }
  582. static void dump_ak4396_registers(struct oxygen *chip,
  583. struct snd_info_buffer *buffer)
  584. {
  585. struct generic_data *data = chip->model_data;
  586. unsigned int dac, i;
  587. for (dac = 0; dac < data->dacs; ++dac) {
  588. snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
  589. for (i = 0; i < 5; ++i)
  590. snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
  591. }
  592. snd_iprintf(buffer, "\n");
  593. }
  594. static void dump_wm8785_registers(struct oxygen *chip,
  595. struct snd_info_buffer *buffer)
  596. {
  597. struct generic_data *data = chip->model_data;
  598. unsigned int i;
  599. snd_iprintf(buffer, "\nWM8785:");
  600. for (i = 0; i < 3; ++i)
  601. snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
  602. snd_iprintf(buffer, "\n");
  603. }
  604. static void dump_oxygen_registers(struct oxygen *chip,
  605. struct snd_info_buffer *buffer)
  606. {
  607. dump_ak4396_registers(chip, buffer);
  608. dump_wm8785_registers(chip, buffer);
  609. }
  610. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  611. static const struct oxygen_model model_generic = {
  612. .shortname = "C-Media CMI8788",
  613. .longname = "C-Media Oxygen HD Audio",
  614. .chip = "CMI8788",
  615. .init = generic_init,
  616. .mixer_init = generic_wm8785_mixer_init,
  617. .cleanup = generic_cleanup,
  618. .resume = generic_resume,
  619. .set_dac_params = set_ak4396_params,
  620. .set_adc_params = set_wm8785_params,
  621. .update_dac_volume = update_ak4396_volume,
  622. .update_dac_mute = update_ak4396_mute,
  623. .dump_registers = dump_oxygen_registers,
  624. .dac_tlv = ak4396_db_scale,
  625. .model_data_size = sizeof(struct generic_data),
  626. .device_config = PLAYBACK_0_TO_I2S |
  627. PLAYBACK_1_TO_SPDIF |
  628. PLAYBACK_2_TO_AC97_1 |
  629. CAPTURE_0_FROM_I2S_1 |
  630. CAPTURE_1_FROM_SPDIF |
  631. CAPTURE_2_FROM_AC97_1 |
  632. AC97_CD_INPUT,
  633. .dac_channels_pcm = 8,
  634. .dac_channels_mixer = 8,
  635. .dac_volume_min = 0,
  636. .dac_volume_max = 255,
  637. .function_flags = OXYGEN_FUNCTION_SPI |
  638. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  639. .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
  640. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  641. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  642. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  643. };
  644. static int get_oxygen_model(struct oxygen *chip,
  645. const struct pci_device_id *id)
  646. {
  647. static const char *const names[] = {
  648. [MODEL_MERIDIAN] = "AuzenTech X-Meridian",
  649. [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
  650. [MODEL_CLARO] = "HT-Omega Claro",
  651. [MODEL_CLARO_HALO] = "HT-Omega Claro halo",
  652. [MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
  653. [MODEL_SERENADE] = "TempoTec HiFier Serenade",
  654. [MODEL_HG2PCI] = "CMI8787-HG2PCI",
  655. [MODEL_XONAR_DG] = "Xonar DG",
  656. [MODEL_XONAR_DGX] = "Xonar DGX",
  657. };
  658. chip->model = model_generic;
  659. switch (id->driver_data) {
  660. case MODEL_MERIDIAN:
  661. case MODEL_MERIDIAN_2G:
  662. chip->model.init = meridian_init;
  663. chip->model.mixer_init = meridian_mixer_init;
  664. chip->model.resume = meridian_resume;
  665. chip->model.set_adc_params = set_ak5385_params;
  666. chip->model.dump_registers = dump_ak4396_registers;
  667. chip->model.device_config = PLAYBACK_0_TO_I2S |
  668. PLAYBACK_1_TO_SPDIF |
  669. CAPTURE_0_FROM_I2S_2 |
  670. CAPTURE_1_FROM_SPDIF;
  671. if (id->driver_data == MODEL_MERIDIAN)
  672. chip->model.device_config |= AC97_CD_INPUT;
  673. break;
  674. case MODEL_CLARO:
  675. chip->model.init = claro_init;
  676. chip->model.mixer_init = claro_mixer_init;
  677. chip->model.cleanup = claro_cleanup;
  678. chip->model.suspend = claro_suspend;
  679. chip->model.resume = claro_resume;
  680. break;
  681. case MODEL_CLARO_HALO:
  682. chip->model.init = claro_halo_init;
  683. chip->model.mixer_init = claro_halo_mixer_init;
  684. chip->model.cleanup = claro_cleanup;
  685. chip->model.suspend = claro_suspend;
  686. chip->model.resume = claro_resume;
  687. chip->model.set_adc_params = set_ak5385_params;
  688. chip->model.dump_registers = dump_ak4396_registers;
  689. chip->model.device_config = PLAYBACK_0_TO_I2S |
  690. PLAYBACK_1_TO_SPDIF |
  691. CAPTURE_0_FROM_I2S_2 |
  692. CAPTURE_1_FROM_SPDIF;
  693. break;
  694. case MODEL_FANTASIA:
  695. case MODEL_SERENADE:
  696. case MODEL_2CH_OUTPUT:
  697. case MODEL_HG2PCI:
  698. chip->model.shortname = "C-Media CMI8787";
  699. chip->model.chip = "CMI8787";
  700. if (id->driver_data == MODEL_FANTASIA)
  701. chip->model.init = fantasia_init;
  702. else
  703. chip->model.init = stereo_output_init;
  704. chip->model.resume = stereo_resume;
  705. chip->model.mixer_init = generic_mixer_init;
  706. chip->model.set_adc_params = set_no_params;
  707. chip->model.dump_registers = dump_ak4396_registers;
  708. chip->model.device_config = PLAYBACK_0_TO_I2S |
  709. PLAYBACK_1_TO_SPDIF;
  710. if (id->driver_data == MODEL_FANTASIA) {
  711. chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
  712. chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
  713. }
  714. chip->model.dac_channels_pcm = 2;
  715. chip->model.dac_channels_mixer = 2;
  716. break;
  717. case MODEL_XONAR_DG:
  718. case MODEL_XONAR_DGX:
  719. chip->model = model_xonar_dg;
  720. break;
  721. }
  722. if (id->driver_data == MODEL_MERIDIAN ||
  723. id->driver_data == MODEL_MERIDIAN_2G ||
  724. id->driver_data == MODEL_CLARO_HALO) {
  725. chip->model.misc_flags = OXYGEN_MISC_MIDI;
  726. chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
  727. }
  728. if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
  729. chip->model.shortname = names[id->driver_data];
  730. return 0;
  731. }
  732. static int generic_oxygen_probe(struct pci_dev *pci,
  733. const struct pci_device_id *pci_id)
  734. {
  735. static int dev;
  736. int err;
  737. if (dev >= SNDRV_CARDS)
  738. return -ENODEV;
  739. if (!enable[dev]) {
  740. ++dev;
  741. return -ENOENT;
  742. }
  743. err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
  744. oxygen_ids, get_oxygen_model);
  745. if (err >= 0)
  746. ++dev;
  747. return err;
  748. }
  749. static struct pci_driver oxygen_driver = {
  750. .name = KBUILD_MODNAME,
  751. .id_table = oxygen_ids,
  752. .probe = generic_oxygen_probe,
  753. #ifdef CONFIG_PM_SLEEP
  754. .driver = {
  755. .pm = &oxygen_pci_pm,
  756. },
  757. #endif
  758. };
  759. module_pci_driver(oxygen_driver);