wm8766.c 8.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for ICEnsemble VT17xx
  4. *
  5. * Lowlevel functions for WM8766 codec
  6. *
  7. * Copyright (c) 2012 Ondrej Zary <[email protected]>
  8. */
  9. #include <linux/delay.h>
  10. #include <sound/core.h>
  11. #include <sound/control.h>
  12. #include <sound/tlv.h>
  13. #include "wm8766.h"
  14. /* low-level access */
  15. static void snd_wm8766_write(struct snd_wm8766 *wm, u16 addr, u16 data)
  16. {
  17. if (addr < WM8766_REG_COUNT)
  18. wm->regs[addr] = data;
  19. wm->ops.write(wm, addr, data);
  20. }
  21. /* mixer controls */
  22. static const DECLARE_TLV_DB_SCALE(wm8766_tlv, -12750, 50, 1);
  23. static const struct snd_wm8766_ctl snd_wm8766_default_ctl[WM8766_CTL_COUNT] = {
  24. [WM8766_CTL_CH1_VOL] = {
  25. .name = "Channel 1 Playback Volume",
  26. .type = SNDRV_CTL_ELEM_TYPE_INTEGER,
  27. .tlv = wm8766_tlv,
  28. .reg1 = WM8766_REG_DACL1,
  29. .reg2 = WM8766_REG_DACR1,
  30. .mask1 = WM8766_VOL_MASK,
  31. .mask2 = WM8766_VOL_MASK,
  32. .max = 0xff,
  33. .flags = WM8766_FLAG_STEREO | WM8766_FLAG_VOL_UPDATE,
  34. },
  35. [WM8766_CTL_CH2_VOL] = {
  36. .name = "Channel 2 Playback Volume",
  37. .type = SNDRV_CTL_ELEM_TYPE_INTEGER,
  38. .tlv = wm8766_tlv,
  39. .reg1 = WM8766_REG_DACL2,
  40. .reg2 = WM8766_REG_DACR2,
  41. .mask1 = WM8766_VOL_MASK,
  42. .mask2 = WM8766_VOL_MASK,
  43. .max = 0xff,
  44. .flags = WM8766_FLAG_STEREO | WM8766_FLAG_VOL_UPDATE,
  45. },
  46. [WM8766_CTL_CH3_VOL] = {
  47. .name = "Channel 3 Playback Volume",
  48. .type = SNDRV_CTL_ELEM_TYPE_INTEGER,
  49. .tlv = wm8766_tlv,
  50. .reg1 = WM8766_REG_DACL3,
  51. .reg2 = WM8766_REG_DACR3,
  52. .mask1 = WM8766_VOL_MASK,
  53. .mask2 = WM8766_VOL_MASK,
  54. .max = 0xff,
  55. .flags = WM8766_FLAG_STEREO | WM8766_FLAG_VOL_UPDATE,
  56. },
  57. [WM8766_CTL_CH1_SW] = {
  58. .name = "Channel 1 Playback Switch",
  59. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  60. .reg1 = WM8766_REG_DACCTRL2,
  61. .mask1 = WM8766_DAC2_MUTE1,
  62. .flags = WM8766_FLAG_INVERT,
  63. },
  64. [WM8766_CTL_CH2_SW] = {
  65. .name = "Channel 2 Playback Switch",
  66. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  67. .reg1 = WM8766_REG_DACCTRL2,
  68. .mask1 = WM8766_DAC2_MUTE2,
  69. .flags = WM8766_FLAG_INVERT,
  70. },
  71. [WM8766_CTL_CH3_SW] = {
  72. .name = "Channel 3 Playback Switch",
  73. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  74. .reg1 = WM8766_REG_DACCTRL2,
  75. .mask1 = WM8766_DAC2_MUTE3,
  76. .flags = WM8766_FLAG_INVERT,
  77. },
  78. [WM8766_CTL_PHASE1_SW] = {
  79. .name = "Channel 1 Phase Invert Playback Switch",
  80. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  81. .reg1 = WM8766_REG_IFCTRL,
  82. .mask1 = WM8766_PHASE_INVERT1,
  83. },
  84. [WM8766_CTL_PHASE2_SW] = {
  85. .name = "Channel 2 Phase Invert Playback Switch",
  86. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  87. .reg1 = WM8766_REG_IFCTRL,
  88. .mask1 = WM8766_PHASE_INVERT2,
  89. },
  90. [WM8766_CTL_PHASE3_SW] = {
  91. .name = "Channel 3 Phase Invert Playback Switch",
  92. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  93. .reg1 = WM8766_REG_IFCTRL,
  94. .mask1 = WM8766_PHASE_INVERT3,
  95. },
  96. [WM8766_CTL_DEEMPH1_SW] = {
  97. .name = "Channel 1 Deemphasis Playback Switch",
  98. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  99. .reg1 = WM8766_REG_DACCTRL2,
  100. .mask1 = WM8766_DAC2_DEEMP1,
  101. },
  102. [WM8766_CTL_DEEMPH2_SW] = {
  103. .name = "Channel 2 Deemphasis Playback Switch",
  104. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  105. .reg1 = WM8766_REG_DACCTRL2,
  106. .mask1 = WM8766_DAC2_DEEMP2,
  107. },
  108. [WM8766_CTL_DEEMPH3_SW] = {
  109. .name = "Channel 3 Deemphasis Playback Switch",
  110. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  111. .reg1 = WM8766_REG_DACCTRL2,
  112. .mask1 = WM8766_DAC2_DEEMP3,
  113. },
  114. [WM8766_CTL_IZD_SW] = {
  115. .name = "Infinite Zero Detect Playback Switch",
  116. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  117. .reg1 = WM8766_REG_DACCTRL1,
  118. .mask1 = WM8766_DAC_IZD,
  119. },
  120. [WM8766_CTL_ZC_SW] = {
  121. .name = "Zero Cross Detect Playback Switch",
  122. .type = SNDRV_CTL_ELEM_TYPE_BOOLEAN,
  123. .reg1 = WM8766_REG_DACCTRL2,
  124. .mask1 = WM8766_DAC2_ZCD,
  125. .flags = WM8766_FLAG_INVERT,
  126. },
  127. };
  128. /* exported functions */
  129. void snd_wm8766_init(struct snd_wm8766 *wm)
  130. {
  131. int i;
  132. static const u16 default_values[] = {
  133. 0x000, 0x100,
  134. 0x120, 0x000,
  135. 0x000, 0x100, 0x000, 0x100, 0x000,
  136. 0x000, 0x080,
  137. };
  138. memcpy(wm->ctl, snd_wm8766_default_ctl, sizeof(wm->ctl));
  139. snd_wm8766_write(wm, WM8766_REG_RESET, 0x00); /* reset */
  140. udelay(10);
  141. /* load defaults */
  142. for (i = 0; i < ARRAY_SIZE(default_values); i++)
  143. snd_wm8766_write(wm, i, default_values[i]);
  144. }
  145. void snd_wm8766_resume(struct snd_wm8766 *wm)
  146. {
  147. int i;
  148. for (i = 0; i < WM8766_REG_COUNT; i++)
  149. snd_wm8766_write(wm, i, wm->regs[i]);
  150. }
  151. void snd_wm8766_set_if(struct snd_wm8766 *wm, u16 dac)
  152. {
  153. u16 val = wm->regs[WM8766_REG_IFCTRL] & ~WM8766_IF_MASK;
  154. dac &= WM8766_IF_MASK;
  155. snd_wm8766_write(wm, WM8766_REG_IFCTRL, val | dac);
  156. }
  157. void snd_wm8766_volume_restore(struct snd_wm8766 *wm)
  158. {
  159. u16 val = wm->regs[WM8766_REG_DACR1];
  160. /* restore volume after MCLK stopped */
  161. snd_wm8766_write(wm, WM8766_REG_DACR1, val | WM8766_VOL_UPDATE);
  162. }
  163. /* mixer callbacks */
  164. static int snd_wm8766_volume_info(struct snd_kcontrol *kcontrol,
  165. struct snd_ctl_elem_info *uinfo)
  166. {
  167. struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
  168. int n = kcontrol->private_value;
  169. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  170. uinfo->count = (wm->ctl[n].flags & WM8766_FLAG_STEREO) ? 2 : 1;
  171. uinfo->value.integer.min = wm->ctl[n].min;
  172. uinfo->value.integer.max = wm->ctl[n].max;
  173. return 0;
  174. }
  175. static int snd_wm8766_enum_info(struct snd_kcontrol *kcontrol,
  176. struct snd_ctl_elem_info *uinfo)
  177. {
  178. struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
  179. int n = kcontrol->private_value;
  180. return snd_ctl_enum_info(uinfo, 1, wm->ctl[n].max,
  181. wm->ctl[n].enum_names);
  182. }
  183. static int snd_wm8766_ctl_get(struct snd_kcontrol *kcontrol,
  184. struct snd_ctl_elem_value *ucontrol)
  185. {
  186. struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
  187. int n = kcontrol->private_value;
  188. u16 val1, val2;
  189. if (wm->ctl[n].get)
  190. wm->ctl[n].get(wm, &val1, &val2);
  191. else {
  192. val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1;
  193. val1 >>= __ffs(wm->ctl[n].mask1);
  194. if (wm->ctl[n].flags & WM8766_FLAG_STEREO) {
  195. val2 = wm->regs[wm->ctl[n].reg2] & wm->ctl[n].mask2;
  196. val2 >>= __ffs(wm->ctl[n].mask2);
  197. if (wm->ctl[n].flags & WM8766_FLAG_VOL_UPDATE)
  198. val2 &= ~WM8766_VOL_UPDATE;
  199. }
  200. }
  201. if (wm->ctl[n].flags & WM8766_FLAG_INVERT) {
  202. val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min);
  203. if (wm->ctl[n].flags & WM8766_FLAG_STEREO)
  204. val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min);
  205. }
  206. ucontrol->value.integer.value[0] = val1;
  207. if (wm->ctl[n].flags & WM8766_FLAG_STEREO)
  208. ucontrol->value.integer.value[1] = val2;
  209. return 0;
  210. }
  211. static int snd_wm8766_ctl_put(struct snd_kcontrol *kcontrol,
  212. struct snd_ctl_elem_value *ucontrol)
  213. {
  214. struct snd_wm8766 *wm = snd_kcontrol_chip(kcontrol);
  215. int n = kcontrol->private_value;
  216. u16 val, regval1, regval2;
  217. /* this also works for enum because value is a union */
  218. regval1 = ucontrol->value.integer.value[0];
  219. regval2 = ucontrol->value.integer.value[1];
  220. if (wm->ctl[n].flags & WM8766_FLAG_INVERT) {
  221. regval1 = wm->ctl[n].max - (regval1 - wm->ctl[n].min);
  222. regval2 = wm->ctl[n].max - (regval2 - wm->ctl[n].min);
  223. }
  224. if (wm->ctl[n].set)
  225. wm->ctl[n].set(wm, regval1, regval2);
  226. else {
  227. val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1;
  228. val |= regval1 << __ffs(wm->ctl[n].mask1);
  229. /* both stereo controls in one register */
  230. if (wm->ctl[n].flags & WM8766_FLAG_STEREO &&
  231. wm->ctl[n].reg1 == wm->ctl[n].reg2) {
  232. val &= ~wm->ctl[n].mask2;
  233. val |= regval2 << __ffs(wm->ctl[n].mask2);
  234. }
  235. snd_wm8766_write(wm, wm->ctl[n].reg1, val);
  236. /* stereo controls in different registers */
  237. if (wm->ctl[n].flags & WM8766_FLAG_STEREO &&
  238. wm->ctl[n].reg1 != wm->ctl[n].reg2) {
  239. val = wm->regs[wm->ctl[n].reg2] & ~wm->ctl[n].mask2;
  240. val |= regval2 << __ffs(wm->ctl[n].mask2);
  241. if (wm->ctl[n].flags & WM8766_FLAG_VOL_UPDATE)
  242. val |= WM8766_VOL_UPDATE;
  243. snd_wm8766_write(wm, wm->ctl[n].reg2, val);
  244. }
  245. }
  246. return 0;
  247. }
  248. static int snd_wm8766_add_control(struct snd_wm8766 *wm, int num)
  249. {
  250. struct snd_kcontrol_new cont;
  251. struct snd_kcontrol *ctl;
  252. memset(&cont, 0, sizeof(cont));
  253. cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  254. cont.private_value = num;
  255. cont.name = wm->ctl[num].name;
  256. cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
  257. if (wm->ctl[num].flags & WM8766_FLAG_LIM ||
  258. wm->ctl[num].flags & WM8766_FLAG_ALC)
  259. cont.access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  260. cont.tlv.p = NULL;
  261. cont.get = snd_wm8766_ctl_get;
  262. cont.put = snd_wm8766_ctl_put;
  263. switch (wm->ctl[num].type) {
  264. case SNDRV_CTL_ELEM_TYPE_INTEGER:
  265. cont.info = snd_wm8766_volume_info;
  266. cont.access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  267. cont.tlv.p = wm->ctl[num].tlv;
  268. break;
  269. case SNDRV_CTL_ELEM_TYPE_BOOLEAN:
  270. wm->ctl[num].max = 1;
  271. if (wm->ctl[num].flags & WM8766_FLAG_STEREO)
  272. cont.info = snd_ctl_boolean_stereo_info;
  273. else
  274. cont.info = snd_ctl_boolean_mono_info;
  275. break;
  276. case SNDRV_CTL_ELEM_TYPE_ENUMERATED:
  277. cont.info = snd_wm8766_enum_info;
  278. break;
  279. default:
  280. return -EINVAL;
  281. }
  282. ctl = snd_ctl_new1(&cont, wm);
  283. if (!ctl)
  284. return -ENOMEM;
  285. wm->ctl[num].kctl = ctl;
  286. return snd_ctl_add(wm->card, ctl);
  287. }
  288. int snd_wm8766_build_controls(struct snd_wm8766 *wm)
  289. {
  290. int err, i;
  291. for (i = 0; i < WM8766_CTL_COUNT; i++)
  292. if (wm->ctl[i].name) {
  293. err = snd_wm8766_add_control(wm, i);
  294. if (err < 0)
  295. return err;
  296. }
  297. return 0;
  298. }