se.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  4. *
  5. * Lowlevel functions for ONKYO WAVIO SE-90PCI and SE-200PCI
  6. *
  7. * Copyright (c) 2007 Shin-ya Okada sh_okada(at)d4.dion.ne.jp
  8. * (at) -> @
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/init.h>
  13. #include <linux/slab.h>
  14. #include <sound/core.h>
  15. #include <sound/tlv.h>
  16. #include "ice1712.h"
  17. #include "envy24ht.h"
  18. #include "se.h"
  19. struct se_spec {
  20. struct {
  21. unsigned char ch1, ch2;
  22. } vol[8];
  23. };
  24. /****************************************************************************/
  25. /* ONKYO WAVIO SE-200PCI */
  26. /****************************************************************************/
  27. /*
  28. * system configuration ICE_EEP2_SYSCONF=0x4b
  29. * XIN1 49.152MHz
  30. * not have UART
  31. * one stereo ADC and a S/PDIF receiver connected
  32. * four stereo DACs connected
  33. *
  34. * AC-Link configuration ICE_EEP2_ACLINK=0x80
  35. * use I2C, not use AC97
  36. *
  37. * I2S converters feature ICE_EEP2_I2S=0x78
  38. * I2S codec has no volume/mute control feature
  39. * I2S codec supports 96KHz and 192KHz
  40. * I2S codec 24bits
  41. *
  42. * S/PDIF configuration ICE_EEP2_SPDIF=0xc3
  43. * Enable integrated S/PDIF transmitter
  44. * internal S/PDIF out implemented
  45. * S/PDIF is stereo
  46. * External S/PDIF out implemented
  47. *
  48. *
  49. * ** connected chips **
  50. *
  51. * WM8740
  52. * A 2ch-DAC of main outputs.
  53. * It setuped as I2S mode by wire, so no way to setup from software.
  54. * The sample-rate are automatically changed.
  55. * ML/I2S (28pin) --------+
  56. * MC/DM1 (27pin) -- 5V |
  57. * MD/DM0 (26pin) -- GND |
  58. * MUTEB (25pin) -- NC |
  59. * MODE (24pin) -- GND |
  60. * CSBIW (23pin) --------+
  61. * |
  62. * RSTB (22pin) --R(1K)-+
  63. * Probably it reduce the noise from the control line.
  64. *
  65. * WM8766
  66. * A 6ch-DAC for surrounds.
  67. * It's control wire was connected to GPIOxx (3-wire serial interface)
  68. * ML/I2S (11pin) -- GPIO18
  69. * MC/IWL (12pin) -- GPIO17
  70. * MD/DM (13pin) -- GPIO16
  71. * MUTE (14pin) -- GPIO01
  72. *
  73. * WM8776
  74. * A 2ch-ADC(with 10ch-selector) plus 2ch-DAC.
  75. * It's control wire was connected to SDA/SCLK (2-wire serial interface)
  76. * MODE (16pin) -- R(1K) -- GND
  77. * CE (17pin) -- R(1K) -- GND 2-wire mode (address=0x34)
  78. * DI (18pin) -- SDA
  79. * CL (19pin) -- SCLK
  80. *
  81. *
  82. * ** output pins and device names **
  83. *
  84. * 7.1ch name -- output connector color -- device (-D option)
  85. *
  86. * FRONT 2ch -- green -- plughw:0,0
  87. * CENTER(Lch) SUBWOOFER(Rch) -- black -- plughw:0,2,0
  88. * SURROUND 2ch -- orange -- plughw:0,2,1
  89. * SURROUND BACK 2ch -- white -- plughw:0,2,2
  90. *
  91. */
  92. /****************************************************************************/
  93. /* WM8740 interface */
  94. /****************************************************************************/
  95. static void se200pci_WM8740_init(struct snd_ice1712 *ice)
  96. {
  97. /* nothing to do */
  98. }
  99. static void se200pci_WM8740_set_pro_rate(struct snd_ice1712 *ice,
  100. unsigned int rate)
  101. {
  102. /* nothing to do */
  103. }
  104. /****************************************************************************/
  105. /* WM8766 interface */
  106. /****************************************************************************/
  107. static void se200pci_WM8766_write(struct snd_ice1712 *ice,
  108. unsigned int addr, unsigned int data)
  109. {
  110. unsigned int st;
  111. unsigned int bits;
  112. int i;
  113. const unsigned int DATA = 0x010000;
  114. const unsigned int CLOCK = 0x020000;
  115. const unsigned int LOAD = 0x040000;
  116. const unsigned int ALL_MASK = (DATA | CLOCK | LOAD);
  117. snd_ice1712_save_gpio_status(ice);
  118. st = ((addr & 0x7f) << 9) | (data & 0x1ff);
  119. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction | ALL_MASK);
  120. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask & ~ALL_MASK);
  121. bits = snd_ice1712_gpio_read(ice) & ~ALL_MASK;
  122. snd_ice1712_gpio_write(ice, bits);
  123. for (i = 0; i < 16; i++) {
  124. udelay(1);
  125. bits &= ~CLOCK;
  126. st = (st << 1);
  127. if (st & 0x10000)
  128. bits |= DATA;
  129. else
  130. bits &= ~DATA;
  131. snd_ice1712_gpio_write(ice, bits);
  132. udelay(1);
  133. bits |= CLOCK;
  134. snd_ice1712_gpio_write(ice, bits);
  135. }
  136. udelay(1);
  137. bits |= LOAD;
  138. snd_ice1712_gpio_write(ice, bits);
  139. udelay(1);
  140. bits |= (DATA | CLOCK);
  141. snd_ice1712_gpio_write(ice, bits);
  142. snd_ice1712_restore_gpio_status(ice);
  143. }
  144. static void se200pci_WM8766_set_volume(struct snd_ice1712 *ice, int ch,
  145. unsigned int vol1, unsigned int vol2)
  146. {
  147. switch (ch) {
  148. case 0:
  149. se200pci_WM8766_write(ice, 0x000, vol1);
  150. se200pci_WM8766_write(ice, 0x001, vol2 | 0x100);
  151. break;
  152. case 1:
  153. se200pci_WM8766_write(ice, 0x004, vol1);
  154. se200pci_WM8766_write(ice, 0x005, vol2 | 0x100);
  155. break;
  156. case 2:
  157. se200pci_WM8766_write(ice, 0x006, vol1);
  158. se200pci_WM8766_write(ice, 0x007, vol2 | 0x100);
  159. break;
  160. }
  161. }
  162. static void se200pci_WM8766_init(struct snd_ice1712 *ice)
  163. {
  164. se200pci_WM8766_write(ice, 0x1f, 0x000); /* RESET ALL */
  165. udelay(10);
  166. se200pci_WM8766_set_volume(ice, 0, 0, 0); /* volume L=0 R=0 */
  167. se200pci_WM8766_set_volume(ice, 1, 0, 0); /* volume L=0 R=0 */
  168. se200pci_WM8766_set_volume(ice, 2, 0, 0); /* volume L=0 R=0 */
  169. se200pci_WM8766_write(ice, 0x03, 0x022); /* serial mode I2S-24bits */
  170. se200pci_WM8766_write(ice, 0x0a, 0x080); /* MCLK=256fs */
  171. se200pci_WM8766_write(ice, 0x12, 0x000); /* MDP=0 */
  172. se200pci_WM8766_write(ice, 0x15, 0x000); /* MDP=0 */
  173. se200pci_WM8766_write(ice, 0x09, 0x000); /* demp=off mute=off */
  174. se200pci_WM8766_write(ice, 0x02, 0x124); /* ch-assign L=L R=R RESET */
  175. se200pci_WM8766_write(ice, 0x02, 0x120); /* ch-assign L=L R=R */
  176. }
  177. static void se200pci_WM8766_set_pro_rate(struct snd_ice1712 *ice,
  178. unsigned int rate)
  179. {
  180. if (rate > 96000)
  181. se200pci_WM8766_write(ice, 0x0a, 0x000); /* MCLK=128fs */
  182. else
  183. se200pci_WM8766_write(ice, 0x0a, 0x080); /* MCLK=256fs */
  184. }
  185. /****************************************************************************/
  186. /* WM8776 interface */
  187. /****************************************************************************/
  188. static void se200pci_WM8776_write(struct snd_ice1712 *ice,
  189. unsigned int addr, unsigned int data)
  190. {
  191. unsigned int val;
  192. val = (addr << 9) | data;
  193. snd_vt1724_write_i2c(ice, 0x34, val >> 8, val & 0xff);
  194. }
  195. static void se200pci_WM8776_set_output_volume(struct snd_ice1712 *ice,
  196. unsigned int vol1, unsigned int vol2)
  197. {
  198. se200pci_WM8776_write(ice, 0x03, vol1);
  199. se200pci_WM8776_write(ice, 0x04, vol2 | 0x100);
  200. }
  201. static void se200pci_WM8776_set_input_volume(struct snd_ice1712 *ice,
  202. unsigned int vol1, unsigned int vol2)
  203. {
  204. se200pci_WM8776_write(ice, 0x0e, vol1);
  205. se200pci_WM8776_write(ice, 0x0f, vol2 | 0x100);
  206. }
  207. static const char * const se200pci_sel[] = {
  208. "LINE-IN", "CD-IN", "MIC-IN", "ALL-MIX", NULL
  209. };
  210. static void se200pci_WM8776_set_input_selector(struct snd_ice1712 *ice,
  211. unsigned int sel)
  212. {
  213. static const unsigned char vals[] = {
  214. /* LINE, CD, MIC, ALL, GND */
  215. 0x10, 0x04, 0x08, 0x1c, 0x03
  216. };
  217. if (sel > 4)
  218. sel = 4;
  219. se200pci_WM8776_write(ice, 0x15, vals[sel]);
  220. }
  221. static void se200pci_WM8776_set_afl(struct snd_ice1712 *ice, unsigned int afl)
  222. {
  223. /* AFL -- After Fader Listening */
  224. if (afl)
  225. se200pci_WM8776_write(ice, 0x16, 0x005);
  226. else
  227. se200pci_WM8776_write(ice, 0x16, 0x001);
  228. }
  229. static const char * const se200pci_agc[] = {
  230. "Off", "LimiterMode", "ALCMode", NULL
  231. };
  232. static void se200pci_WM8776_set_agc(struct snd_ice1712 *ice, unsigned int agc)
  233. {
  234. /* AGC -- Auto Gain Control of the input */
  235. switch (agc) {
  236. case 0:
  237. se200pci_WM8776_write(ice, 0x11, 0x000); /* Off */
  238. break;
  239. case 1:
  240. se200pci_WM8776_write(ice, 0x10, 0x07b);
  241. se200pci_WM8776_write(ice, 0x11, 0x100); /* LimiterMode */
  242. break;
  243. case 2:
  244. se200pci_WM8776_write(ice, 0x10, 0x1fb);
  245. se200pci_WM8776_write(ice, 0x11, 0x100); /* ALCMode */
  246. break;
  247. }
  248. }
  249. static void se200pci_WM8776_init(struct snd_ice1712 *ice)
  250. {
  251. int i;
  252. static const unsigned short default_values[] = {
  253. 0x100, 0x100, 0x100,
  254. 0x100, 0x100, 0x100,
  255. 0x000, 0x090, 0x000, 0x000,
  256. 0x022, 0x022, 0x022,
  257. 0x008, 0x0cf, 0x0cf, 0x07b, 0x000,
  258. 0x032, 0x000, 0x0a6, 0x001, 0x001
  259. };
  260. se200pci_WM8776_write(ice, 0x17, 0x000); /* reset all */
  261. /* ADC and DAC interface is I2S 24bits mode */
  262. /* The sample-rate are automatically changed */
  263. udelay(10);
  264. /* BUT my board can not do reset all, so I load all by manually. */
  265. for (i = 0; i < ARRAY_SIZE(default_values); i++)
  266. se200pci_WM8776_write(ice, i, default_values[i]);
  267. se200pci_WM8776_set_input_selector(ice, 0);
  268. se200pci_WM8776_set_afl(ice, 0);
  269. se200pci_WM8776_set_agc(ice, 0);
  270. se200pci_WM8776_set_input_volume(ice, 0, 0);
  271. se200pci_WM8776_set_output_volume(ice, 0, 0);
  272. /* head phone mute and power down */
  273. se200pci_WM8776_write(ice, 0x00, 0);
  274. se200pci_WM8776_write(ice, 0x01, 0);
  275. se200pci_WM8776_write(ice, 0x02, 0x100);
  276. se200pci_WM8776_write(ice, 0x0d, 0x080);
  277. }
  278. static void se200pci_WM8776_set_pro_rate(struct snd_ice1712 *ice,
  279. unsigned int rate)
  280. {
  281. /* nothing to do */
  282. }
  283. /****************************************************************************/
  284. /* runtime interface */
  285. /****************************************************************************/
  286. static void se200pci_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate)
  287. {
  288. se200pci_WM8740_set_pro_rate(ice, rate);
  289. se200pci_WM8766_set_pro_rate(ice, rate);
  290. se200pci_WM8776_set_pro_rate(ice, rate);
  291. }
  292. struct se200pci_control {
  293. const char *name;
  294. enum {
  295. WM8766,
  296. WM8776in,
  297. WM8776out,
  298. WM8776sel,
  299. WM8776agc,
  300. WM8776afl
  301. } target;
  302. enum { VOLUME1, VOLUME2, BOOLEAN, ENUM } type;
  303. int ch;
  304. const char * const *member;
  305. const char *comment;
  306. };
  307. static const struct se200pci_control se200pci_cont[] = {
  308. {
  309. .name = "Front Playback Volume",
  310. .target = WM8776out,
  311. .type = VOLUME1,
  312. .comment = "Front(green)"
  313. },
  314. {
  315. .name = "Side Playback Volume",
  316. .target = WM8766,
  317. .type = VOLUME1,
  318. .ch = 1,
  319. .comment = "Surround(orange)"
  320. },
  321. {
  322. .name = "Surround Playback Volume",
  323. .target = WM8766,
  324. .type = VOLUME1,
  325. .ch = 2,
  326. .comment = "SurroundBack(white)"
  327. },
  328. {
  329. .name = "CLFE Playback Volume",
  330. .target = WM8766,
  331. .type = VOLUME1,
  332. .ch = 0,
  333. .comment = "Center(Lch)&SubWoofer(Rch)(black)"
  334. },
  335. {
  336. .name = "Capture Volume",
  337. .target = WM8776in,
  338. .type = VOLUME2
  339. },
  340. {
  341. .name = "Capture Select",
  342. .target = WM8776sel,
  343. .type = ENUM,
  344. .member = se200pci_sel
  345. },
  346. {
  347. .name = "AGC Capture Mode",
  348. .target = WM8776agc,
  349. .type = ENUM,
  350. .member = se200pci_agc
  351. },
  352. {
  353. .name = "AFL Bypass Playback Switch",
  354. .target = WM8776afl,
  355. .type = BOOLEAN
  356. }
  357. };
  358. static int se200pci_get_enum_count(int n)
  359. {
  360. const char * const *member;
  361. int c;
  362. member = se200pci_cont[n].member;
  363. if (!member)
  364. return 0;
  365. for (c = 0; member[c]; c++)
  366. ;
  367. return c;
  368. }
  369. static int se200pci_cont_volume_info(struct snd_kcontrol *kc,
  370. struct snd_ctl_elem_info *uinfo)
  371. {
  372. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  373. uinfo->count = 2;
  374. uinfo->value.integer.min = 0; /* mute */
  375. uinfo->value.integer.max = 0xff; /* 0dB */
  376. return 0;
  377. }
  378. #define se200pci_cont_boolean_info snd_ctl_boolean_mono_info
  379. static int se200pci_cont_enum_info(struct snd_kcontrol *kc,
  380. struct snd_ctl_elem_info *uinfo)
  381. {
  382. int n, c;
  383. n = kc->private_value;
  384. c = se200pci_get_enum_count(n);
  385. if (!c)
  386. return -EINVAL;
  387. return snd_ctl_enum_info(uinfo, 1, c, se200pci_cont[n].member);
  388. }
  389. static int se200pci_cont_volume_get(struct snd_kcontrol *kc,
  390. struct snd_ctl_elem_value *uc)
  391. {
  392. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  393. struct se_spec *spec = ice->spec;
  394. int n = kc->private_value;
  395. uc->value.integer.value[0] = spec->vol[n].ch1;
  396. uc->value.integer.value[1] = spec->vol[n].ch2;
  397. return 0;
  398. }
  399. static int se200pci_cont_boolean_get(struct snd_kcontrol *kc,
  400. struct snd_ctl_elem_value *uc)
  401. {
  402. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  403. struct se_spec *spec = ice->spec;
  404. int n = kc->private_value;
  405. uc->value.integer.value[0] = spec->vol[n].ch1;
  406. return 0;
  407. }
  408. static int se200pci_cont_enum_get(struct snd_kcontrol *kc,
  409. struct snd_ctl_elem_value *uc)
  410. {
  411. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  412. struct se_spec *spec = ice->spec;
  413. int n = kc->private_value;
  414. uc->value.enumerated.item[0] = spec->vol[n].ch1;
  415. return 0;
  416. }
  417. static void se200pci_cont_update(struct snd_ice1712 *ice, int n)
  418. {
  419. struct se_spec *spec = ice->spec;
  420. switch (se200pci_cont[n].target) {
  421. case WM8766:
  422. se200pci_WM8766_set_volume(ice,
  423. se200pci_cont[n].ch,
  424. spec->vol[n].ch1,
  425. spec->vol[n].ch2);
  426. break;
  427. case WM8776in:
  428. se200pci_WM8776_set_input_volume(ice,
  429. spec->vol[n].ch1,
  430. spec->vol[n].ch2);
  431. break;
  432. case WM8776out:
  433. se200pci_WM8776_set_output_volume(ice,
  434. spec->vol[n].ch1,
  435. spec->vol[n].ch2);
  436. break;
  437. case WM8776sel:
  438. se200pci_WM8776_set_input_selector(ice,
  439. spec->vol[n].ch1);
  440. break;
  441. case WM8776agc:
  442. se200pci_WM8776_set_agc(ice, spec->vol[n].ch1);
  443. break;
  444. case WM8776afl:
  445. se200pci_WM8776_set_afl(ice, spec->vol[n].ch1);
  446. break;
  447. default:
  448. break;
  449. }
  450. }
  451. static int se200pci_cont_volume_put(struct snd_kcontrol *kc,
  452. struct snd_ctl_elem_value *uc)
  453. {
  454. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  455. struct se_spec *spec = ice->spec;
  456. int n = kc->private_value;
  457. unsigned int vol1, vol2;
  458. int changed;
  459. changed = 0;
  460. vol1 = uc->value.integer.value[0] & 0xff;
  461. vol2 = uc->value.integer.value[1] & 0xff;
  462. if (spec->vol[n].ch1 != vol1) {
  463. spec->vol[n].ch1 = vol1;
  464. changed = 1;
  465. }
  466. if (spec->vol[n].ch2 != vol2) {
  467. spec->vol[n].ch2 = vol2;
  468. changed = 1;
  469. }
  470. if (changed)
  471. se200pci_cont_update(ice, n);
  472. return changed;
  473. }
  474. static int se200pci_cont_boolean_put(struct snd_kcontrol *kc,
  475. struct snd_ctl_elem_value *uc)
  476. {
  477. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  478. struct se_spec *spec = ice->spec;
  479. int n = kc->private_value;
  480. unsigned int vol1;
  481. vol1 = !!uc->value.integer.value[0];
  482. if (spec->vol[n].ch1 != vol1) {
  483. spec->vol[n].ch1 = vol1;
  484. se200pci_cont_update(ice, n);
  485. return 1;
  486. }
  487. return 0;
  488. }
  489. static int se200pci_cont_enum_put(struct snd_kcontrol *kc,
  490. struct snd_ctl_elem_value *uc)
  491. {
  492. struct snd_ice1712 *ice = snd_kcontrol_chip(kc);
  493. struct se_spec *spec = ice->spec;
  494. int n = kc->private_value;
  495. unsigned int vol1;
  496. vol1 = uc->value.enumerated.item[0];
  497. if (vol1 >= se200pci_get_enum_count(n))
  498. return -EINVAL;
  499. if (spec->vol[n].ch1 != vol1) {
  500. spec->vol[n].ch1 = vol1;
  501. se200pci_cont_update(ice, n);
  502. return 1;
  503. }
  504. return 0;
  505. }
  506. static const DECLARE_TLV_DB_SCALE(db_scale_gain1, -12750, 50, 1);
  507. static const DECLARE_TLV_DB_SCALE(db_scale_gain2, -10350, 50, 1);
  508. static int se200pci_add_controls(struct snd_ice1712 *ice)
  509. {
  510. int i;
  511. struct snd_kcontrol_new cont;
  512. int err;
  513. memset(&cont, 0, sizeof(cont));
  514. cont.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  515. for (i = 0; i < ARRAY_SIZE(se200pci_cont); i++) {
  516. cont.private_value = i;
  517. cont.name = se200pci_cont[i].name;
  518. cont.access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
  519. cont.tlv.p = NULL;
  520. switch (se200pci_cont[i].type) {
  521. case VOLUME1:
  522. case VOLUME2:
  523. cont.info = se200pci_cont_volume_info;
  524. cont.get = se200pci_cont_volume_get;
  525. cont.put = se200pci_cont_volume_put;
  526. cont.access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  527. if (se200pci_cont[i].type == VOLUME1)
  528. cont.tlv.p = db_scale_gain1;
  529. else
  530. cont.tlv.p = db_scale_gain2;
  531. break;
  532. case BOOLEAN:
  533. cont.info = se200pci_cont_boolean_info;
  534. cont.get = se200pci_cont_boolean_get;
  535. cont.put = se200pci_cont_boolean_put;
  536. break;
  537. case ENUM:
  538. cont.info = se200pci_cont_enum_info;
  539. cont.get = se200pci_cont_enum_get;
  540. cont.put = se200pci_cont_enum_put;
  541. break;
  542. default:
  543. snd_BUG();
  544. return -EINVAL;
  545. }
  546. err = snd_ctl_add(ice->card, snd_ctl_new1(&cont, ice));
  547. if (err < 0)
  548. return err;
  549. }
  550. return 0;
  551. }
  552. /****************************************************************************/
  553. /* ONKYO WAVIO SE-90PCI */
  554. /****************************************************************************/
  555. /*
  556. * system configuration ICE_EEP2_SYSCONF=0x4b
  557. * AC-Link configuration ICE_EEP2_ACLINK=0x80
  558. * I2S converters feature ICE_EEP2_I2S=0x78
  559. * S/PDIF configuration ICE_EEP2_SPDIF=0xc3
  560. *
  561. * ** connected chip **
  562. *
  563. * WM8716
  564. * A 2ch-DAC of main outputs.
  565. * It setuped as I2S mode by wire, so no way to setup from software.
  566. * ML/I2S (28pin) -- +5V
  567. * MC/DM1 (27pin) -- GND
  568. * MC/DM0 (26pin) -- GND
  569. * MUTEB (25pin) -- open (internal pull-up)
  570. * MODE (24pin) -- GND
  571. * CSBIWO (23pin) -- +5V
  572. *
  573. */
  574. /* Nothing to do for this chip. */
  575. /****************************************************************************/
  576. /* probe/initialize/setup */
  577. /****************************************************************************/
  578. static int se_init(struct snd_ice1712 *ice)
  579. {
  580. struct se_spec *spec;
  581. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  582. if (!spec)
  583. return -ENOMEM;
  584. ice->spec = spec;
  585. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE90PCI) {
  586. ice->num_total_dacs = 2;
  587. ice->num_total_adcs = 0;
  588. ice->vt1720 = 1;
  589. return 0;
  590. } else if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE200PCI) {
  591. ice->num_total_dacs = 8;
  592. ice->num_total_adcs = 2;
  593. se200pci_WM8740_init(ice);
  594. se200pci_WM8766_init(ice);
  595. se200pci_WM8776_init(ice);
  596. ice->gpio.set_pro_rate = se200pci_set_pro_rate;
  597. return 0;
  598. }
  599. return -ENOENT;
  600. }
  601. static int se_add_controls(struct snd_ice1712 *ice)
  602. {
  603. int err;
  604. err = 0;
  605. /* nothing to do for VT1724_SUBDEVICE_SE90PCI */
  606. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_SE200PCI)
  607. err = se200pci_add_controls(ice);
  608. return err;
  609. }
  610. /****************************************************************************/
  611. /* entry point */
  612. /****************************************************************************/
  613. static const unsigned char se200pci_eeprom[] = {
  614. [ICE_EEP2_SYSCONF] = 0x4b, /* 49.152Hz, spdif-in/ADC, 4DACs */
  615. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  616. [ICE_EEP2_I2S] = 0x78, /* 96k-ok, 24bit, 192k-ok */
  617. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  618. [ICE_EEP2_GPIO_DIR] = 0x02, /* WM8766 mute 1=output */
  619. [ICE_EEP2_GPIO_DIR1] = 0x00, /* not used */
  620. [ICE_EEP2_GPIO_DIR2] = 0x07, /* WM8766 ML/MC/MD 1=output */
  621. [ICE_EEP2_GPIO_MASK] = 0x00, /* 0=writable */
  622. [ICE_EEP2_GPIO_MASK1] = 0x00, /* 0=writable */
  623. [ICE_EEP2_GPIO_MASK2] = 0x00, /* 0=writable */
  624. [ICE_EEP2_GPIO_STATE] = 0x00, /* WM8766 mute=0 */
  625. [ICE_EEP2_GPIO_STATE1] = 0x00, /* not used */
  626. [ICE_EEP2_GPIO_STATE2] = 0x07, /* WM8766 ML/MC/MD */
  627. };
  628. static const unsigned char se90pci_eeprom[] = {
  629. [ICE_EEP2_SYSCONF] = 0x4b, /* 49.152Hz, spdif-in/ADC, 4DACs */
  630. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  631. [ICE_EEP2_I2S] = 0x78, /* 96k-ok, 24bit, 192k-ok */
  632. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  633. /* ALL GPIO bits are in input mode */
  634. };
  635. struct snd_ice1712_card_info snd_vt1724_se_cards[] = {
  636. {
  637. .subvendor = VT1724_SUBDEVICE_SE200PCI,
  638. .name = "ONKYO SE200PCI",
  639. .model = "se200pci",
  640. .chip_init = se_init,
  641. .build_controls = se_add_controls,
  642. .eeprom_size = sizeof(se200pci_eeprom),
  643. .eeprom_data = se200pci_eeprom,
  644. },
  645. {
  646. .subvendor = VT1724_SUBDEVICE_SE90PCI,
  647. .name = "ONKYO SE90PCI",
  648. .model = "se90pci",
  649. .chip_init = se_init,
  650. .build_controls = se_add_controls,
  651. .eeprom_size = sizeof(se90pci_eeprom),
  652. .eeprom_data = se90pci_eeprom,
  653. },
  654. {} /*terminator*/
  655. };