delta.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  4. *
  5. * Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496,
  6. * Audiophile, Digigram VX442
  7. *
  8. * Copyright (c) 2000 Jaroslav Kysela <[email protected]>
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/init.h>
  13. #include <linux/slab.h>
  14. #include <linux/mutex.h>
  15. #include <sound/core.h>
  16. #include <sound/cs8427.h>
  17. #include <sound/asoundef.h>
  18. #include "ice1712.h"
  19. #include "delta.h"
  20. #define SND_CS8403
  21. #include <sound/cs8403.h>
  22. /*
  23. * CS8427 via SPI mode (for Audiophile), emulated I2C
  24. */
  25. /* send 8 bits */
  26. static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
  27. {
  28. int idx;
  29. for (idx = 7; idx >= 0; idx--) {
  30. tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
  31. if (data & (1 << idx))
  32. tmp |= ICE1712_DELTA_AP_DOUT;
  33. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  34. udelay(5);
  35. tmp |= ICE1712_DELTA_AP_CCLK;
  36. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  37. udelay(5);
  38. }
  39. }
  40. /* read 8 bits */
  41. static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
  42. {
  43. unsigned char data = 0;
  44. int idx;
  45. for (idx = 7; idx >= 0; idx--) {
  46. tmp &= ~ICE1712_DELTA_AP_CCLK;
  47. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  48. udelay(5);
  49. if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
  50. data |= 1 << idx;
  51. tmp |= ICE1712_DELTA_AP_CCLK;
  52. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  53. udelay(5);
  54. }
  55. return data;
  56. }
  57. /* assert chip select */
  58. static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
  59. {
  60. unsigned char tmp;
  61. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  62. switch (ice->eeprom.subvendor) {
  63. case ICE1712_SUBDEVICE_DELTA1010E:
  64. case ICE1712_SUBDEVICE_DELTA1010LT:
  65. tmp &= ~ICE1712_DELTA_1010LT_CS;
  66. tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
  67. break;
  68. case ICE1712_SUBDEVICE_AUDIOPHILE:
  69. case ICE1712_SUBDEVICE_DELTA410:
  70. tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
  71. tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
  72. break;
  73. case ICE1712_SUBDEVICE_DELTA66E:
  74. tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A |
  75. ICE1712_DELTA_66E_CS_CHIP_B;
  76. tmp &= ~ICE1712_DELTA_66E_CS_CS8427;
  77. break;
  78. case ICE1712_SUBDEVICE_VX442:
  79. tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
  80. tmp &= ~ICE1712_VX442_CS_DIGITAL;
  81. break;
  82. }
  83. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  84. udelay(5);
  85. return tmp;
  86. }
  87. /* deassert chip select */
  88. static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
  89. {
  90. switch (ice->eeprom.subvendor) {
  91. case ICE1712_SUBDEVICE_DELTA1010E:
  92. case ICE1712_SUBDEVICE_DELTA1010LT:
  93. tmp &= ~ICE1712_DELTA_1010LT_CS;
  94. tmp |= ICE1712_DELTA_1010LT_CS_NONE;
  95. break;
  96. case ICE1712_SUBDEVICE_AUDIOPHILE:
  97. case ICE1712_SUBDEVICE_DELTA410:
  98. tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
  99. break;
  100. case ICE1712_SUBDEVICE_DELTA66E:
  101. tmp |= ICE1712_DELTA_66E_CS_CS8427;
  102. break;
  103. case ICE1712_SUBDEVICE_VX442:
  104. tmp |= ICE1712_VX442_CS_DIGITAL;
  105. break;
  106. }
  107. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  108. }
  109. /* sequential write */
  110. static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  111. {
  112. struct snd_ice1712 *ice = device->bus->private_data;
  113. int res = count;
  114. unsigned char tmp;
  115. mutex_lock(&ice->gpio_mutex);
  116. tmp = ap_cs8427_codec_select(ice);
  117. ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
  118. while (count-- > 0)
  119. ap_cs8427_write_byte(ice, *bytes++, tmp);
  120. ap_cs8427_codec_deassert(ice, tmp);
  121. mutex_unlock(&ice->gpio_mutex);
  122. return res;
  123. }
  124. /* sequential read */
  125. static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  126. {
  127. struct snd_ice1712 *ice = device->bus->private_data;
  128. int res = count;
  129. unsigned char tmp;
  130. mutex_lock(&ice->gpio_mutex);
  131. tmp = ap_cs8427_codec_select(ice);
  132. ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
  133. while (count-- > 0)
  134. *bytes++ = ap_cs8427_read_byte(ice, tmp);
  135. ap_cs8427_codec_deassert(ice, tmp);
  136. mutex_unlock(&ice->gpio_mutex);
  137. return res;
  138. }
  139. static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
  140. {
  141. if (addr == 0x10)
  142. return 1;
  143. return -ENOENT;
  144. }
  145. static const struct snd_i2c_ops ap_cs8427_i2c_ops = {
  146. .sendbytes = ap_cs8427_sendbytes,
  147. .readbytes = ap_cs8427_readbytes,
  148. .probeaddr = ap_cs8427_probeaddr,
  149. };
  150. /*
  151. */
  152. static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
  153. {
  154. unsigned char tmp, mask1, mask2;
  155. int idx;
  156. /* send byte to transmitter */
  157. mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
  158. mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
  159. mutex_lock(&ice->gpio_mutex);
  160. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  161. for (idx = 7; idx >= 0; idx--) {
  162. tmp &= ~(mask1 | mask2);
  163. if (bits & (1 << idx))
  164. tmp |= mask2;
  165. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  166. udelay(100);
  167. tmp |= mask1;
  168. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  169. udelay(100);
  170. }
  171. tmp &= ~mask1;
  172. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  173. mutex_unlock(&ice->gpio_mutex);
  174. }
  175. static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  176. {
  177. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
  178. }
  179. static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  180. {
  181. unsigned int val;
  182. int change;
  183. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  184. spin_lock_irq(&ice->reg_lock);
  185. change = ice->spdif.cs8403_bits != val;
  186. ice->spdif.cs8403_bits = val;
  187. if (change && ice->playback_pro_substream == NULL) {
  188. spin_unlock_irq(&ice->reg_lock);
  189. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  190. } else {
  191. spin_unlock_irq(&ice->reg_lock);
  192. }
  193. return change;
  194. }
  195. static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  196. {
  197. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
  198. }
  199. static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  200. {
  201. unsigned int val;
  202. int change;
  203. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  204. spin_lock_irq(&ice->reg_lock);
  205. change = ice->spdif.cs8403_stream_bits != val;
  206. ice->spdif.cs8403_stream_bits = val;
  207. if (change && ice->playback_pro_substream != NULL) {
  208. spin_unlock_irq(&ice->reg_lock);
  209. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  210. } else {
  211. spin_unlock_irq(&ice->reg_lock);
  212. }
  213. return change;
  214. }
  215. /*
  216. * AK4524 on Delta 44 and 66 to choose the chip mask
  217. */
  218. static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  219. {
  220. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  221. struct snd_ice1712 *ice = ak->private_data[0];
  222. snd_ice1712_save_gpio_status(ice);
  223. priv->cs_mask =
  224. priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
  225. ICE1712_DELTA_CODEC_CHIP_B;
  226. }
  227. /*
  228. * AK4524 on Delta1010LT to choose the chip address
  229. */
  230. static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  231. {
  232. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  233. struct snd_ice1712 *ice = ak->private_data[0];
  234. snd_ice1712_save_gpio_status(ice);
  235. priv->cs_mask = ICE1712_DELTA_1010LT_CS;
  236. priv->cs_addr = chip << 4;
  237. }
  238. /*
  239. * AK4524 on Delta66 rev E to choose the chip address
  240. */
  241. static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  242. {
  243. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  244. struct snd_ice1712 *ice = ak->private_data[0];
  245. snd_ice1712_save_gpio_status(ice);
  246. priv->cs_mask =
  247. priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A :
  248. ICE1712_DELTA_66E_CS_CHIP_B;
  249. }
  250. /*
  251. * AK4528 on VX442 to choose the chip mask
  252. */
  253. static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  254. {
  255. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  256. struct snd_ice1712 *ice = ak->private_data[0];
  257. snd_ice1712_save_gpio_status(ice);
  258. priv->cs_mask =
  259. priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
  260. ICE1712_VX442_CODEC_CHIP_B;
  261. }
  262. /*
  263. * change the DFS bit according rate for Delta1010
  264. */
  265. static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
  266. {
  267. unsigned char tmp, tmp2;
  268. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  269. return;
  270. mutex_lock(&ice->gpio_mutex);
  271. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  272. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  273. if (rate > 48000)
  274. tmp2 |= ICE1712_DELTA_DFS;
  275. if (tmp != tmp2)
  276. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
  277. mutex_unlock(&ice->gpio_mutex);
  278. }
  279. /*
  280. * change the rate of AK4524 on Delta 44/66, AP, 1010LT
  281. */
  282. static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  283. {
  284. unsigned char tmp, tmp2;
  285. struct snd_ice1712 *ice = ak->private_data[0];
  286. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  287. return;
  288. /* check before reset ak4524 to avoid unnecessary clicks */
  289. mutex_lock(&ice->gpio_mutex);
  290. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  291. mutex_unlock(&ice->gpio_mutex);
  292. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  293. if (rate > 48000)
  294. tmp2 |= ICE1712_DELTA_DFS;
  295. if (tmp == tmp2)
  296. return;
  297. /* do it again */
  298. snd_akm4xxx_reset(ak, 1);
  299. mutex_lock(&ice->gpio_mutex);
  300. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
  301. if (rate > 48000)
  302. tmp |= ICE1712_DELTA_DFS;
  303. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  304. mutex_unlock(&ice->gpio_mutex);
  305. snd_akm4xxx_reset(ak, 0);
  306. }
  307. /*
  308. * change the rate of AK4524 on VX442
  309. */
  310. static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  311. {
  312. unsigned char val;
  313. val = (rate > 48000) ? 0x65 : 0x60;
  314. if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
  315. snd_akm4xxx_get(ak, 1, 0x02) != val) {
  316. snd_akm4xxx_reset(ak, 1);
  317. snd_akm4xxx_write(ak, 0, 0x02, val);
  318. snd_akm4xxx_write(ak, 1, 0x02, val);
  319. snd_akm4xxx_reset(ak, 0);
  320. }
  321. }
  322. /*
  323. * SPDIF ops for Delta 1010, Dio, 66
  324. */
  325. /* open callback */
  326. static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  327. {
  328. ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
  329. }
  330. /* set up */
  331. static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
  332. {
  333. unsigned long flags;
  334. unsigned int tmp;
  335. int change;
  336. spin_lock_irqsave(&ice->reg_lock, flags);
  337. tmp = ice->spdif.cs8403_stream_bits;
  338. if (tmp & 0x01) /* consumer */
  339. tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
  340. switch (rate) {
  341. case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
  342. case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
  343. case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
  344. default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
  345. }
  346. change = ice->spdif.cs8403_stream_bits != tmp;
  347. ice->spdif.cs8403_stream_bits = tmp;
  348. spin_unlock_irqrestore(&ice->reg_lock, flags);
  349. if (change)
  350. snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
  351. snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
  352. }
  353. #define snd_ice1712_delta1010lt_wordclock_status_info \
  354. snd_ctl_boolean_mono_info
  355. static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
  356. struct snd_ctl_elem_value *ucontrol)
  357. {
  358. char reg = 0x10; /* CS8427 receiver error register */
  359. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  360. if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
  361. dev_err(ice->card->dev,
  362. "unable to send register 0x%x byte to CS8427\n", reg);
  363. snd_i2c_readbytes(ice->cs8427, &reg, 1);
  364. ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
  365. return 0;
  366. }
  367. static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status =
  368. {
  369. .access = (SNDRV_CTL_ELEM_ACCESS_READ),
  370. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  371. .name = "Word Clock Status",
  372. .info = snd_ice1712_delta1010lt_wordclock_status_info,
  373. .get = snd_ice1712_delta1010lt_wordclock_status_get,
  374. };
  375. /*
  376. * initialize the chips on M-Audio cards
  377. */
  378. static const struct snd_akm4xxx akm_audiophile = {
  379. .type = SND_AK4528,
  380. .num_adcs = 2,
  381. .num_dacs = 2,
  382. .ops = {
  383. .set_rate_val = delta_ak4524_set_rate_val
  384. }
  385. };
  386. static const struct snd_ak4xxx_private akm_audiophile_priv = {
  387. .caddr = 2,
  388. .cif = 0,
  389. .data_mask = ICE1712_DELTA_AP_DOUT,
  390. .clk_mask = ICE1712_DELTA_AP_CCLK,
  391. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  392. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  393. .cs_none = 0,
  394. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  395. .mask_flags = 0,
  396. };
  397. static const struct snd_akm4xxx akm_delta410 = {
  398. .type = SND_AK4529,
  399. .num_adcs = 2,
  400. .num_dacs = 8,
  401. .ops = {
  402. .set_rate_val = delta_ak4524_set_rate_val
  403. }
  404. };
  405. static const struct snd_ak4xxx_private akm_delta410_priv = {
  406. .caddr = 0,
  407. .cif = 0,
  408. .data_mask = ICE1712_DELTA_AP_DOUT,
  409. .clk_mask = ICE1712_DELTA_AP_CCLK,
  410. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  411. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  412. .cs_none = 0,
  413. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  414. .mask_flags = 0,
  415. };
  416. static const struct snd_akm4xxx akm_delta1010lt = {
  417. .type = SND_AK4524,
  418. .num_adcs = 8,
  419. .num_dacs = 8,
  420. .ops = {
  421. .lock = delta1010lt_ak4524_lock,
  422. .set_rate_val = delta_ak4524_set_rate_val
  423. }
  424. };
  425. static const struct snd_ak4xxx_private akm_delta1010lt_priv = {
  426. .caddr = 2,
  427. .cif = 0, /* the default level of the CIF pin from AK4524 */
  428. .data_mask = ICE1712_DELTA_1010LT_DOUT,
  429. .clk_mask = ICE1712_DELTA_1010LT_CCLK,
  430. .cs_mask = 0,
  431. .cs_addr = 0, /* set later */
  432. .cs_none = ICE1712_DELTA_1010LT_CS_NONE,
  433. .add_flags = 0,
  434. .mask_flags = 0,
  435. };
  436. static const struct snd_akm4xxx akm_delta66e = {
  437. .type = SND_AK4524,
  438. .num_adcs = 4,
  439. .num_dacs = 4,
  440. .ops = {
  441. .lock = delta66e_ak4524_lock,
  442. .set_rate_val = delta_ak4524_set_rate_val
  443. }
  444. };
  445. static const struct snd_ak4xxx_private akm_delta66e_priv = {
  446. .caddr = 2,
  447. .cif = 0, /* the default level of the CIF pin from AK4524 */
  448. .data_mask = ICE1712_DELTA_66E_DOUT,
  449. .clk_mask = ICE1712_DELTA_66E_CCLK,
  450. .cs_mask = 0,
  451. .cs_addr = 0, /* set later */
  452. .cs_none = 0,
  453. .add_flags = 0,
  454. .mask_flags = 0,
  455. };
  456. static const struct snd_akm4xxx akm_delta44 = {
  457. .type = SND_AK4524,
  458. .num_adcs = 4,
  459. .num_dacs = 4,
  460. .ops = {
  461. .lock = delta_ak4524_lock,
  462. .set_rate_val = delta_ak4524_set_rate_val
  463. }
  464. };
  465. static const struct snd_ak4xxx_private akm_delta44_priv = {
  466. .caddr = 2,
  467. .cif = 0, /* the default level of the CIF pin from AK4524 */
  468. .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
  469. .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
  470. .cs_mask = 0,
  471. .cs_addr = 0, /* set later */
  472. .cs_none = 0,
  473. .add_flags = 0,
  474. .mask_flags = 0,
  475. };
  476. static const struct snd_akm4xxx akm_vx442 = {
  477. .type = SND_AK4524,
  478. .num_adcs = 4,
  479. .num_dacs = 4,
  480. .ops = {
  481. .lock = vx442_ak4524_lock,
  482. .set_rate_val = vx442_ak4524_set_rate_val
  483. }
  484. };
  485. static const struct snd_ak4xxx_private akm_vx442_priv = {
  486. .caddr = 2,
  487. .cif = 0,
  488. .data_mask = ICE1712_VX442_DOUT,
  489. .clk_mask = ICE1712_VX442_CCLK,
  490. .cs_mask = 0,
  491. .cs_addr = 0, /* set later */
  492. .cs_none = 0,
  493. .add_flags = 0,
  494. .mask_flags = 0,
  495. };
  496. #ifdef CONFIG_PM_SLEEP
  497. static int snd_ice1712_delta_resume(struct snd_ice1712 *ice)
  498. {
  499. unsigned char akm_img_bak[AK4XXX_IMAGE_SIZE];
  500. unsigned char akm_vol_bak[AK4XXX_IMAGE_SIZE];
  501. /* init spdif */
  502. switch (ice->eeprom.subvendor) {
  503. case ICE1712_SUBDEVICE_AUDIOPHILE:
  504. case ICE1712_SUBDEVICE_DELTA410:
  505. case ICE1712_SUBDEVICE_DELTA1010E:
  506. case ICE1712_SUBDEVICE_DELTA1010LT:
  507. case ICE1712_SUBDEVICE_VX442:
  508. case ICE1712_SUBDEVICE_DELTA66E:
  509. snd_cs8427_init(ice->i2c, ice->cs8427);
  510. break;
  511. case ICE1712_SUBDEVICE_DELTA1010:
  512. case ICE1712_SUBDEVICE_MEDIASTATION:
  513. /* nothing */
  514. break;
  515. case ICE1712_SUBDEVICE_DELTADIO2496:
  516. case ICE1712_SUBDEVICE_DELTA66:
  517. /* Set spdif defaults */
  518. snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
  519. break;
  520. }
  521. /* init codec and restore registers */
  522. if (ice->akm_codecs) {
  523. memcpy(akm_img_bak, ice->akm->images, sizeof(akm_img_bak));
  524. memcpy(akm_vol_bak, ice->akm->volumes, sizeof(akm_vol_bak));
  525. snd_akm4xxx_init(ice->akm);
  526. memcpy(ice->akm->images, akm_img_bak, sizeof(akm_img_bak));
  527. memcpy(ice->akm->volumes, akm_vol_bak, sizeof(akm_vol_bak));
  528. snd_akm4xxx_reset(ice->akm, 0);
  529. }
  530. return 0;
  531. }
  532. static int snd_ice1712_delta_suspend(struct snd_ice1712 *ice)
  533. {
  534. if (ice->akm_codecs) /* reset & mute codec */
  535. snd_akm4xxx_reset(ice->akm, 1);
  536. return 0;
  537. }
  538. #endif
  539. static int snd_ice1712_delta_init(struct snd_ice1712 *ice)
  540. {
  541. int err;
  542. struct snd_akm4xxx *ak;
  543. unsigned char tmp;
  544. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 &&
  545. ice->eeprom.gpiodir == 0x7b)
  546. ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E;
  547. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 &&
  548. ice->eeprom.gpiodir == 0xfb)
  549. ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E;
  550. /* determine I2C, DACs and ADCs */
  551. switch (ice->eeprom.subvendor) {
  552. case ICE1712_SUBDEVICE_AUDIOPHILE:
  553. ice->num_total_dacs = 2;
  554. ice->num_total_adcs = 2;
  555. break;
  556. case ICE1712_SUBDEVICE_DELTA410:
  557. ice->num_total_dacs = 8;
  558. ice->num_total_adcs = 2;
  559. break;
  560. case ICE1712_SUBDEVICE_DELTA44:
  561. case ICE1712_SUBDEVICE_DELTA66:
  562. ice->num_total_dacs = ice->omni ? 8 : 4;
  563. ice->num_total_adcs = ice->omni ? 8 : 4;
  564. break;
  565. case ICE1712_SUBDEVICE_DELTA1010:
  566. case ICE1712_SUBDEVICE_DELTA1010E:
  567. case ICE1712_SUBDEVICE_DELTA1010LT:
  568. case ICE1712_SUBDEVICE_MEDIASTATION:
  569. case ICE1712_SUBDEVICE_EDIROLDA2496:
  570. ice->num_total_dacs = 8;
  571. ice->num_total_adcs = 8;
  572. break;
  573. case ICE1712_SUBDEVICE_DELTADIO2496:
  574. ice->num_total_dacs = 4; /* two AK4324 codecs */
  575. break;
  576. case ICE1712_SUBDEVICE_VX442:
  577. case ICE1712_SUBDEVICE_DELTA66E: /* omni not supported yet */
  578. ice->num_total_dacs = 4;
  579. ice->num_total_adcs = 4;
  580. break;
  581. }
  582. #ifdef CONFIG_PM_SLEEP
  583. ice->pm_resume = snd_ice1712_delta_resume;
  584. ice->pm_suspend = snd_ice1712_delta_suspend;
  585. ice->pm_suspend_enabled = 1;
  586. #endif
  587. /* initialize the SPI clock to high */
  588. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  589. tmp |= ICE1712_DELTA_AP_CCLK;
  590. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  591. udelay(5);
  592. /* initialize spdif */
  593. switch (ice->eeprom.subvendor) {
  594. case ICE1712_SUBDEVICE_AUDIOPHILE:
  595. case ICE1712_SUBDEVICE_DELTA410:
  596. case ICE1712_SUBDEVICE_DELTA1010E:
  597. case ICE1712_SUBDEVICE_DELTA1010LT:
  598. case ICE1712_SUBDEVICE_VX442:
  599. case ICE1712_SUBDEVICE_DELTA66E:
  600. err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c);
  601. if (err < 0) {
  602. dev_err(ice->card->dev, "unable to create I2C bus\n");
  603. return err;
  604. }
  605. ice->i2c->private_data = ice;
  606. ice->i2c->ops = &ap_cs8427_i2c_ops;
  607. err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR);
  608. if (err < 0)
  609. return err;
  610. break;
  611. case ICE1712_SUBDEVICE_DELTA1010:
  612. case ICE1712_SUBDEVICE_MEDIASTATION:
  613. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  614. break;
  615. case ICE1712_SUBDEVICE_DELTADIO2496:
  616. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  617. fallthrough;
  618. case ICE1712_SUBDEVICE_DELTA66:
  619. ice->spdif.ops.open = delta_open_spdif;
  620. ice->spdif.ops.setup_rate = delta_setup_spdif;
  621. ice->spdif.ops.default_get = delta_spdif_default_get;
  622. ice->spdif.ops.default_put = delta_spdif_default_put;
  623. ice->spdif.ops.stream_get = delta_spdif_stream_get;
  624. ice->spdif.ops.stream_put = delta_spdif_stream_put;
  625. /* Set spdif defaults */
  626. snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
  627. break;
  628. }
  629. /* no analog? */
  630. switch (ice->eeprom.subvendor) {
  631. case ICE1712_SUBDEVICE_DELTA1010:
  632. case ICE1712_SUBDEVICE_DELTA1010E:
  633. case ICE1712_SUBDEVICE_DELTADIO2496:
  634. case ICE1712_SUBDEVICE_MEDIASTATION:
  635. return 0;
  636. }
  637. /* second stage of initialization, analog parts and others */
  638. ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  639. if (! ak)
  640. return -ENOMEM;
  641. ice->akm_codecs = 1;
  642. switch (ice->eeprom.subvendor) {
  643. case ICE1712_SUBDEVICE_AUDIOPHILE:
  644. err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
  645. break;
  646. case ICE1712_SUBDEVICE_DELTA410:
  647. err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
  648. break;
  649. case ICE1712_SUBDEVICE_DELTA1010LT:
  650. case ICE1712_SUBDEVICE_EDIROLDA2496:
  651. err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
  652. break;
  653. case ICE1712_SUBDEVICE_DELTA66:
  654. case ICE1712_SUBDEVICE_DELTA44:
  655. err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
  656. break;
  657. case ICE1712_SUBDEVICE_VX442:
  658. err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
  659. break;
  660. case ICE1712_SUBDEVICE_DELTA66E:
  661. err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice);
  662. break;
  663. default:
  664. snd_BUG();
  665. return -EINVAL;
  666. }
  667. return err;
  668. }
  669. /*
  670. * additional controls for M-Audio cards
  671. */
  672. static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select =
  673. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
  674. static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select =
  675. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
  676. static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status =
  677. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  678. static const struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select =
  679. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
  680. static const struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status =
  681. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  682. static int snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
  683. {
  684. int err;
  685. /* 1010 and dio specific controls */
  686. switch (ice->eeprom.subvendor) {
  687. case ICE1712_SUBDEVICE_DELTA1010:
  688. case ICE1712_SUBDEVICE_MEDIASTATION:
  689. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
  690. if (err < 0)
  691. return err;
  692. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
  693. if (err < 0)
  694. return err;
  695. break;
  696. case ICE1712_SUBDEVICE_DELTADIO2496:
  697. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
  698. if (err < 0)
  699. return err;
  700. break;
  701. case ICE1712_SUBDEVICE_DELTA1010E:
  702. case ICE1712_SUBDEVICE_DELTA1010LT:
  703. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
  704. if (err < 0)
  705. return err;
  706. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
  707. if (err < 0)
  708. return err;
  709. break;
  710. }
  711. /* normal spdif controls */
  712. switch (ice->eeprom.subvendor) {
  713. case ICE1712_SUBDEVICE_DELTA1010:
  714. case ICE1712_SUBDEVICE_DELTADIO2496:
  715. case ICE1712_SUBDEVICE_DELTA66:
  716. case ICE1712_SUBDEVICE_MEDIASTATION:
  717. err = snd_ice1712_spdif_build_controls(ice);
  718. if (err < 0)
  719. return err;
  720. break;
  721. }
  722. /* spdif status in */
  723. switch (ice->eeprom.subvendor) {
  724. case ICE1712_SUBDEVICE_DELTA1010:
  725. case ICE1712_SUBDEVICE_DELTADIO2496:
  726. case ICE1712_SUBDEVICE_DELTA66:
  727. case ICE1712_SUBDEVICE_MEDIASTATION:
  728. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
  729. if (err < 0)
  730. return err;
  731. break;
  732. }
  733. /* ak4524 controls */
  734. switch (ice->eeprom.subvendor) {
  735. case ICE1712_SUBDEVICE_DELTA1010LT:
  736. case ICE1712_SUBDEVICE_AUDIOPHILE:
  737. case ICE1712_SUBDEVICE_DELTA410:
  738. case ICE1712_SUBDEVICE_DELTA44:
  739. case ICE1712_SUBDEVICE_DELTA66:
  740. case ICE1712_SUBDEVICE_VX442:
  741. case ICE1712_SUBDEVICE_DELTA66E:
  742. case ICE1712_SUBDEVICE_EDIROLDA2496:
  743. err = snd_ice1712_akm4xxx_build_controls(ice);
  744. if (err < 0)
  745. return err;
  746. break;
  747. }
  748. return 0;
  749. }
  750. /* entry point */
  751. struct snd_ice1712_card_info snd_ice1712_delta_cards[] = {
  752. {
  753. .subvendor = ICE1712_SUBDEVICE_DELTA1010,
  754. .name = "M Audio Delta 1010",
  755. .model = "delta1010",
  756. .chip_init = snd_ice1712_delta_init,
  757. .build_controls = snd_ice1712_delta_add_controls,
  758. },
  759. {
  760. .subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
  761. .name = "M Audio Delta DiO 2496",
  762. .model = "dio2496",
  763. .chip_init = snd_ice1712_delta_init,
  764. .build_controls = snd_ice1712_delta_add_controls,
  765. .no_mpu401 = 1,
  766. },
  767. {
  768. .subvendor = ICE1712_SUBDEVICE_DELTA66,
  769. .name = "M Audio Delta 66",
  770. .model = "delta66",
  771. .chip_init = snd_ice1712_delta_init,
  772. .build_controls = snd_ice1712_delta_add_controls,
  773. .no_mpu401 = 1,
  774. },
  775. {
  776. .subvendor = ICE1712_SUBDEVICE_DELTA44,
  777. .name = "M Audio Delta 44",
  778. .model = "delta44",
  779. .chip_init = snd_ice1712_delta_init,
  780. .build_controls = snd_ice1712_delta_add_controls,
  781. .no_mpu401 = 1,
  782. },
  783. {
  784. .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
  785. .name = "M Audio Audiophile 24/96",
  786. .model = "audiophile",
  787. .chip_init = snd_ice1712_delta_init,
  788. .build_controls = snd_ice1712_delta_add_controls,
  789. },
  790. {
  791. .subvendor = ICE1712_SUBDEVICE_DELTA410,
  792. .name = "M Audio Delta 410",
  793. .model = "delta410",
  794. .chip_init = snd_ice1712_delta_init,
  795. .build_controls = snd_ice1712_delta_add_controls,
  796. },
  797. {
  798. .subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
  799. .name = "M Audio Delta 1010LT",
  800. .model = "delta1010lt",
  801. .chip_init = snd_ice1712_delta_init,
  802. .build_controls = snd_ice1712_delta_add_controls,
  803. },
  804. {
  805. .subvendor = ICE1712_SUBDEVICE_VX442,
  806. .name = "Digigram VX442",
  807. .model = "vx442",
  808. .chip_init = snd_ice1712_delta_init,
  809. .build_controls = snd_ice1712_delta_add_controls,
  810. .no_mpu401 = 1,
  811. },
  812. {
  813. .subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
  814. .name = "Lionstracs Mediastation",
  815. .model = "mediastation",
  816. .chip_init = snd_ice1712_delta_init,
  817. .build_controls = snd_ice1712_delta_add_controls,
  818. },
  819. {
  820. .subvendor = ICE1712_SUBDEVICE_EDIROLDA2496,
  821. .name = "Edirol DA2496",
  822. .model = "da2496",
  823. .chip_init = snd_ice1712_delta_init,
  824. .build_controls = snd_ice1712_delta_add_controls,
  825. },
  826. { } /* terminator */
  827. };