aureon.c 60 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  4. *
  5. * Lowlevel functions for Terratec Aureon cards
  6. *
  7. * Copyright (c) 2003 Takashi Iwai <[email protected]>
  8. *
  9. * NOTES:
  10. *
  11. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  12. * both wm and akm codecs are pretty similar, so we can integrate
  13. * both controls in the future, once if wm codecs are reused in
  14. * many boards.
  15. *
  16. * - DAC digital volumes are not implemented in the mixer.
  17. * if they show better response than DAC analog volumes, we can use them
  18. * instead.
  19. *
  20. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  21. * Copyright (c) 2003 Dimitromanolakis Apostolos <[email protected]>
  22. *
  23. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  24. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  25. * fixed some recording labels (still need to check the rest)
  26. * recording is working probably thanks to correct wm8770 initialization
  27. *
  28. * version 0.5: Initial release:
  29. * working: analog output, mixer, headphone amplifier switch
  30. * not working: prety much everything else, at least i could verify that
  31. * we have no digital output, no capture, pretty bad clicks and poops
  32. * on mixer switch and other coll stuff.
  33. */
  34. #include <linux/delay.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/init.h>
  37. #include <linux/slab.h>
  38. #include <linux/mutex.h>
  39. #include <sound/core.h>
  40. #include "ice1712.h"
  41. #include "envy24ht.h"
  42. #include "aureon.h"
  43. #include <sound/tlv.h>
  44. /* AC97 register cache for Aureon */
  45. struct aureon_spec {
  46. unsigned short stac9744[64];
  47. unsigned int cs8415_mux;
  48. unsigned short master[2];
  49. unsigned short vol[8];
  50. unsigned char pca9554_out;
  51. };
  52. /* WM8770 registers */
  53. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  54. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  55. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  56. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  57. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  58. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  59. #define WM_MUTE 0x14 /* mute controls */
  60. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  61. #define WM_INT_CTRL 0x16 /* interface control */
  62. #define WM_MASTER 0x17 /* master clock and mode */
  63. #define WM_POWERDOWN 0x18 /* power-down controls */
  64. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  65. #define WM_ADC_MUX 0x1b /* input MUX */
  66. #define WM_OUT_MUX1 0x1c /* output MUX */
  67. #define WM_OUT_MUX2 0x1e /* output MUX */
  68. #define WM_RESET 0x1f /* software reset */
  69. /* CS8415A registers */
  70. #define CS8415_CTRL1 0x01
  71. #define CS8415_CTRL2 0x02
  72. #define CS8415_QSUB 0x14
  73. #define CS8415_RATIO 0x1E
  74. #define CS8415_C_BUFFER 0x20
  75. #define CS8415_ID 0x7F
  76. /* PCA9554 registers */
  77. #define PCA9554_DEV 0x40 /* I2C device address */
  78. #define PCA9554_IN 0x00 /* input port */
  79. #define PCA9554_OUT 0x01 /* output port */
  80. #define PCA9554_INVERT 0x02 /* input invert */
  81. #define PCA9554_DIR 0x03 /* port directions */
  82. /*
  83. * Aureon Universe additional controls using PCA9554
  84. */
  85. /*
  86. * Send data to pca9554
  87. */
  88. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  89. unsigned char data)
  90. {
  91. unsigned int tmp;
  92. int i, j;
  93. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  94. unsigned char val = 0;
  95. tmp = snd_ice1712_gpio_read(ice);
  96. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  97. AUREON_WM_RW|AUREON_WM_CS|
  98. AUREON_CS8415_CS));
  99. tmp |= AUREON_WM_RW;
  100. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  101. tmp &= ~AUREON_SPI_MOSI;
  102. tmp &= ~AUREON_SPI_CLK;
  103. snd_ice1712_gpio_write(ice, tmp);
  104. udelay(50);
  105. /*
  106. * send i2c stop condition and start condition
  107. * to obtain sane state
  108. */
  109. tmp |= AUREON_SPI_CLK;
  110. snd_ice1712_gpio_write(ice, tmp);
  111. udelay(50);
  112. tmp |= AUREON_SPI_MOSI;
  113. snd_ice1712_gpio_write(ice, tmp);
  114. udelay(100);
  115. tmp &= ~AUREON_SPI_MOSI;
  116. snd_ice1712_gpio_write(ice, tmp);
  117. udelay(50);
  118. tmp &= ~AUREON_SPI_CLK;
  119. snd_ice1712_gpio_write(ice, tmp);
  120. udelay(100);
  121. /*
  122. * send device address, command and value,
  123. * skipping ack cycles in between
  124. */
  125. for (j = 0; j < 3; j++) {
  126. switch (j) {
  127. case 0:
  128. val = dev;
  129. break;
  130. case 1:
  131. val = reg;
  132. break;
  133. case 2:
  134. val = data;
  135. break;
  136. }
  137. for (i = 7; i >= 0; i--) {
  138. tmp &= ~AUREON_SPI_CLK;
  139. snd_ice1712_gpio_write(ice, tmp);
  140. udelay(40);
  141. if (val & (1 << i))
  142. tmp |= AUREON_SPI_MOSI;
  143. else
  144. tmp &= ~AUREON_SPI_MOSI;
  145. snd_ice1712_gpio_write(ice, tmp);
  146. udelay(40);
  147. tmp |= AUREON_SPI_CLK;
  148. snd_ice1712_gpio_write(ice, tmp);
  149. udelay(40);
  150. }
  151. tmp &= ~AUREON_SPI_CLK;
  152. snd_ice1712_gpio_write(ice, tmp);
  153. udelay(40);
  154. tmp |= AUREON_SPI_CLK;
  155. snd_ice1712_gpio_write(ice, tmp);
  156. udelay(40);
  157. tmp &= ~AUREON_SPI_CLK;
  158. snd_ice1712_gpio_write(ice, tmp);
  159. udelay(40);
  160. }
  161. tmp &= ~AUREON_SPI_CLK;
  162. snd_ice1712_gpio_write(ice, tmp);
  163. udelay(40);
  164. tmp &= ~AUREON_SPI_MOSI;
  165. snd_ice1712_gpio_write(ice, tmp);
  166. udelay(40);
  167. tmp |= AUREON_SPI_CLK;
  168. snd_ice1712_gpio_write(ice, tmp);
  169. udelay(50);
  170. tmp |= AUREON_SPI_MOSI;
  171. snd_ice1712_gpio_write(ice, tmp);
  172. udelay(100);
  173. }
  174. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  175. struct snd_ctl_elem_info *uinfo)
  176. {
  177. static const char * const texts[3] =
  178. {"Internal Aux", "Wavetable", "Rear Line-In"};
  179. return snd_ctl_enum_info(uinfo, 1, 3, texts);
  180. }
  181. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  182. struct snd_ctl_elem_value *ucontrol)
  183. {
  184. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  185. struct aureon_spec *spec = ice->spec;
  186. ucontrol->value.enumerated.item[0] = spec->pca9554_out;
  187. return 0;
  188. }
  189. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_value *ucontrol)
  191. {
  192. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  193. struct aureon_spec *spec = ice->spec;
  194. unsigned char oval, nval;
  195. int change;
  196. nval = ucontrol->value.enumerated.item[0];
  197. if (nval >= 3)
  198. return -EINVAL;
  199. snd_ice1712_save_gpio_status(ice);
  200. oval = spec->pca9554_out;
  201. change = (oval != nval);
  202. if (change) {
  203. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  204. spec->pca9554_out = nval;
  205. }
  206. snd_ice1712_restore_gpio_status(ice);
  207. return change;
  208. }
  209. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  210. unsigned short val)
  211. {
  212. struct aureon_spec *spec = ice->spec;
  213. unsigned int tmp;
  214. /* Send address to XILINX chip */
  215. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  216. snd_ice1712_gpio_write(ice, tmp);
  217. udelay(10);
  218. tmp |= AUREON_AC97_ADDR;
  219. snd_ice1712_gpio_write(ice, tmp);
  220. udelay(10);
  221. tmp &= ~AUREON_AC97_ADDR;
  222. snd_ice1712_gpio_write(ice, tmp);
  223. udelay(10);
  224. /* Send low-order byte to XILINX chip */
  225. tmp &= ~AUREON_AC97_DATA_MASK;
  226. tmp |= val & AUREON_AC97_DATA_MASK;
  227. snd_ice1712_gpio_write(ice, tmp);
  228. udelay(10);
  229. tmp |= AUREON_AC97_DATA_LOW;
  230. snd_ice1712_gpio_write(ice, tmp);
  231. udelay(10);
  232. tmp &= ~AUREON_AC97_DATA_LOW;
  233. snd_ice1712_gpio_write(ice, tmp);
  234. udelay(10);
  235. /* Send high-order byte to XILINX chip */
  236. tmp &= ~AUREON_AC97_DATA_MASK;
  237. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  238. snd_ice1712_gpio_write(ice, tmp);
  239. udelay(10);
  240. tmp |= AUREON_AC97_DATA_HIGH;
  241. snd_ice1712_gpio_write(ice, tmp);
  242. udelay(10);
  243. tmp &= ~AUREON_AC97_DATA_HIGH;
  244. snd_ice1712_gpio_write(ice, tmp);
  245. udelay(10);
  246. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  247. tmp |= AUREON_AC97_COMMIT;
  248. snd_ice1712_gpio_write(ice, tmp);
  249. udelay(10);
  250. tmp &= ~AUREON_AC97_COMMIT;
  251. snd_ice1712_gpio_write(ice, tmp);
  252. udelay(10);
  253. /* Store the data in out private buffer */
  254. spec->stac9744[(reg & 0x7F) >> 1] = val;
  255. }
  256. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  257. {
  258. struct aureon_spec *spec = ice->spec;
  259. return spec->stac9744[(reg & 0x7F) >> 1];
  260. }
  261. /*
  262. * Initialize STAC9744 chip
  263. */
  264. static int aureon_ac97_init(struct snd_ice1712 *ice)
  265. {
  266. struct aureon_spec *spec = ice->spec;
  267. int i;
  268. static const unsigned short ac97_defaults[] = {
  269. 0x00, 0x9640,
  270. 0x02, 0x8000,
  271. 0x04, 0x8000,
  272. 0x06, 0x8000,
  273. 0x0C, 0x8008,
  274. 0x0E, 0x8008,
  275. 0x10, 0x8808,
  276. 0x12, 0x8808,
  277. 0x14, 0x8808,
  278. 0x16, 0x8808,
  279. 0x18, 0x8808,
  280. 0x1C, 0x8000,
  281. 0x26, 0x000F,
  282. 0x28, 0x0201,
  283. 0x2C, 0xBB80,
  284. 0x32, 0xBB80,
  285. 0x7C, 0x8384,
  286. 0x7E, 0x7644,
  287. (unsigned short)-1
  288. };
  289. unsigned int tmp;
  290. /* Cold reset */
  291. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  292. snd_ice1712_gpio_write(ice, tmp);
  293. udelay(3);
  294. tmp &= ~AUREON_AC97_RESET;
  295. snd_ice1712_gpio_write(ice, tmp);
  296. udelay(3);
  297. tmp |= AUREON_AC97_RESET;
  298. snd_ice1712_gpio_write(ice, tmp);
  299. udelay(3);
  300. memset(&spec->stac9744, 0, sizeof(spec->stac9744));
  301. for (i = 0; ac97_defaults[i] != (unsigned short)-1; i += 2)
  302. spec->stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  303. /* Unmute AC'97 master volume permanently - muting is done by WM8770 */
  304. aureon_ac97_write(ice, AC97_MASTER, 0x0000);
  305. return 0;
  306. }
  307. #define AUREON_AC97_STEREO 0x80
  308. /*
  309. * AC'97 volume controls
  310. */
  311. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  312. {
  313. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  314. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  315. uinfo->value.integer.min = 0;
  316. uinfo->value.integer.max = 31;
  317. return 0;
  318. }
  319. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  320. {
  321. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  322. unsigned short vol;
  323. mutex_lock(&ice->gpio_mutex);
  324. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  325. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  326. if (kcontrol->private_value & AUREON_AC97_STEREO)
  327. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  328. mutex_unlock(&ice->gpio_mutex);
  329. return 0;
  330. }
  331. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  332. {
  333. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  334. unsigned short ovol, nvol;
  335. int change;
  336. snd_ice1712_save_gpio_status(ice);
  337. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  338. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  339. if (kcontrol->private_value & AUREON_AC97_STEREO)
  340. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  341. nvol |= ovol & ~0x1F1F;
  342. change = (ovol != nvol);
  343. if (change)
  344. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  345. snd_ice1712_restore_gpio_status(ice);
  346. return change;
  347. }
  348. /*
  349. * AC'97 mute controls
  350. */
  351. #define aureon_ac97_mute_info snd_ctl_boolean_mono_info
  352. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  353. {
  354. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  355. mutex_lock(&ice->gpio_mutex);
  356. ucontrol->value.integer.value[0] = aureon_ac97_read(ice,
  357. kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  358. mutex_unlock(&ice->gpio_mutex);
  359. return 0;
  360. }
  361. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  362. {
  363. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  364. unsigned short ovol, nvol;
  365. int change;
  366. snd_ice1712_save_gpio_status(ice);
  367. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  368. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~0x8000);
  369. change = (ovol != nvol);
  370. if (change)
  371. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  372. snd_ice1712_restore_gpio_status(ice);
  373. return change;
  374. }
  375. /*
  376. * AC'97 mute controls
  377. */
  378. #define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
  379. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  380. {
  381. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  382. mutex_lock(&ice->gpio_mutex);
  383. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  384. mutex_unlock(&ice->gpio_mutex);
  385. return 0;
  386. }
  387. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  388. {
  389. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  390. unsigned short ovol, nvol;
  391. int change;
  392. snd_ice1712_save_gpio_status(ice);
  393. ovol = aureon_ac97_read(ice, AC97_MIC);
  394. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  395. change = (ovol != nvol);
  396. if (change)
  397. aureon_ac97_write(ice, AC97_MIC, nvol);
  398. snd_ice1712_restore_gpio_status(ice);
  399. return change;
  400. }
  401. /*
  402. * write data in the SPI mode
  403. */
  404. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  405. {
  406. unsigned int tmp;
  407. int i;
  408. unsigned int mosi, clk;
  409. tmp = snd_ice1712_gpio_read(ice);
  410. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  411. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  412. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  413. mosi = PRODIGY_SPI_MOSI;
  414. clk = PRODIGY_SPI_CLK;
  415. } else {
  416. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  417. AUREON_WM_CS|AUREON_CS8415_CS));
  418. mosi = AUREON_SPI_MOSI;
  419. clk = AUREON_SPI_CLK;
  420. tmp |= AUREON_WM_RW;
  421. }
  422. tmp &= ~cs;
  423. snd_ice1712_gpio_write(ice, tmp);
  424. udelay(1);
  425. for (i = bits - 1; i >= 0; i--) {
  426. tmp &= ~clk;
  427. snd_ice1712_gpio_write(ice, tmp);
  428. udelay(1);
  429. if (data & (1 << i))
  430. tmp |= mosi;
  431. else
  432. tmp &= ~mosi;
  433. snd_ice1712_gpio_write(ice, tmp);
  434. udelay(1);
  435. tmp |= clk;
  436. snd_ice1712_gpio_write(ice, tmp);
  437. udelay(1);
  438. }
  439. tmp &= ~clk;
  440. tmp |= cs;
  441. snd_ice1712_gpio_write(ice, tmp);
  442. udelay(1);
  443. tmp |= clk;
  444. snd_ice1712_gpio_write(ice, tmp);
  445. udelay(1);
  446. }
  447. /*
  448. * Read data in SPI mode
  449. */
  450. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs,
  451. unsigned int data, int bits, unsigned char *buffer, int size)
  452. {
  453. int i, j;
  454. unsigned int tmp;
  455. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  456. snd_ice1712_gpio_write(ice, tmp);
  457. tmp &= ~cs;
  458. snd_ice1712_gpio_write(ice, tmp);
  459. udelay(1);
  460. for (i = bits-1; i >= 0; i--) {
  461. if (data & (1 << i))
  462. tmp |= AUREON_SPI_MOSI;
  463. else
  464. tmp &= ~AUREON_SPI_MOSI;
  465. snd_ice1712_gpio_write(ice, tmp);
  466. udelay(1);
  467. tmp |= AUREON_SPI_CLK;
  468. snd_ice1712_gpio_write(ice, tmp);
  469. udelay(1);
  470. tmp &= ~AUREON_SPI_CLK;
  471. snd_ice1712_gpio_write(ice, tmp);
  472. udelay(1);
  473. }
  474. for (j = 0; j < size; j++) {
  475. unsigned char outdata = 0;
  476. for (i = 7; i >= 0; i--) {
  477. tmp = snd_ice1712_gpio_read(ice);
  478. outdata <<= 1;
  479. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  480. udelay(1);
  481. tmp |= AUREON_SPI_CLK;
  482. snd_ice1712_gpio_write(ice, tmp);
  483. udelay(1);
  484. tmp &= ~AUREON_SPI_CLK;
  485. snd_ice1712_gpio_write(ice, tmp);
  486. udelay(1);
  487. }
  488. buffer[j] = outdata;
  489. }
  490. tmp |= cs;
  491. snd_ice1712_gpio_write(ice, tmp);
  492. }
  493. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg)
  494. {
  495. unsigned char val;
  496. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  497. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  498. return val;
  499. }
  500. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg,
  501. unsigned char *buffer, int size)
  502. {
  503. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  504. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  505. }
  506. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg,
  507. unsigned char val)
  508. {
  509. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  510. }
  511. /*
  512. * get the current register value of WM codec
  513. */
  514. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  515. {
  516. reg <<= 1;
  517. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  518. ice->akm[0].images[reg + 1];
  519. }
  520. /*
  521. * set the register value of WM codec
  522. */
  523. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  524. {
  525. aureon_spi_write(ice,
  526. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  527. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  528. PRODIGY_WM_CS : AUREON_WM_CS),
  529. (reg << 9) | (val & 0x1ff), 16);
  530. }
  531. /*
  532. * set the register value of WM codec and remember it
  533. */
  534. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  535. {
  536. wm_put_nocache(ice, reg, val);
  537. reg <<= 1;
  538. ice->akm[0].images[reg] = val >> 8;
  539. ice->akm[0].images[reg + 1] = val;
  540. }
  541. /*
  542. */
  543. #define aureon_mono_bool_info snd_ctl_boolean_mono_info
  544. /*
  545. * AC'97 master playback mute controls (Mute on WM8770 chip)
  546. */
  547. #define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
  548. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  549. {
  550. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  551. mutex_lock(&ice->gpio_mutex);
  552. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  553. mutex_unlock(&ice->gpio_mutex);
  554. return 0;
  555. }
  556. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  557. {
  558. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  559. unsigned short ovol, nvol;
  560. int change;
  561. snd_ice1712_save_gpio_status(ice);
  562. ovol = wm_get(ice, WM_OUT_MUX1);
  563. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  564. change = (ovol != nvol);
  565. if (change)
  566. wm_put(ice, WM_OUT_MUX1, nvol);
  567. snd_ice1712_restore_gpio_status(ice);
  568. return change;
  569. }
  570. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -10000, 100, 1);
  571. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  572. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  573. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  574. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  575. #define WM_VOL_MAX 100
  576. #define WM_VOL_CNT 101 /* 0dB .. -100dB */
  577. #define WM_VOL_MUTE 0x8000
  578. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  579. {
  580. unsigned char nvol;
  581. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) {
  582. nvol = 0;
  583. } else {
  584. nvol = ((vol % WM_VOL_CNT) * (master % WM_VOL_CNT)) /
  585. WM_VOL_MAX;
  586. nvol += 0x1b;
  587. }
  588. wm_put(ice, index, nvol);
  589. wm_put_nocache(ice, index, 0x180 | nvol);
  590. }
  591. /*
  592. * DAC mute control
  593. */
  594. #define wm_pcm_mute_info snd_ctl_boolean_mono_info
  595. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  596. {
  597. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  598. mutex_lock(&ice->gpio_mutex);
  599. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  600. mutex_unlock(&ice->gpio_mutex);
  601. return 0;
  602. }
  603. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  604. {
  605. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  606. unsigned short nval, oval;
  607. int change;
  608. snd_ice1712_save_gpio_status(ice);
  609. oval = wm_get(ice, WM_MUTE);
  610. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  611. change = (oval != nval);
  612. if (change)
  613. wm_put(ice, WM_MUTE, nval);
  614. snd_ice1712_restore_gpio_status(ice);
  615. return change;
  616. }
  617. /*
  618. * Master volume attenuation mixer control
  619. */
  620. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  621. {
  622. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  623. uinfo->count = 2;
  624. uinfo->value.integer.min = 0;
  625. uinfo->value.integer.max = WM_VOL_MAX;
  626. return 0;
  627. }
  628. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  629. {
  630. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  631. struct aureon_spec *spec = ice->spec;
  632. int i;
  633. for (i = 0; i < 2; i++)
  634. ucontrol->value.integer.value[i] =
  635. spec->master[i] & ~WM_VOL_MUTE;
  636. return 0;
  637. }
  638. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  639. {
  640. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  641. struct aureon_spec *spec = ice->spec;
  642. int ch, change = 0;
  643. snd_ice1712_save_gpio_status(ice);
  644. for (ch = 0; ch < 2; ch++) {
  645. unsigned int vol = ucontrol->value.integer.value[ch];
  646. if (vol > WM_VOL_MAX)
  647. vol = WM_VOL_MAX;
  648. vol |= spec->master[ch] & WM_VOL_MUTE;
  649. if (vol != spec->master[ch]) {
  650. int dac;
  651. spec->master[ch] = vol;
  652. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  653. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  654. spec->vol[dac + ch],
  655. spec->master[ch]);
  656. change = 1;
  657. }
  658. }
  659. snd_ice1712_restore_gpio_status(ice);
  660. return change;
  661. }
  662. /*
  663. * DAC volume attenuation mixer control
  664. */
  665. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  666. {
  667. int voices = kcontrol->private_value >> 8;
  668. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  669. uinfo->count = voices;
  670. uinfo->value.integer.min = 0; /* mute (-101dB) */
  671. uinfo->value.integer.max = WM_VOL_MAX; /* 0dB */
  672. return 0;
  673. }
  674. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  675. {
  676. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  677. struct aureon_spec *spec = ice->spec;
  678. int i, ofs, voices;
  679. voices = kcontrol->private_value >> 8;
  680. ofs = kcontrol->private_value & 0xff;
  681. for (i = 0; i < voices; i++)
  682. ucontrol->value.integer.value[i] =
  683. spec->vol[ofs+i] & ~WM_VOL_MUTE;
  684. return 0;
  685. }
  686. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  687. {
  688. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  689. struct aureon_spec *spec = ice->spec;
  690. int i, idx, ofs, voices;
  691. int change = 0;
  692. voices = kcontrol->private_value >> 8;
  693. ofs = kcontrol->private_value & 0xff;
  694. snd_ice1712_save_gpio_status(ice);
  695. for (i = 0; i < voices; i++) {
  696. unsigned int vol = ucontrol->value.integer.value[i];
  697. if (vol > WM_VOL_MAX)
  698. vol = WM_VOL_MAX;
  699. vol |= spec->vol[ofs+i] & WM_VOL_MUTE;
  700. if (vol != spec->vol[ofs+i]) {
  701. spec->vol[ofs+i] = vol;
  702. idx = WM_DAC_ATTEN + ofs + i;
  703. wm_set_vol(ice, idx, spec->vol[ofs + i],
  704. spec->master[i]);
  705. change = 1;
  706. }
  707. }
  708. snd_ice1712_restore_gpio_status(ice);
  709. return change;
  710. }
  711. /*
  712. * WM8770 mute control
  713. */
  714. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  715. {
  716. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  717. uinfo->count = kcontrol->private_value >> 8;
  718. uinfo->value.integer.min = 0;
  719. uinfo->value.integer.max = 1;
  720. return 0;
  721. }
  722. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  723. {
  724. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  725. struct aureon_spec *spec = ice->spec;
  726. int voices, ofs, i;
  727. voices = kcontrol->private_value >> 8;
  728. ofs = kcontrol->private_value & 0xFF;
  729. for (i = 0; i < voices; i++)
  730. ucontrol->value.integer.value[i] =
  731. (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  732. return 0;
  733. }
  734. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  735. {
  736. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  737. struct aureon_spec *spec = ice->spec;
  738. int change = 0, voices, ofs, i;
  739. voices = kcontrol->private_value >> 8;
  740. ofs = kcontrol->private_value & 0xFF;
  741. snd_ice1712_save_gpio_status(ice);
  742. for (i = 0; i < voices; i++) {
  743. int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  744. if (ucontrol->value.integer.value[i] != val) {
  745. spec->vol[ofs + i] &= ~WM_VOL_MUTE;
  746. spec->vol[ofs + i] |=
  747. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  748. wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
  749. spec->master[i]);
  750. change = 1;
  751. }
  752. }
  753. snd_ice1712_restore_gpio_status(ice);
  754. return change;
  755. }
  756. /*
  757. * WM8770 master mute control
  758. */
  759. #define wm_master_mute_info snd_ctl_boolean_stereo_info
  760. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  761. {
  762. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  763. struct aureon_spec *spec = ice->spec;
  764. ucontrol->value.integer.value[0] =
  765. (spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
  766. ucontrol->value.integer.value[1] =
  767. (spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
  768. return 0;
  769. }
  770. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  771. {
  772. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  773. struct aureon_spec *spec = ice->spec;
  774. int change = 0, i;
  775. snd_ice1712_save_gpio_status(ice);
  776. for (i = 0; i < 2; i++) {
  777. int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
  778. if (ucontrol->value.integer.value[i] != val) {
  779. int dac;
  780. spec->master[i] &= ~WM_VOL_MUTE;
  781. spec->master[i] |=
  782. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  783. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  784. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  785. spec->vol[dac + i],
  786. spec->master[i]);
  787. change = 1;
  788. }
  789. }
  790. snd_ice1712_restore_gpio_status(ice);
  791. return change;
  792. }
  793. /* digital master volume */
  794. #define PCM_0dB 0xff
  795. #define PCM_RES 128 /* -64dB */
  796. #define PCM_MIN (PCM_0dB - PCM_RES)
  797. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  798. {
  799. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  800. uinfo->count = 1;
  801. uinfo->value.integer.min = 0; /* mute (-64dB) */
  802. uinfo->value.integer.max = PCM_RES; /* 0dB */
  803. return 0;
  804. }
  805. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  806. {
  807. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  808. unsigned short val;
  809. mutex_lock(&ice->gpio_mutex);
  810. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  811. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  812. ucontrol->value.integer.value[0] = val;
  813. mutex_unlock(&ice->gpio_mutex);
  814. return 0;
  815. }
  816. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  817. {
  818. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  819. unsigned short ovol, nvol;
  820. int change = 0;
  821. nvol = ucontrol->value.integer.value[0];
  822. if (nvol > PCM_RES)
  823. return -EINVAL;
  824. snd_ice1712_save_gpio_status(ice);
  825. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  826. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  827. if (ovol != nvol) {
  828. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  829. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  830. change = 1;
  831. }
  832. snd_ice1712_restore_gpio_status(ice);
  833. return change;
  834. }
  835. /*
  836. * ADC mute control
  837. */
  838. #define wm_adc_mute_info snd_ctl_boolean_stereo_info
  839. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  840. {
  841. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  842. unsigned short val;
  843. int i;
  844. mutex_lock(&ice->gpio_mutex);
  845. for (i = 0; i < 2; i++) {
  846. val = wm_get(ice, WM_ADC_GAIN + i);
  847. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  848. }
  849. mutex_unlock(&ice->gpio_mutex);
  850. return 0;
  851. }
  852. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  853. {
  854. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  855. unsigned short new, old;
  856. int i, change = 0;
  857. snd_ice1712_save_gpio_status(ice);
  858. for (i = 0; i < 2; i++) {
  859. old = wm_get(ice, WM_ADC_GAIN + i);
  860. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  861. if (new != old) {
  862. wm_put(ice, WM_ADC_GAIN + i, new);
  863. change = 1;
  864. }
  865. }
  866. snd_ice1712_restore_gpio_status(ice);
  867. return change;
  868. }
  869. /*
  870. * ADC gain mixer control
  871. */
  872. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  873. {
  874. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  875. uinfo->count = 2;
  876. uinfo->value.integer.min = 0; /* -12dB */
  877. uinfo->value.integer.max = 0x1f; /* 19dB */
  878. return 0;
  879. }
  880. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  881. {
  882. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  883. int i, idx;
  884. unsigned short vol;
  885. mutex_lock(&ice->gpio_mutex);
  886. for (i = 0; i < 2; i++) {
  887. idx = WM_ADC_GAIN + i;
  888. vol = wm_get(ice, idx) & 0x1f;
  889. ucontrol->value.integer.value[i] = vol;
  890. }
  891. mutex_unlock(&ice->gpio_mutex);
  892. return 0;
  893. }
  894. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  895. {
  896. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  897. int i, idx;
  898. unsigned short ovol, nvol;
  899. int change = 0;
  900. snd_ice1712_save_gpio_status(ice);
  901. for (i = 0; i < 2; i++) {
  902. idx = WM_ADC_GAIN + i;
  903. nvol = ucontrol->value.integer.value[i] & 0x1f;
  904. ovol = wm_get(ice, idx);
  905. if ((ovol & 0x1f) != nvol) {
  906. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  907. change = 1;
  908. }
  909. }
  910. snd_ice1712_restore_gpio_status(ice);
  911. return change;
  912. }
  913. /*
  914. * ADC input mux mixer control
  915. */
  916. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  917. {
  918. static const char * const texts[] = {
  919. "CD", /* AIN1 */
  920. "Aux", /* AIN2 */
  921. "Line", /* AIN3 */
  922. "Mic", /* AIN4 */
  923. "AC97" /* AIN5 */
  924. };
  925. static const char * const universe_texts[] = {
  926. "Aux1", /* AIN1 */
  927. "CD", /* AIN2 */
  928. "Phono", /* AIN3 */
  929. "Line", /* AIN4 */
  930. "Aux2", /* AIN5 */
  931. "Mic", /* AIN6 */
  932. "Aux3", /* AIN7 */
  933. "AC97" /* AIN8 */
  934. };
  935. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  936. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE)
  937. return snd_ctl_enum_info(uinfo, 2, 8, universe_texts);
  938. else
  939. return snd_ctl_enum_info(uinfo, 2, 5, texts);
  940. }
  941. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  942. {
  943. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  944. unsigned short val;
  945. mutex_lock(&ice->gpio_mutex);
  946. val = wm_get(ice, WM_ADC_MUX);
  947. ucontrol->value.enumerated.item[0] = val & 7;
  948. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  949. mutex_unlock(&ice->gpio_mutex);
  950. return 0;
  951. }
  952. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  953. {
  954. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  955. unsigned short oval, nval;
  956. int change;
  957. snd_ice1712_save_gpio_status(ice);
  958. oval = wm_get(ice, WM_ADC_MUX);
  959. nval = oval & ~0x77;
  960. nval |= ucontrol->value.enumerated.item[0] & 7;
  961. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  962. change = (oval != nval);
  963. if (change)
  964. wm_put(ice, WM_ADC_MUX, nval);
  965. snd_ice1712_restore_gpio_status(ice);
  966. return change;
  967. }
  968. /*
  969. * CS8415 Input mux
  970. */
  971. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  972. {
  973. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  974. static const char * const aureon_texts[] = {
  975. "CD", /* RXP0 */
  976. "Optical" /* RXP1 */
  977. };
  978. static const char * const prodigy_texts[] = {
  979. "CD",
  980. "Coax"
  981. };
  982. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  983. return snd_ctl_enum_info(uinfo, 1, 2, prodigy_texts);
  984. else
  985. return snd_ctl_enum_info(uinfo, 1, 2, aureon_texts);
  986. }
  987. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  988. {
  989. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  990. struct aureon_spec *spec = ice->spec;
  991. /* snd_ice1712_save_gpio_status(ice); */
  992. /* val = aureon_cs8415_get(ice, CS8415_CTRL2); */
  993. ucontrol->value.enumerated.item[0] = spec->cs8415_mux;
  994. /* snd_ice1712_restore_gpio_status(ice); */
  995. return 0;
  996. }
  997. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  998. {
  999. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1000. struct aureon_spec *spec = ice->spec;
  1001. unsigned short oval, nval;
  1002. int change;
  1003. snd_ice1712_save_gpio_status(ice);
  1004. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1005. nval = oval & ~0x07;
  1006. nval |= ucontrol->value.enumerated.item[0] & 7;
  1007. change = (oval != nval);
  1008. if (change)
  1009. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1010. snd_ice1712_restore_gpio_status(ice);
  1011. spec->cs8415_mux = ucontrol->value.enumerated.item[0];
  1012. return change;
  1013. }
  1014. static int aureon_cs8415_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1015. {
  1016. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1017. uinfo->count = 1;
  1018. uinfo->value.integer.min = 0;
  1019. uinfo->value.integer.max = 192000;
  1020. return 0;
  1021. }
  1022. static int aureon_cs8415_rate_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1023. {
  1024. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1025. unsigned char ratio;
  1026. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1027. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1028. return 0;
  1029. }
  1030. /*
  1031. * CS8415A Mute
  1032. */
  1033. #define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
  1034. static int aureon_cs8415_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1035. {
  1036. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1037. snd_ice1712_save_gpio_status(ice);
  1038. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1039. snd_ice1712_restore_gpio_status(ice);
  1040. return 0;
  1041. }
  1042. static int aureon_cs8415_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1043. {
  1044. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1045. unsigned char oval, nval;
  1046. int change;
  1047. snd_ice1712_save_gpio_status(ice);
  1048. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1049. if (ucontrol->value.integer.value[0])
  1050. nval = oval & ~0x20;
  1051. else
  1052. nval = oval | 0x20;
  1053. change = (oval != nval);
  1054. if (change)
  1055. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1056. snd_ice1712_restore_gpio_status(ice);
  1057. return change;
  1058. }
  1059. /*
  1060. * CS8415A Q-Sub info
  1061. */
  1062. static int aureon_cs8415_qsub_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1063. {
  1064. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1065. uinfo->count = 10;
  1066. return 0;
  1067. }
  1068. static int aureon_cs8415_qsub_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1069. {
  1070. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1071. snd_ice1712_save_gpio_status(ice);
  1072. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1073. snd_ice1712_restore_gpio_status(ice);
  1074. return 0;
  1075. }
  1076. static int aureon_cs8415_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1077. {
  1078. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1079. uinfo->count = 1;
  1080. return 0;
  1081. }
  1082. static int aureon_cs8415_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1083. {
  1084. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1085. return 0;
  1086. }
  1087. static int aureon_cs8415_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1088. {
  1089. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1090. snd_ice1712_save_gpio_status(ice);
  1091. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1092. snd_ice1712_restore_gpio_status(ice);
  1093. return 0;
  1094. }
  1095. /*
  1096. * Headphone Amplifier
  1097. */
  1098. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1099. {
  1100. unsigned int tmp, tmp2;
  1101. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1102. if (enable)
  1103. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1104. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1105. tmp |= AUREON_HP_SEL;
  1106. else
  1107. tmp |= PRODIGY_HP_SEL;
  1108. else
  1109. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1110. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1111. tmp &= ~AUREON_HP_SEL;
  1112. else
  1113. tmp &= ~PRODIGY_HP_SEL;
  1114. if (tmp != tmp2) {
  1115. snd_ice1712_gpio_write(ice, tmp);
  1116. return 1;
  1117. }
  1118. return 0;
  1119. }
  1120. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1121. {
  1122. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1123. return (tmp & AUREON_HP_SEL) != 0;
  1124. }
  1125. #define aureon_hpamp_info snd_ctl_boolean_mono_info
  1126. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1127. {
  1128. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1129. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1130. return 0;
  1131. }
  1132. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1133. {
  1134. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1135. return aureon_set_headphone_amp(ice, ucontrol->value.integer.value[0]);
  1136. }
  1137. /*
  1138. * Deemphasis
  1139. */
  1140. #define aureon_deemp_info snd_ctl_boolean_mono_info
  1141. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1142. {
  1143. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1144. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1145. return 0;
  1146. }
  1147. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1148. {
  1149. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1150. int temp, temp2;
  1151. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1152. if (ucontrol->value.integer.value[0])
  1153. temp |= 0xf;
  1154. else
  1155. temp &= ~0xf;
  1156. if (temp != temp2) {
  1157. wm_put(ice, WM_DAC_CTRL2, temp);
  1158. return 1;
  1159. }
  1160. return 0;
  1161. }
  1162. /*
  1163. * ADC Oversampling
  1164. */
  1165. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1166. {
  1167. static const char * const texts[2] = { "128x", "64x" };
  1168. return snd_ctl_enum_info(uinfo, 1, 2, texts);
  1169. }
  1170. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1171. {
  1172. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1173. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1174. return 0;
  1175. }
  1176. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1177. {
  1178. int temp, temp2;
  1179. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1180. temp2 = temp = wm_get(ice, WM_MASTER);
  1181. if (ucontrol->value.enumerated.item[0])
  1182. temp |= 0x8;
  1183. else
  1184. temp &= ~0x8;
  1185. if (temp != temp2) {
  1186. wm_put(ice, WM_MASTER, temp);
  1187. return 1;
  1188. }
  1189. return 0;
  1190. }
  1191. /*
  1192. * mixers
  1193. */
  1194. static const struct snd_kcontrol_new aureon_dac_controls[] = {
  1195. {
  1196. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1197. .name = "Master Playback Switch",
  1198. .info = wm_master_mute_info,
  1199. .get = wm_master_mute_get,
  1200. .put = wm_master_mute_put
  1201. },
  1202. {
  1203. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1204. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1205. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1206. .name = "Master Playback Volume",
  1207. .info = wm_master_vol_info,
  1208. .get = wm_master_vol_get,
  1209. .put = wm_master_vol_put,
  1210. .tlv = { .p = db_scale_wm_dac }
  1211. },
  1212. {
  1213. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1214. .name = "Front Playback Switch",
  1215. .info = wm_mute_info,
  1216. .get = wm_mute_get,
  1217. .put = wm_mute_put,
  1218. .private_value = (2 << 8) | 0
  1219. },
  1220. {
  1221. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1222. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1223. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1224. .name = "Front Playback Volume",
  1225. .info = wm_vol_info,
  1226. .get = wm_vol_get,
  1227. .put = wm_vol_put,
  1228. .private_value = (2 << 8) | 0,
  1229. .tlv = { .p = db_scale_wm_dac }
  1230. },
  1231. {
  1232. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1233. .name = "Rear Playback Switch",
  1234. .info = wm_mute_info,
  1235. .get = wm_mute_get,
  1236. .put = wm_mute_put,
  1237. .private_value = (2 << 8) | 2
  1238. },
  1239. {
  1240. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1241. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1242. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1243. .name = "Rear Playback Volume",
  1244. .info = wm_vol_info,
  1245. .get = wm_vol_get,
  1246. .put = wm_vol_put,
  1247. .private_value = (2 << 8) | 2,
  1248. .tlv = { .p = db_scale_wm_dac }
  1249. },
  1250. {
  1251. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1252. .name = "Center Playback Switch",
  1253. .info = wm_mute_info,
  1254. .get = wm_mute_get,
  1255. .put = wm_mute_put,
  1256. .private_value = (1 << 8) | 4
  1257. },
  1258. {
  1259. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1260. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1261. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1262. .name = "Center Playback Volume",
  1263. .info = wm_vol_info,
  1264. .get = wm_vol_get,
  1265. .put = wm_vol_put,
  1266. .private_value = (1 << 8) | 4,
  1267. .tlv = { .p = db_scale_wm_dac }
  1268. },
  1269. {
  1270. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1271. .name = "LFE Playback Switch",
  1272. .info = wm_mute_info,
  1273. .get = wm_mute_get,
  1274. .put = wm_mute_put,
  1275. .private_value = (1 << 8) | 5
  1276. },
  1277. {
  1278. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1279. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1280. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1281. .name = "LFE Playback Volume",
  1282. .info = wm_vol_info,
  1283. .get = wm_vol_get,
  1284. .put = wm_vol_put,
  1285. .private_value = (1 << 8) | 5,
  1286. .tlv = { .p = db_scale_wm_dac }
  1287. },
  1288. {
  1289. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1290. .name = "Side Playback Switch",
  1291. .info = wm_mute_info,
  1292. .get = wm_mute_get,
  1293. .put = wm_mute_put,
  1294. .private_value = (2 << 8) | 6
  1295. },
  1296. {
  1297. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1298. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1299. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1300. .name = "Side Playback Volume",
  1301. .info = wm_vol_info,
  1302. .get = wm_vol_get,
  1303. .put = wm_vol_put,
  1304. .private_value = (2 << 8) | 6,
  1305. .tlv = { .p = db_scale_wm_dac }
  1306. }
  1307. };
  1308. static const struct snd_kcontrol_new wm_controls[] = {
  1309. {
  1310. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1311. .name = "PCM Playback Switch",
  1312. .info = wm_pcm_mute_info,
  1313. .get = wm_pcm_mute_get,
  1314. .put = wm_pcm_mute_put
  1315. },
  1316. {
  1317. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1318. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1319. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1320. .name = "PCM Playback Volume",
  1321. .info = wm_pcm_vol_info,
  1322. .get = wm_pcm_vol_get,
  1323. .put = wm_pcm_vol_put,
  1324. .tlv = { .p = db_scale_wm_pcm }
  1325. },
  1326. {
  1327. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1328. .name = "Capture Switch",
  1329. .info = wm_adc_mute_info,
  1330. .get = wm_adc_mute_get,
  1331. .put = wm_adc_mute_put,
  1332. },
  1333. {
  1334. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1335. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1336. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1337. .name = "Capture Volume",
  1338. .info = wm_adc_vol_info,
  1339. .get = wm_adc_vol_get,
  1340. .put = wm_adc_vol_put,
  1341. .tlv = { .p = db_scale_wm_adc }
  1342. },
  1343. {
  1344. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1345. .name = "Capture Source",
  1346. .info = wm_adc_mux_info,
  1347. .get = wm_adc_mux_get,
  1348. .put = wm_adc_mux_put,
  1349. .private_value = 5
  1350. },
  1351. {
  1352. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1353. .name = "External Amplifier",
  1354. .info = aureon_hpamp_info,
  1355. .get = aureon_hpamp_get,
  1356. .put = aureon_hpamp_put
  1357. },
  1358. {
  1359. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1360. .name = "DAC Deemphasis Switch",
  1361. .info = aureon_deemp_info,
  1362. .get = aureon_deemp_get,
  1363. .put = aureon_deemp_put
  1364. },
  1365. {
  1366. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1367. .name = "ADC Oversampling",
  1368. .info = aureon_oversampling_info,
  1369. .get = aureon_oversampling_get,
  1370. .put = aureon_oversampling_put
  1371. }
  1372. };
  1373. static const struct snd_kcontrol_new ac97_controls[] = {
  1374. {
  1375. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1376. .name = "AC97 Playback Switch",
  1377. .info = aureon_ac97_mmute_info,
  1378. .get = aureon_ac97_mmute_get,
  1379. .put = aureon_ac97_mmute_put,
  1380. .private_value = AC97_MASTER
  1381. },
  1382. {
  1383. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1384. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1385. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1386. .name = "AC97 Playback Volume",
  1387. .info = aureon_ac97_vol_info,
  1388. .get = aureon_ac97_vol_get,
  1389. .put = aureon_ac97_vol_put,
  1390. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1391. .tlv = { .p = db_scale_ac97_master }
  1392. },
  1393. {
  1394. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1395. .name = "CD Playback Switch",
  1396. .info = aureon_ac97_mute_info,
  1397. .get = aureon_ac97_mute_get,
  1398. .put = aureon_ac97_mute_put,
  1399. .private_value = AC97_CD
  1400. },
  1401. {
  1402. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1403. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1404. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1405. .name = "CD Playback Volume",
  1406. .info = aureon_ac97_vol_info,
  1407. .get = aureon_ac97_vol_get,
  1408. .put = aureon_ac97_vol_put,
  1409. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1410. .tlv = { .p = db_scale_ac97_gain }
  1411. },
  1412. {
  1413. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1414. .name = "Aux Playback Switch",
  1415. .info = aureon_ac97_mute_info,
  1416. .get = aureon_ac97_mute_get,
  1417. .put = aureon_ac97_mute_put,
  1418. .private_value = AC97_AUX,
  1419. },
  1420. {
  1421. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1422. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1423. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1424. .name = "Aux Playback Volume",
  1425. .info = aureon_ac97_vol_info,
  1426. .get = aureon_ac97_vol_get,
  1427. .put = aureon_ac97_vol_put,
  1428. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1429. .tlv = { .p = db_scale_ac97_gain }
  1430. },
  1431. {
  1432. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1433. .name = "Line Playback Switch",
  1434. .info = aureon_ac97_mute_info,
  1435. .get = aureon_ac97_mute_get,
  1436. .put = aureon_ac97_mute_put,
  1437. .private_value = AC97_LINE
  1438. },
  1439. {
  1440. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1441. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1442. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1443. .name = "Line Playback Volume",
  1444. .info = aureon_ac97_vol_info,
  1445. .get = aureon_ac97_vol_get,
  1446. .put = aureon_ac97_vol_put,
  1447. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1448. .tlv = { .p = db_scale_ac97_gain }
  1449. },
  1450. {
  1451. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1452. .name = "Mic Playback Switch",
  1453. .info = aureon_ac97_mute_info,
  1454. .get = aureon_ac97_mute_get,
  1455. .put = aureon_ac97_mute_put,
  1456. .private_value = AC97_MIC
  1457. },
  1458. {
  1459. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1460. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1461. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1462. .name = "Mic Playback Volume",
  1463. .info = aureon_ac97_vol_info,
  1464. .get = aureon_ac97_vol_get,
  1465. .put = aureon_ac97_vol_put,
  1466. .private_value = AC97_MIC,
  1467. .tlv = { .p = db_scale_ac97_gain }
  1468. },
  1469. {
  1470. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1471. .name = "Mic Boost (+20dB)",
  1472. .info = aureon_ac97_micboost_info,
  1473. .get = aureon_ac97_micboost_get,
  1474. .put = aureon_ac97_micboost_put
  1475. }
  1476. };
  1477. static const struct snd_kcontrol_new universe_ac97_controls[] = {
  1478. {
  1479. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1480. .name = "AC97 Playback Switch",
  1481. .info = aureon_ac97_mmute_info,
  1482. .get = aureon_ac97_mmute_get,
  1483. .put = aureon_ac97_mmute_put,
  1484. .private_value = AC97_MASTER
  1485. },
  1486. {
  1487. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1488. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1489. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1490. .name = "AC97 Playback Volume",
  1491. .info = aureon_ac97_vol_info,
  1492. .get = aureon_ac97_vol_get,
  1493. .put = aureon_ac97_vol_put,
  1494. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1495. .tlv = { .p = db_scale_ac97_master }
  1496. },
  1497. {
  1498. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1499. .name = "CD Playback Switch",
  1500. .info = aureon_ac97_mute_info,
  1501. .get = aureon_ac97_mute_get,
  1502. .put = aureon_ac97_mute_put,
  1503. .private_value = AC97_AUX
  1504. },
  1505. {
  1506. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1507. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1508. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1509. .name = "CD Playback Volume",
  1510. .info = aureon_ac97_vol_info,
  1511. .get = aureon_ac97_vol_get,
  1512. .put = aureon_ac97_vol_put,
  1513. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1514. .tlv = { .p = db_scale_ac97_gain }
  1515. },
  1516. {
  1517. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1518. .name = "Phono Playback Switch",
  1519. .info = aureon_ac97_mute_info,
  1520. .get = aureon_ac97_mute_get,
  1521. .put = aureon_ac97_mute_put,
  1522. .private_value = AC97_CD
  1523. },
  1524. {
  1525. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1526. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1527. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1528. .name = "Phono Playback Volume",
  1529. .info = aureon_ac97_vol_info,
  1530. .get = aureon_ac97_vol_get,
  1531. .put = aureon_ac97_vol_put,
  1532. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1533. .tlv = { .p = db_scale_ac97_gain }
  1534. },
  1535. {
  1536. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1537. .name = "Line Playback Switch",
  1538. .info = aureon_ac97_mute_info,
  1539. .get = aureon_ac97_mute_get,
  1540. .put = aureon_ac97_mute_put,
  1541. .private_value = AC97_LINE
  1542. },
  1543. {
  1544. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1545. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1546. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1547. .name = "Line Playback Volume",
  1548. .info = aureon_ac97_vol_info,
  1549. .get = aureon_ac97_vol_get,
  1550. .put = aureon_ac97_vol_put,
  1551. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1552. .tlv = { .p = db_scale_ac97_gain }
  1553. },
  1554. {
  1555. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1556. .name = "Mic Playback Switch",
  1557. .info = aureon_ac97_mute_info,
  1558. .get = aureon_ac97_mute_get,
  1559. .put = aureon_ac97_mute_put,
  1560. .private_value = AC97_MIC
  1561. },
  1562. {
  1563. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1564. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1565. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1566. .name = "Mic Playback Volume",
  1567. .info = aureon_ac97_vol_info,
  1568. .get = aureon_ac97_vol_get,
  1569. .put = aureon_ac97_vol_put,
  1570. .private_value = AC97_MIC,
  1571. .tlv = { .p = db_scale_ac97_gain }
  1572. },
  1573. {
  1574. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1575. .name = "Mic Boost (+20dB)",
  1576. .info = aureon_ac97_micboost_info,
  1577. .get = aureon_ac97_micboost_get,
  1578. .put = aureon_ac97_micboost_put
  1579. },
  1580. {
  1581. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1582. .name = "Aux Playback Switch",
  1583. .info = aureon_ac97_mute_info,
  1584. .get = aureon_ac97_mute_get,
  1585. .put = aureon_ac97_mute_put,
  1586. .private_value = AC97_VIDEO,
  1587. },
  1588. {
  1589. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1590. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1591. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1592. .name = "Aux Playback Volume",
  1593. .info = aureon_ac97_vol_info,
  1594. .get = aureon_ac97_vol_get,
  1595. .put = aureon_ac97_vol_put,
  1596. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1597. .tlv = { .p = db_scale_ac97_gain }
  1598. },
  1599. {
  1600. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1601. .name = "Aux Source",
  1602. .info = aureon_universe_inmux_info,
  1603. .get = aureon_universe_inmux_get,
  1604. .put = aureon_universe_inmux_put
  1605. }
  1606. };
  1607. static const struct snd_kcontrol_new cs8415_controls[] = {
  1608. {
  1609. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1610. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, SWITCH),
  1611. .info = aureon_cs8415_mute_info,
  1612. .get = aureon_cs8415_mute_get,
  1613. .put = aureon_cs8415_mute_put
  1614. },
  1615. {
  1616. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1617. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Source",
  1618. .info = aureon_cs8415_mux_info,
  1619. .get = aureon_cs8415_mux_get,
  1620. .put = aureon_cs8415_mux_put,
  1621. },
  1622. {
  1623. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1624. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ", CAPTURE, DEFAULT),
  1625. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1626. .info = aureon_cs8415_qsub_info,
  1627. .get = aureon_cs8415_qsub_get,
  1628. },
  1629. {
  1630. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1631. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  1632. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1633. .info = aureon_cs8415_spdif_info,
  1634. .get = aureon_cs8415_mask_get
  1635. },
  1636. {
  1637. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1638. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  1639. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1640. .info = aureon_cs8415_spdif_info,
  1641. .get = aureon_cs8415_spdif_get
  1642. },
  1643. {
  1644. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1645. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Rate",
  1646. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1647. .info = aureon_cs8415_rate_info,
  1648. .get = aureon_cs8415_rate_get
  1649. }
  1650. };
  1651. static int aureon_add_controls(struct snd_ice1712 *ice)
  1652. {
  1653. unsigned int i, counts;
  1654. int err;
  1655. counts = ARRAY_SIZE(aureon_dac_controls);
  1656. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1657. counts -= 2; /* no side */
  1658. for (i = 0; i < counts; i++) {
  1659. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1660. if (err < 0)
  1661. return err;
  1662. }
  1663. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1664. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1665. if (err < 0)
  1666. return err;
  1667. }
  1668. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1669. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1670. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1671. if (err < 0)
  1672. return err;
  1673. }
  1674. } else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1675. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1676. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1677. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1678. if (err < 0)
  1679. return err;
  1680. }
  1681. }
  1682. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1683. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1684. unsigned char id;
  1685. snd_ice1712_save_gpio_status(ice);
  1686. id = aureon_cs8415_get(ice, CS8415_ID);
  1687. snd_ice1712_restore_gpio_status(ice);
  1688. if (id != 0x41)
  1689. dev_info(ice->card->dev,
  1690. "No CS8415 chip. Skipping CS8415 controls.\n");
  1691. else if ((id & 0x0F) != 0x01)
  1692. dev_info(ice->card->dev,
  1693. "Detected unsupported CS8415 rev. (%c)\n",
  1694. (char)((id & 0x0F) + 'A' - 1));
  1695. else {
  1696. for (i = 0; i < ARRAY_SIZE(cs8415_controls); i++) {
  1697. struct snd_kcontrol *kctl;
  1698. kctl = snd_ctl_new1(&cs8415_controls[i], ice);
  1699. if (i > 1)
  1700. kctl->id.device = ice->pcm->device;
  1701. err = snd_ctl_add(ice->card, kctl);
  1702. if (err < 0)
  1703. return err;
  1704. }
  1705. }
  1706. }
  1707. return 0;
  1708. }
  1709. /*
  1710. * reset the chip
  1711. */
  1712. static int aureon_reset(struct snd_ice1712 *ice)
  1713. {
  1714. static const unsigned short wm_inits_aureon[] = {
  1715. /* These come first to reduce init pop noise */
  1716. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1717. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1718. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1719. 0x18, 0x000, /* All power-up */
  1720. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1721. 0x17, 0x022, /* 256fs, slave mode */
  1722. 0x00, 0, /* DAC1 analog mute */
  1723. 0x01, 0, /* DAC2 analog mute */
  1724. 0x02, 0, /* DAC3 analog mute */
  1725. 0x03, 0, /* DAC4 analog mute */
  1726. 0x04, 0, /* DAC5 analog mute */
  1727. 0x05, 0, /* DAC6 analog mute */
  1728. 0x06, 0, /* DAC7 analog mute */
  1729. 0x07, 0, /* DAC8 analog mute */
  1730. 0x08, 0x100, /* master analog mute */
  1731. 0x09, 0xff, /* DAC1 digital full */
  1732. 0x0a, 0xff, /* DAC2 digital full */
  1733. 0x0b, 0xff, /* DAC3 digital full */
  1734. 0x0c, 0xff, /* DAC4 digital full */
  1735. 0x0d, 0xff, /* DAC5 digital full */
  1736. 0x0e, 0xff, /* DAC6 digital full */
  1737. 0x0f, 0xff, /* DAC7 digital full */
  1738. 0x10, 0xff, /* DAC8 digital full */
  1739. 0x11, 0x1ff, /* master digital full */
  1740. 0x12, 0x000, /* phase normal */
  1741. 0x13, 0x090, /* unmute DAC L/R */
  1742. 0x14, 0x000, /* all unmute */
  1743. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1744. 0x19, 0x000, /* -12dB ADC/L */
  1745. 0x1a, 0x000, /* -12dB ADC/R */
  1746. (unsigned short)-1
  1747. };
  1748. static const unsigned short wm_inits_prodigy[] = {
  1749. /* These come first to reduce init pop noise */
  1750. 0x1b, 0x000, /* ADC Mux */
  1751. 0x1c, 0x009, /* Out Mux1 */
  1752. 0x1d, 0x009, /* Out Mux2 */
  1753. 0x18, 0x000, /* All power-up */
  1754. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1755. 0x17, 0x006, /* 128fs, slave mode */
  1756. 0x00, 0, /* DAC1 analog mute */
  1757. 0x01, 0, /* DAC2 analog mute */
  1758. 0x02, 0, /* DAC3 analog mute */
  1759. 0x03, 0, /* DAC4 analog mute */
  1760. 0x04, 0, /* DAC5 analog mute */
  1761. 0x05, 0, /* DAC6 analog mute */
  1762. 0x06, 0, /* DAC7 analog mute */
  1763. 0x07, 0, /* DAC8 analog mute */
  1764. 0x08, 0x100, /* master analog mute */
  1765. 0x09, 0x7f, /* DAC1 digital full */
  1766. 0x0a, 0x7f, /* DAC2 digital full */
  1767. 0x0b, 0x7f, /* DAC3 digital full */
  1768. 0x0c, 0x7f, /* DAC4 digital full */
  1769. 0x0d, 0x7f, /* DAC5 digital full */
  1770. 0x0e, 0x7f, /* DAC6 digital full */
  1771. 0x0f, 0x7f, /* DAC7 digital full */
  1772. 0x10, 0x7f, /* DAC8 digital full */
  1773. 0x11, 0x1FF, /* master digital full */
  1774. 0x12, 0x000, /* phase normal */
  1775. 0x13, 0x090, /* unmute DAC L/R */
  1776. 0x14, 0x000, /* all unmute */
  1777. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1778. 0x19, 0x000, /* -12dB ADC/L */
  1779. 0x1a, 0x000, /* -12dB ADC/R */
  1780. (unsigned short)-1
  1781. };
  1782. static const unsigned short cs_inits[] = {
  1783. 0x0441, /* RUN */
  1784. 0x0180, /* no mute, OMCK output on RMCK pin */
  1785. 0x0201, /* S/PDIF source on RXP1 */
  1786. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1787. (unsigned short)-1
  1788. };
  1789. unsigned int tmp;
  1790. const unsigned short *p;
  1791. int err;
  1792. struct aureon_spec *spec = ice->spec;
  1793. err = aureon_ac97_init(ice);
  1794. if (err != 0)
  1795. return err;
  1796. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1797. /* reset the wm codec as the SPI mode */
  1798. snd_ice1712_save_gpio_status(ice);
  1799. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1800. tmp = snd_ice1712_gpio_read(ice);
  1801. tmp &= ~AUREON_WM_RESET;
  1802. snd_ice1712_gpio_write(ice, tmp);
  1803. udelay(1);
  1804. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1805. snd_ice1712_gpio_write(ice, tmp);
  1806. udelay(1);
  1807. tmp |= AUREON_WM_RESET;
  1808. snd_ice1712_gpio_write(ice, tmp);
  1809. udelay(1);
  1810. /* initialize WM8770 codec */
  1811. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1812. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1813. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1814. p = wm_inits_prodigy;
  1815. else
  1816. p = wm_inits_aureon;
  1817. for (; *p != (unsigned short)-1; p += 2)
  1818. wm_put(ice, p[0], p[1]);
  1819. /* initialize CS8415A codec */
  1820. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1821. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1822. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1823. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1824. spec->cs8415_mux = 1;
  1825. aureon_set_headphone_amp(ice, 1);
  1826. }
  1827. snd_ice1712_restore_gpio_status(ice);
  1828. /* initialize PCA9554 pin directions & set default input */
  1829. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1830. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1831. return 0;
  1832. }
  1833. /*
  1834. * suspend/resume
  1835. */
  1836. #ifdef CONFIG_PM_SLEEP
  1837. static int aureon_resume(struct snd_ice1712 *ice)
  1838. {
  1839. struct aureon_spec *spec = ice->spec;
  1840. int err, i;
  1841. err = aureon_reset(ice);
  1842. if (err != 0)
  1843. return err;
  1844. /* workaround for poking volume with alsamixer after resume:
  1845. * just set stored volume again */
  1846. for (i = 0; i < ice->num_total_dacs; i++)
  1847. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1848. return 0;
  1849. }
  1850. #endif
  1851. /*
  1852. * initialize the chip
  1853. */
  1854. static int aureon_init(struct snd_ice1712 *ice)
  1855. {
  1856. struct aureon_spec *spec;
  1857. int i, err;
  1858. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1859. if (!spec)
  1860. return -ENOMEM;
  1861. ice->spec = spec;
  1862. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1863. ice->num_total_dacs = 6;
  1864. ice->num_total_adcs = 2;
  1865. } else {
  1866. /* aureon 7.1 and prodigy 7.1 */
  1867. ice->num_total_dacs = 8;
  1868. ice->num_total_adcs = 2;
  1869. }
  1870. /* to remember the register values of CS8415 */
  1871. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1872. if (!ice->akm)
  1873. return -ENOMEM;
  1874. ice->akm_codecs = 1;
  1875. err = aureon_reset(ice);
  1876. if (err != 0)
  1877. return err;
  1878. spec->master[0] = WM_VOL_MUTE;
  1879. spec->master[1] = WM_VOL_MUTE;
  1880. for (i = 0; i < ice->num_total_dacs; i++) {
  1881. spec->vol[i] = WM_VOL_MUTE;
  1882. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1883. }
  1884. #ifdef CONFIG_PM_SLEEP
  1885. ice->pm_resume = aureon_resume;
  1886. ice->pm_suspend_enabled = 1;
  1887. #endif
  1888. return 0;
  1889. }
  1890. /*
  1891. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1892. * hence the driver needs to sets up it properly.
  1893. */
  1894. static const unsigned char aureon51_eeprom[] = {
  1895. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1896. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1897. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1898. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1899. [ICE_EEP2_GPIO_DIR] = 0xff,
  1900. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1901. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1902. [ICE_EEP2_GPIO_MASK] = 0x00,
  1903. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1904. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1905. [ICE_EEP2_GPIO_STATE] = 0x00,
  1906. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1907. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1908. };
  1909. static const unsigned char aureon71_eeprom[] = {
  1910. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1911. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1912. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1913. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1914. [ICE_EEP2_GPIO_DIR] = 0xff,
  1915. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1916. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1917. [ICE_EEP2_GPIO_MASK] = 0x00,
  1918. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1919. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1920. [ICE_EEP2_GPIO_STATE] = 0x00,
  1921. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1922. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1923. };
  1924. #define prodigy71_eeprom aureon71_eeprom
  1925. static const unsigned char aureon71_universe_eeprom[] = {
  1926. [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, spdif-in/ADC,
  1927. * 4DACs
  1928. */
  1929. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1930. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1931. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1932. [ICE_EEP2_GPIO_DIR] = 0xff,
  1933. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1934. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1935. [ICE_EEP2_GPIO_MASK] = 0x00,
  1936. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1937. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1938. [ICE_EEP2_GPIO_STATE] = 0x00,
  1939. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1940. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1941. };
  1942. static const unsigned char prodigy71lt_eeprom[] = {
  1943. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1944. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1945. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1946. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1947. [ICE_EEP2_GPIO_DIR] = 0xff,
  1948. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1949. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1950. [ICE_EEP2_GPIO_MASK] = 0x00,
  1951. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1952. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1953. [ICE_EEP2_GPIO_STATE] = 0x00,
  1954. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1955. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1956. };
  1957. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1958. /* entry point */
  1959. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] = {
  1960. {
  1961. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1962. .name = "Terratec Aureon 5.1-Sky",
  1963. .model = "aureon51",
  1964. .chip_init = aureon_init,
  1965. .build_controls = aureon_add_controls,
  1966. .eeprom_size = sizeof(aureon51_eeprom),
  1967. .eeprom_data = aureon51_eeprom,
  1968. .driver = "Aureon51",
  1969. },
  1970. {
  1971. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1972. .name = "Terratec Aureon 7.1-Space",
  1973. .model = "aureon71",
  1974. .chip_init = aureon_init,
  1975. .build_controls = aureon_add_controls,
  1976. .eeprom_size = sizeof(aureon71_eeprom),
  1977. .eeprom_data = aureon71_eeprom,
  1978. .driver = "Aureon71",
  1979. },
  1980. {
  1981. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1982. .name = "Terratec Aureon 7.1-Universe",
  1983. .model = "universe",
  1984. .chip_init = aureon_init,
  1985. .build_controls = aureon_add_controls,
  1986. .eeprom_size = sizeof(aureon71_universe_eeprom),
  1987. .eeprom_data = aureon71_universe_eeprom,
  1988. .driver = "Aureon71Univ", /* keep in 15 letters */
  1989. },
  1990. {
  1991. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  1992. .name = "Audiotrak Prodigy 7.1",
  1993. .model = "prodigy71",
  1994. .chip_init = aureon_init,
  1995. .build_controls = aureon_add_controls,
  1996. .eeprom_size = sizeof(prodigy71_eeprom),
  1997. .eeprom_data = prodigy71_eeprom,
  1998. .driver = "Prodigy71", /* should be identical with Aureon71 */
  1999. },
  2000. {
  2001. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  2002. .name = "Audiotrak Prodigy 7.1 LT",
  2003. .model = "prodigy71lt",
  2004. .chip_init = aureon_init,
  2005. .build_controls = aureon_add_controls,
  2006. .eeprom_size = sizeof(prodigy71lt_eeprom),
  2007. .eeprom_data = prodigy71lt_eeprom,
  2008. .driver = "Prodigy71LT",
  2009. },
  2010. {
  2011. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  2012. .name = "Audiotrak Prodigy 7.1 XT",
  2013. .model = "prodigy71xt",
  2014. .chip_init = aureon_init,
  2015. .build_controls = aureon_add_controls,
  2016. .eeprom_size = sizeof(prodigy71xt_eeprom),
  2017. .eeprom_data = prodigy71xt_eeprom,
  2018. .driver = "Prodigy71LT",
  2019. },
  2020. { } /* terminator */
  2021. };