patch_cirrus.c 32 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * HD audio interface patch for Cirrus Logic CS420x chip
  4. *
  5. * Copyright (c) 2009 Takashi Iwai <[email protected]>
  6. */
  7. #include <linux/init.h>
  8. #include <linux/slab.h>
  9. #include <linux/module.h>
  10. #include <sound/core.h>
  11. #include <linux/pci.h>
  12. #include <sound/tlv.h>
  13. #include <sound/hda_codec.h>
  14. #include "hda_local.h"
  15. #include "hda_auto_parser.h"
  16. #include "hda_jack.h"
  17. #include "hda_generic.h"
  18. /*
  19. */
  20. struct cs_spec {
  21. struct hda_gen_spec gen;
  22. unsigned int gpio_mask;
  23. unsigned int gpio_dir;
  24. unsigned int gpio_data;
  25. unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
  26. unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
  27. /* CS421x */
  28. unsigned int spdif_detect:1;
  29. unsigned int spdif_present:1;
  30. unsigned int sense_b:1;
  31. hda_nid_t vendor_nid;
  32. /* for MBP SPDIF control */
  33. int (*spdif_sw_put)(struct snd_kcontrol *kcontrol,
  34. struct snd_ctl_elem_value *ucontrol);
  35. };
  36. /* available models with CS420x */
  37. enum {
  38. CS420X_MBP53,
  39. CS420X_MBP55,
  40. CS420X_IMAC27,
  41. CS420X_GPIO_13,
  42. CS420X_GPIO_23,
  43. CS420X_MBP101,
  44. CS420X_MBP81,
  45. CS420X_MBA42,
  46. CS420X_AUTO,
  47. /* aliases */
  48. CS420X_IMAC27_122 = CS420X_GPIO_23,
  49. CS420X_APPLE = CS420X_GPIO_13,
  50. };
  51. /* CS421x boards */
  52. enum {
  53. CS421X_CDB4210,
  54. CS421X_SENSE_B,
  55. CS421X_STUMPY,
  56. };
  57. /* Vendor-specific processing widget */
  58. #define CS420X_VENDOR_NID 0x11
  59. #define CS_DIG_OUT1_PIN_NID 0x10
  60. #define CS_DIG_OUT2_PIN_NID 0x15
  61. #define CS_DMIC1_PIN_NID 0x0e
  62. #define CS_DMIC2_PIN_NID 0x12
  63. /* coef indices */
  64. #define IDX_SPDIF_STAT 0x0000
  65. #define IDX_SPDIF_CTL 0x0001
  66. #define IDX_ADC_CFG 0x0002
  67. /* SZC bitmask, 4 modes below:
  68. * 0 = immediate,
  69. * 1 = digital immediate, analog zero-cross
  70. * 2 = digtail & analog soft-ramp
  71. * 3 = digital soft-ramp, analog zero-cross
  72. */
  73. #define CS_COEF_ADC_SZC_MASK (3 << 0)
  74. #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
  75. #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
  76. /* PGA mode: 0 = differential, 1 = signle-ended */
  77. #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
  78. #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
  79. #define IDX_DAC_CFG 0x0003
  80. /* SZC bitmask, 4 modes below:
  81. * 0 = Immediate
  82. * 1 = zero-cross
  83. * 2 = soft-ramp
  84. * 3 = soft-ramp on zero-cross
  85. */
  86. #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
  87. #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
  88. #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
  89. #define IDX_BEEP_CFG 0x0004
  90. /* 0x0008 - test reg key */
  91. /* 0x0009 - 0x0014 -> 12 test regs */
  92. /* 0x0015 - visibility reg */
  93. /* Cirrus Logic CS4208 */
  94. #define CS4208_VENDOR_NID 0x24
  95. /*
  96. * Cirrus Logic CS4210
  97. *
  98. * 1 DAC => HP(sense) / Speakers,
  99. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  100. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  101. */
  102. #define CS4210_DAC_NID 0x02
  103. #define CS4210_ADC_NID 0x03
  104. #define CS4210_VENDOR_NID 0x0B
  105. #define CS421X_DMIC_PIN_NID 0x09 /* Port E */
  106. #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
  107. #define CS421X_IDX_DEV_CFG 0x01
  108. #define CS421X_IDX_ADC_CFG 0x02
  109. #define CS421X_IDX_DAC_CFG 0x03
  110. #define CS421X_IDX_SPK_CTL 0x04
  111. /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
  112. #define CS4213_VENDOR_NID 0x09
  113. static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
  114. {
  115. struct cs_spec *spec = codec->spec;
  116. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  117. AC_VERB_SET_COEF_INDEX, idx);
  118. return snd_hda_codec_read(codec, spec->vendor_nid, 0,
  119. AC_VERB_GET_PROC_COEF, 0);
  120. }
  121. static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
  122. unsigned int coef)
  123. {
  124. struct cs_spec *spec = codec->spec;
  125. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  126. AC_VERB_SET_COEF_INDEX, idx);
  127. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  128. AC_VERB_SET_PROC_COEF, coef);
  129. }
  130. /*
  131. * auto-mute and auto-mic switching
  132. * CS421x auto-output redirecting
  133. * HP/SPK/SPDIF
  134. */
  135. static void cs_automute(struct hda_codec *codec)
  136. {
  137. struct cs_spec *spec = codec->spec;
  138. /* mute HPs if spdif jack (SENSE_B) is present */
  139. spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
  140. snd_hda_gen_update_outputs(codec);
  141. if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
  142. if (spec->gen.automute_speaker)
  143. spec->gpio_data = spec->gen.hp_jack_present ?
  144. spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
  145. else
  146. spec->gpio_data =
  147. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  148. snd_hda_codec_write(codec, 0x01, 0,
  149. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  150. }
  151. }
  152. static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
  153. {
  154. unsigned int val;
  155. val = snd_hda_codec_get_pincfg(codec, nid);
  156. return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
  157. }
  158. static void init_input_coef(struct hda_codec *codec)
  159. {
  160. struct cs_spec *spec = codec->spec;
  161. unsigned int coef;
  162. /* CS420x has multiple ADC, CS421x has single ADC */
  163. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  164. coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
  165. if (is_active_pin(codec, CS_DMIC2_PIN_NID))
  166. coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
  167. if (is_active_pin(codec, CS_DMIC1_PIN_NID))
  168. coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
  169. * No effect if SPDIF_OUT2 is
  170. * selected in IDX_SPDIF_CTL.
  171. */
  172. cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
  173. }
  174. }
  175. static const struct hda_verb cs_coef_init_verbs[] = {
  176. {0x11, AC_VERB_SET_PROC_STATE, 1},
  177. {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
  178. {0x11, AC_VERB_SET_PROC_COEF,
  179. (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
  180. | 0x0040 /* Mute DACs on FIFO error */
  181. | 0x1000 /* Enable DACs High Pass Filter */
  182. | 0x0400 /* Disable Coefficient Auto increment */
  183. )},
  184. /* ADC1/2 - Digital and Analog Soft Ramp */
  185. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  186. {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
  187. /* Beep */
  188. {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
  189. {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
  190. {} /* terminator */
  191. };
  192. static const struct hda_verb cs4208_coef_init_verbs[] = {
  193. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  194. {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  195. {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
  196. {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
  197. {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
  198. {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
  199. {} /* terminator */
  200. };
  201. /* Errata: CS4207 rev C0/C1/C2 Silicon
  202. *
  203. * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
  204. *
  205. * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
  206. * may be excessive (up to an additional 200 μA), which is most easily
  207. * observed while the part is being held in reset (RESET# active low).
  208. *
  209. * Root Cause: At initial powerup of the device, the logic that drives
  210. * the clock and write enable to the S/PDIF SRC RAMs is not properly
  211. * initialized.
  212. * Certain random patterns will cause a steady leakage current in those
  213. * RAM cells. The issue will resolve once the SRCs are used (turned on).
  214. *
  215. * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
  216. * blocks, which will alleviate the issue.
  217. */
  218. static const struct hda_verb cs_errata_init_verbs[] = {
  219. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  220. {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  221. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  222. {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
  223. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  224. {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
  225. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  226. {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
  227. {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
  228. {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
  229. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  230. {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
  231. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  232. {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
  233. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  234. {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
  235. {0x11, AC_VERB_SET_PROC_STATE, 0x00},
  236. {} /* terminator */
  237. };
  238. /* SPDIF setup */
  239. static void init_digital_coef(struct hda_codec *codec)
  240. {
  241. unsigned int coef;
  242. coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
  243. coef |= 0x0008; /* Replace with mute on error */
  244. if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
  245. coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
  246. * SPDIF_OUT2 is shared with GPIO1 and
  247. * DMIC_SDA2.
  248. */
  249. cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
  250. }
  251. static int cs_init(struct hda_codec *codec)
  252. {
  253. struct cs_spec *spec = codec->spec;
  254. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  255. /* init_verb sequence for C0/C1/C2 errata*/
  256. snd_hda_sequence_write(codec, cs_errata_init_verbs);
  257. snd_hda_sequence_write(codec, cs_coef_init_verbs);
  258. } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
  259. snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
  260. }
  261. snd_hda_gen_init(codec);
  262. if (spec->gpio_mask) {
  263. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  264. spec->gpio_mask);
  265. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  266. spec->gpio_dir);
  267. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  268. spec->gpio_data);
  269. }
  270. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  271. init_input_coef(codec);
  272. init_digital_coef(codec);
  273. }
  274. return 0;
  275. }
  276. static int cs_build_controls(struct hda_codec *codec)
  277. {
  278. int err;
  279. err = snd_hda_gen_build_controls(codec);
  280. if (err < 0)
  281. return err;
  282. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_BUILD);
  283. return 0;
  284. }
  285. #define cs_free snd_hda_gen_free
  286. static const struct hda_codec_ops cs_patch_ops = {
  287. .build_controls = cs_build_controls,
  288. .build_pcms = snd_hda_gen_build_pcms,
  289. .init = cs_init,
  290. .free = cs_free,
  291. .unsol_event = snd_hda_jack_unsol_event,
  292. };
  293. static int cs_parse_auto_config(struct hda_codec *codec)
  294. {
  295. struct cs_spec *spec = codec->spec;
  296. int err;
  297. int i;
  298. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  299. if (err < 0)
  300. return err;
  301. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  302. if (err < 0)
  303. return err;
  304. /* keep the ADCs powered up when it's dynamically switchable */
  305. if (spec->gen.dyn_adc_switch) {
  306. unsigned int done = 0;
  307. for (i = 0; i < spec->gen.input_mux.num_items; i++) {
  308. int idx = spec->gen.dyn_adc_idx[i];
  309. if (done & (1 << idx))
  310. continue;
  311. snd_hda_gen_fix_pin_power(codec,
  312. spec->gen.adc_nids[idx]);
  313. done |= 1 << idx;
  314. }
  315. }
  316. return 0;
  317. }
  318. static const struct hda_model_fixup cs420x_models[] = {
  319. { .id = CS420X_MBP53, .name = "mbp53" },
  320. { .id = CS420X_MBP55, .name = "mbp55" },
  321. { .id = CS420X_IMAC27, .name = "imac27" },
  322. { .id = CS420X_IMAC27_122, .name = "imac27_122" },
  323. { .id = CS420X_APPLE, .name = "apple" },
  324. { .id = CS420X_MBP101, .name = "mbp101" },
  325. { .id = CS420X_MBP81, .name = "mbp81" },
  326. { .id = CS420X_MBA42, .name = "mba42" },
  327. {}
  328. };
  329. static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
  330. SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
  331. SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
  332. SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
  333. SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
  334. /* this conflicts with too many other models */
  335. /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
  336. /* codec SSID */
  337. SND_PCI_QUIRK(0x106b, 0x0600, "iMac 14,1", CS420X_IMAC27_122),
  338. SND_PCI_QUIRK(0x106b, 0x0900, "iMac 12,1", CS420X_IMAC27_122),
  339. SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
  340. SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
  341. SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
  342. SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
  343. SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
  344. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
  345. {} /* terminator */
  346. };
  347. static const struct hda_pintbl mbp53_pincfgs[] = {
  348. { 0x09, 0x012b4050 },
  349. { 0x0a, 0x90100141 },
  350. { 0x0b, 0x90100140 },
  351. { 0x0c, 0x018b3020 },
  352. { 0x0d, 0x90a00110 },
  353. { 0x0e, 0x400000f0 },
  354. { 0x0f, 0x01cbe030 },
  355. { 0x10, 0x014be060 },
  356. { 0x12, 0x400000f0 },
  357. { 0x15, 0x400000f0 },
  358. {} /* terminator */
  359. };
  360. static const struct hda_pintbl mbp55_pincfgs[] = {
  361. { 0x09, 0x012b4030 },
  362. { 0x0a, 0x90100121 },
  363. { 0x0b, 0x90100120 },
  364. { 0x0c, 0x400000f0 },
  365. { 0x0d, 0x90a00110 },
  366. { 0x0e, 0x400000f0 },
  367. { 0x0f, 0x400000f0 },
  368. { 0x10, 0x014be040 },
  369. { 0x12, 0x400000f0 },
  370. { 0x15, 0x400000f0 },
  371. {} /* terminator */
  372. };
  373. static const struct hda_pintbl imac27_pincfgs[] = {
  374. { 0x09, 0x012b4050 },
  375. { 0x0a, 0x90100140 },
  376. { 0x0b, 0x90100142 },
  377. { 0x0c, 0x018b3020 },
  378. { 0x0d, 0x90a00110 },
  379. { 0x0e, 0x400000f0 },
  380. { 0x0f, 0x01cbe030 },
  381. { 0x10, 0x014be060 },
  382. { 0x12, 0x01ab9070 },
  383. { 0x15, 0x400000f0 },
  384. {} /* terminator */
  385. };
  386. static const struct hda_pintbl mbp101_pincfgs[] = {
  387. { 0x0d, 0x40ab90f0 },
  388. { 0x0e, 0x90a600f0 },
  389. { 0x12, 0x50a600f0 },
  390. {} /* terminator */
  391. };
  392. static const struct hda_pintbl mba42_pincfgs[] = {
  393. { 0x09, 0x012b4030 }, /* HP */
  394. { 0x0a, 0x400000f0 },
  395. { 0x0b, 0x90100120 }, /* speaker */
  396. { 0x0c, 0x400000f0 },
  397. { 0x0d, 0x90a00110 }, /* mic */
  398. { 0x0e, 0x400000f0 },
  399. { 0x0f, 0x400000f0 },
  400. { 0x10, 0x400000f0 },
  401. { 0x12, 0x400000f0 },
  402. { 0x15, 0x400000f0 },
  403. {} /* terminator */
  404. };
  405. static const struct hda_pintbl mba6_pincfgs[] = {
  406. { 0x10, 0x032120f0 }, /* HP */
  407. { 0x11, 0x500000f0 },
  408. { 0x12, 0x90100010 }, /* Speaker */
  409. { 0x13, 0x500000f0 },
  410. { 0x14, 0x500000f0 },
  411. { 0x15, 0x770000f0 },
  412. { 0x16, 0x770000f0 },
  413. { 0x17, 0x430000f0 },
  414. { 0x18, 0x43ab9030 }, /* Mic */
  415. { 0x19, 0x770000f0 },
  416. { 0x1a, 0x770000f0 },
  417. { 0x1b, 0x770000f0 },
  418. { 0x1c, 0x90a00090 },
  419. { 0x1d, 0x500000f0 },
  420. { 0x1e, 0x500000f0 },
  421. { 0x1f, 0x500000f0 },
  422. { 0x20, 0x500000f0 },
  423. { 0x21, 0x430000f0 },
  424. { 0x22, 0x430000f0 },
  425. {} /* terminator */
  426. };
  427. static void cs420x_fixup_gpio_13(struct hda_codec *codec,
  428. const struct hda_fixup *fix, int action)
  429. {
  430. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  431. struct cs_spec *spec = codec->spec;
  432. spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
  433. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  434. spec->gpio_mask = spec->gpio_dir =
  435. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  436. }
  437. }
  438. static void cs420x_fixup_gpio_23(struct hda_codec *codec,
  439. const struct hda_fixup *fix, int action)
  440. {
  441. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  442. struct cs_spec *spec = codec->spec;
  443. spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
  444. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  445. spec->gpio_mask = spec->gpio_dir =
  446. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  447. }
  448. }
  449. static const struct hda_fixup cs420x_fixups[] = {
  450. [CS420X_MBP53] = {
  451. .type = HDA_FIXUP_PINS,
  452. .v.pins = mbp53_pincfgs,
  453. .chained = true,
  454. .chain_id = CS420X_APPLE,
  455. },
  456. [CS420X_MBP55] = {
  457. .type = HDA_FIXUP_PINS,
  458. .v.pins = mbp55_pincfgs,
  459. .chained = true,
  460. .chain_id = CS420X_GPIO_13,
  461. },
  462. [CS420X_IMAC27] = {
  463. .type = HDA_FIXUP_PINS,
  464. .v.pins = imac27_pincfgs,
  465. .chained = true,
  466. .chain_id = CS420X_GPIO_13,
  467. },
  468. [CS420X_GPIO_13] = {
  469. .type = HDA_FIXUP_FUNC,
  470. .v.func = cs420x_fixup_gpio_13,
  471. },
  472. [CS420X_GPIO_23] = {
  473. .type = HDA_FIXUP_FUNC,
  474. .v.func = cs420x_fixup_gpio_23,
  475. },
  476. [CS420X_MBP101] = {
  477. .type = HDA_FIXUP_PINS,
  478. .v.pins = mbp101_pincfgs,
  479. .chained = true,
  480. .chain_id = CS420X_GPIO_13,
  481. },
  482. [CS420X_MBP81] = {
  483. .type = HDA_FIXUP_VERBS,
  484. .v.verbs = (const struct hda_verb[]) {
  485. /* internal mic ADC2: right only, single ended */
  486. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  487. {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
  488. {}
  489. },
  490. .chained = true,
  491. .chain_id = CS420X_GPIO_13,
  492. },
  493. [CS420X_MBA42] = {
  494. .type = HDA_FIXUP_PINS,
  495. .v.pins = mba42_pincfgs,
  496. .chained = true,
  497. .chain_id = CS420X_GPIO_13,
  498. },
  499. };
  500. static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
  501. {
  502. struct cs_spec *spec;
  503. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  504. if (!spec)
  505. return NULL;
  506. codec->spec = spec;
  507. spec->vendor_nid = vendor_nid;
  508. codec->power_save_node = 1;
  509. snd_hda_gen_spec_init(&spec->gen);
  510. return spec;
  511. }
  512. static int patch_cs420x(struct hda_codec *codec)
  513. {
  514. struct cs_spec *spec;
  515. int err;
  516. spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
  517. if (!spec)
  518. return -ENOMEM;
  519. codec->patch_ops = cs_patch_ops;
  520. spec->gen.automute_hook = cs_automute;
  521. codec->single_adc_amp = 1;
  522. snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
  523. cs420x_fixups);
  524. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  525. err = cs_parse_auto_config(codec);
  526. if (err < 0)
  527. goto error;
  528. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  529. return 0;
  530. error:
  531. cs_free(codec);
  532. return err;
  533. }
  534. /*
  535. * CS4208 support:
  536. * Its layout is no longer compatible with CS4206/CS4207
  537. */
  538. enum {
  539. CS4208_MAC_AUTO,
  540. CS4208_MBA6,
  541. CS4208_MBP11,
  542. CS4208_MACMINI,
  543. CS4208_GPIO0,
  544. };
  545. static const struct hda_model_fixup cs4208_models[] = {
  546. { .id = CS4208_GPIO0, .name = "gpio0" },
  547. { .id = CS4208_MBA6, .name = "mba6" },
  548. { .id = CS4208_MBP11, .name = "mbp11" },
  549. { .id = CS4208_MACMINI, .name = "macmini" },
  550. {}
  551. };
  552. static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
  553. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
  554. {} /* terminator */
  555. };
  556. /* codec SSID matching */
  557. static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = {
  558. SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
  559. SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI),
  560. SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
  561. SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
  562. SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11),
  563. {} /* terminator */
  564. };
  565. static void cs4208_fixup_gpio0(struct hda_codec *codec,
  566. const struct hda_fixup *fix, int action)
  567. {
  568. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  569. struct cs_spec *spec = codec->spec;
  570. spec->gpio_eapd_hp = 0;
  571. spec->gpio_eapd_speaker = 1;
  572. spec->gpio_mask = spec->gpio_dir =
  573. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  574. }
  575. }
  576. static const struct hda_fixup cs4208_fixups[];
  577. /* remap the fixup from codec SSID and apply it */
  578. static void cs4208_fixup_mac(struct hda_codec *codec,
  579. const struct hda_fixup *fix, int action)
  580. {
  581. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  582. return;
  583. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  584. snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups);
  585. if (codec->fixup_id == HDA_FIXUP_ID_NOT_SET)
  586. codec->fixup_id = CS4208_GPIO0; /* default fixup */
  587. snd_hda_apply_fixup(codec, action);
  588. }
  589. /* MacMini 7,1 has the inverted jack detection */
  590. static void cs4208_fixup_macmini(struct hda_codec *codec,
  591. const struct hda_fixup *fix, int action)
  592. {
  593. static const struct hda_pintbl pincfgs[] = {
  594. { 0x18, 0x00ab9150 }, /* mic (audio-in) jack: disable detect */
  595. { 0x21, 0x004be140 }, /* SPDIF: disable detect */
  596. { }
  597. };
  598. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  599. /* HP pin (0x10) has an inverted detection */
  600. codec->inv_jack_detect = 1;
  601. /* disable the bogus Mic and SPDIF jack detections */
  602. snd_hda_apply_pincfgs(codec, pincfgs);
  603. }
  604. }
  605. static int cs4208_spdif_sw_put(struct snd_kcontrol *kcontrol,
  606. struct snd_ctl_elem_value *ucontrol)
  607. {
  608. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  609. struct cs_spec *spec = codec->spec;
  610. hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0];
  611. int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0;
  612. snd_hda_set_pin_ctl_cache(codec, pin, pinctl);
  613. return spec->spdif_sw_put(kcontrol, ucontrol);
  614. }
  615. /* hook the SPDIF switch */
  616. static void cs4208_fixup_spdif_switch(struct hda_codec *codec,
  617. const struct hda_fixup *fix, int action)
  618. {
  619. if (action == HDA_FIXUP_ACT_BUILD) {
  620. struct cs_spec *spec = codec->spec;
  621. struct snd_kcontrol *kctl;
  622. if (!spec->gen.autocfg.dig_out_pins[0])
  623. return;
  624. kctl = snd_hda_find_mixer_ctl(codec, "IEC958 Playback Switch");
  625. if (!kctl)
  626. return;
  627. spec->spdif_sw_put = kctl->put;
  628. kctl->put = cs4208_spdif_sw_put;
  629. }
  630. }
  631. static const struct hda_fixup cs4208_fixups[] = {
  632. [CS4208_MBA6] = {
  633. .type = HDA_FIXUP_PINS,
  634. .v.pins = mba6_pincfgs,
  635. .chained = true,
  636. .chain_id = CS4208_GPIO0,
  637. },
  638. [CS4208_MBP11] = {
  639. .type = HDA_FIXUP_FUNC,
  640. .v.func = cs4208_fixup_spdif_switch,
  641. .chained = true,
  642. .chain_id = CS4208_GPIO0,
  643. },
  644. [CS4208_MACMINI] = {
  645. .type = HDA_FIXUP_FUNC,
  646. .v.func = cs4208_fixup_macmini,
  647. .chained = true,
  648. .chain_id = CS4208_GPIO0,
  649. },
  650. [CS4208_GPIO0] = {
  651. .type = HDA_FIXUP_FUNC,
  652. .v.func = cs4208_fixup_gpio0,
  653. },
  654. [CS4208_MAC_AUTO] = {
  655. .type = HDA_FIXUP_FUNC,
  656. .v.func = cs4208_fixup_mac,
  657. },
  658. };
  659. /* correct the 0dB offset of input pins */
  660. static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
  661. {
  662. unsigned int caps;
  663. caps = query_amp_caps(codec, adc, HDA_INPUT);
  664. caps &= ~(AC_AMPCAP_OFFSET);
  665. caps |= 0x02;
  666. snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
  667. }
  668. static int patch_cs4208(struct hda_codec *codec)
  669. {
  670. struct cs_spec *spec;
  671. int err;
  672. spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
  673. if (!spec)
  674. return -ENOMEM;
  675. codec->patch_ops = cs_patch_ops;
  676. spec->gen.automute_hook = cs_automute;
  677. /* exclude NID 0x10 (HP) from output volumes due to different steps */
  678. spec->gen.out_vol_mask = 1ULL << 0x10;
  679. snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
  680. cs4208_fixups);
  681. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  682. snd_hda_override_wcaps(codec, 0x18,
  683. get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
  684. cs4208_fix_amp_caps(codec, 0x18);
  685. cs4208_fix_amp_caps(codec, 0x1b);
  686. cs4208_fix_amp_caps(codec, 0x1c);
  687. err = cs_parse_auto_config(codec);
  688. if (err < 0)
  689. goto error;
  690. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  691. return 0;
  692. error:
  693. cs_free(codec);
  694. return err;
  695. }
  696. /*
  697. * Cirrus Logic CS4210
  698. *
  699. * 1 DAC => HP(sense) / Speakers,
  700. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  701. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  702. */
  703. /* CS4210 board names */
  704. static const struct hda_model_fixup cs421x_models[] = {
  705. { .id = CS421X_CDB4210, .name = "cdb4210" },
  706. { .id = CS421X_STUMPY, .name = "stumpy" },
  707. {}
  708. };
  709. static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
  710. /* Test Intel board + CDB2410 */
  711. SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
  712. {} /* terminator */
  713. };
  714. /* CS4210 board pinconfigs */
  715. /* Default CS4210 (CDB4210)*/
  716. static const struct hda_pintbl cdb4210_pincfgs[] = {
  717. { 0x05, 0x0321401f },
  718. { 0x06, 0x90170010 },
  719. { 0x07, 0x03813031 },
  720. { 0x08, 0xb7a70037 },
  721. { 0x09, 0xb7a6003e },
  722. { 0x0a, 0x034510f0 },
  723. {} /* terminator */
  724. };
  725. /* Stumpy ChromeBox */
  726. static const struct hda_pintbl stumpy_pincfgs[] = {
  727. { 0x05, 0x022120f0 },
  728. { 0x06, 0x901700f0 },
  729. { 0x07, 0x02a120f0 },
  730. { 0x08, 0x77a70037 },
  731. { 0x09, 0x77a6003e },
  732. { 0x0a, 0x434510f0 },
  733. {} /* terminator */
  734. };
  735. /* Setup GPIO/SENSE for each board (if used) */
  736. static void cs421x_fixup_sense_b(struct hda_codec *codec,
  737. const struct hda_fixup *fix, int action)
  738. {
  739. struct cs_spec *spec = codec->spec;
  740. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  741. spec->sense_b = 1;
  742. }
  743. static const struct hda_fixup cs421x_fixups[] = {
  744. [CS421X_CDB4210] = {
  745. .type = HDA_FIXUP_PINS,
  746. .v.pins = cdb4210_pincfgs,
  747. .chained = true,
  748. .chain_id = CS421X_SENSE_B,
  749. },
  750. [CS421X_SENSE_B] = {
  751. .type = HDA_FIXUP_FUNC,
  752. .v.func = cs421x_fixup_sense_b,
  753. },
  754. [CS421X_STUMPY] = {
  755. .type = HDA_FIXUP_PINS,
  756. .v.pins = stumpy_pincfgs,
  757. },
  758. };
  759. static const struct hda_verb cs421x_coef_init_verbs[] = {
  760. {0x0B, AC_VERB_SET_PROC_STATE, 1},
  761. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
  762. /*
  763. * Disable Coefficient Index Auto-Increment(DAI)=1,
  764. * PDREF=0
  765. */
  766. {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
  767. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
  768. /* ADC SZCMode = Digital Soft Ramp */
  769. {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
  770. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
  771. {0x0B, AC_VERB_SET_PROC_COEF,
  772. (0x0002 /* DAC SZCMode = Digital Soft Ramp */
  773. | 0x0004 /* Mute DAC on FIFO error */
  774. | 0x0008 /* Enable DAC High Pass Filter */
  775. )},
  776. {} /* terminator */
  777. };
  778. /* Errata: CS4210 rev A1 Silicon
  779. *
  780. * http://www.cirrus.com/en/pubs/errata/
  781. *
  782. * Description:
  783. * 1. Performance degredation is present in the ADC.
  784. * 2. Speaker output is not completely muted upon HP detect.
  785. * 3. Noise is present when clipping occurs on the amplified
  786. * speaker outputs.
  787. *
  788. * Workaround:
  789. * The following verb sequence written to the registers during
  790. * initialization will correct the issues listed above.
  791. */
  792. static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
  793. {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  794. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
  795. {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
  796. {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
  797. {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
  798. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
  799. {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
  800. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
  801. {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
  802. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
  803. {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
  804. {} /* terminator */
  805. };
  806. /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
  807. static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
  808. static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
  809. struct snd_ctl_elem_info *uinfo)
  810. {
  811. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  812. uinfo->count = 1;
  813. uinfo->value.integer.min = 0;
  814. uinfo->value.integer.max = 3;
  815. return 0;
  816. }
  817. static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
  818. struct snd_ctl_elem_value *ucontrol)
  819. {
  820. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  821. ucontrol->value.integer.value[0] =
  822. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
  823. return 0;
  824. }
  825. static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
  826. struct snd_ctl_elem_value *ucontrol)
  827. {
  828. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  829. unsigned int vol = ucontrol->value.integer.value[0];
  830. unsigned int coef =
  831. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
  832. unsigned int original_coef = coef;
  833. coef &= ~0x0003;
  834. coef |= (vol & 0x0003);
  835. if (original_coef != coef) {
  836. cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
  837. return 1;
  838. }
  839. return 0;
  840. }
  841. static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
  842. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  843. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  844. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  845. .name = "Speaker Boost Playback Volume",
  846. .info = cs421x_boost_vol_info,
  847. .get = cs421x_boost_vol_get,
  848. .put = cs421x_boost_vol_put,
  849. .tlv = { .p = cs421x_speaker_boost_db_scale },
  850. };
  851. static void cs4210_pinmux_init(struct hda_codec *codec)
  852. {
  853. struct cs_spec *spec = codec->spec;
  854. unsigned int def_conf, coef;
  855. /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
  856. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  857. if (spec->gpio_mask)
  858. coef |= 0x0008; /* B1,B2 are GPIOs */
  859. else
  860. coef &= ~0x0008;
  861. if (spec->sense_b)
  862. coef |= 0x0010; /* B2 is SENSE_B, not inverted */
  863. else
  864. coef &= ~0x0010;
  865. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  866. if ((spec->gpio_mask || spec->sense_b) &&
  867. is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
  868. /*
  869. * GPIO or SENSE_B forced - disconnect the DMIC pin.
  870. */
  871. def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
  872. def_conf &= ~AC_DEFCFG_PORT_CONN;
  873. def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
  874. snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
  875. }
  876. }
  877. static void cs4210_spdif_automute(struct hda_codec *codec,
  878. struct hda_jack_callback *tbl)
  879. {
  880. struct cs_spec *spec = codec->spec;
  881. bool spdif_present = false;
  882. hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
  883. /* detect on spdif is specific to CS4210 */
  884. if (!spec->spdif_detect ||
  885. spec->vendor_nid != CS4210_VENDOR_NID)
  886. return;
  887. spdif_present = snd_hda_jack_detect(codec, spdif_pin);
  888. if (spdif_present == spec->spdif_present)
  889. return;
  890. spec->spdif_present = spdif_present;
  891. /* SPDIF TX on/off */
  892. snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0);
  893. cs_automute(codec);
  894. }
  895. static void parse_cs421x_digital(struct hda_codec *codec)
  896. {
  897. struct cs_spec *spec = codec->spec;
  898. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  899. int i;
  900. for (i = 0; i < cfg->dig_outs; i++) {
  901. hda_nid_t nid = cfg->dig_out_pins[i];
  902. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
  903. spec->spdif_detect = 1;
  904. snd_hda_jack_detect_enable_callback(codec, nid,
  905. cs4210_spdif_automute);
  906. }
  907. }
  908. }
  909. static int cs421x_init(struct hda_codec *codec)
  910. {
  911. struct cs_spec *spec = codec->spec;
  912. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  913. snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
  914. snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
  915. cs4210_pinmux_init(codec);
  916. }
  917. snd_hda_gen_init(codec);
  918. if (spec->gpio_mask) {
  919. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  920. spec->gpio_mask);
  921. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  922. spec->gpio_dir);
  923. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  924. spec->gpio_data);
  925. }
  926. init_input_coef(codec);
  927. cs4210_spdif_automute(codec, NULL);
  928. return 0;
  929. }
  930. static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
  931. {
  932. unsigned int caps;
  933. /* set the upper-limit for mixer amp to 0dB */
  934. caps = query_amp_caps(codec, dac, HDA_OUTPUT);
  935. caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
  936. caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
  937. << AC_AMPCAP_NUM_STEPS_SHIFT;
  938. snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
  939. }
  940. static int cs421x_parse_auto_config(struct hda_codec *codec)
  941. {
  942. struct cs_spec *spec = codec->spec;
  943. hda_nid_t dac = CS4210_DAC_NID;
  944. int err;
  945. fix_volume_caps(codec, dac);
  946. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  947. if (err < 0)
  948. return err;
  949. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  950. if (err < 0)
  951. return err;
  952. parse_cs421x_digital(codec);
  953. if (spec->gen.autocfg.speaker_outs &&
  954. spec->vendor_nid == CS4210_VENDOR_NID) {
  955. if (!snd_hda_gen_add_kctl(&spec->gen, NULL,
  956. &cs421x_speaker_boost_ctl))
  957. return -ENOMEM;
  958. }
  959. return 0;
  960. }
  961. #ifdef CONFIG_PM
  962. /*
  963. * Manage PDREF, when transitioning to D3hot
  964. * (DAC,ADC) -> D3, PDREF=1, AFG->D3
  965. */
  966. static int cs421x_suspend(struct hda_codec *codec)
  967. {
  968. struct cs_spec *spec = codec->spec;
  969. unsigned int coef;
  970. snd_hda_shutup_pins(codec);
  971. snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
  972. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  973. snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
  974. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  975. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  976. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  977. coef |= 0x0004; /* PDREF */
  978. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  979. }
  980. return 0;
  981. }
  982. #endif
  983. static const struct hda_codec_ops cs421x_patch_ops = {
  984. .build_controls = snd_hda_gen_build_controls,
  985. .build_pcms = snd_hda_gen_build_pcms,
  986. .init = cs421x_init,
  987. .free = cs_free,
  988. .unsol_event = snd_hda_jack_unsol_event,
  989. #ifdef CONFIG_PM
  990. .suspend = cs421x_suspend,
  991. #endif
  992. };
  993. static int patch_cs4210(struct hda_codec *codec)
  994. {
  995. struct cs_spec *spec;
  996. int err;
  997. spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
  998. if (!spec)
  999. return -ENOMEM;
  1000. codec->patch_ops = cs421x_patch_ops;
  1001. spec->gen.automute_hook = cs_automute;
  1002. snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
  1003. cs421x_fixups);
  1004. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  1005. /*
  1006. * Update the GPIO/DMIC/SENSE_B pinmux before the configuration
  1007. * is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
  1008. * is disabled.
  1009. */
  1010. cs4210_pinmux_init(codec);
  1011. err = cs421x_parse_auto_config(codec);
  1012. if (err < 0)
  1013. goto error;
  1014. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  1015. return 0;
  1016. error:
  1017. cs_free(codec);
  1018. return err;
  1019. }
  1020. static int patch_cs4213(struct hda_codec *codec)
  1021. {
  1022. struct cs_spec *spec;
  1023. int err;
  1024. spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
  1025. if (!spec)
  1026. return -ENOMEM;
  1027. codec->patch_ops = cs421x_patch_ops;
  1028. err = cs421x_parse_auto_config(codec);
  1029. if (err < 0)
  1030. goto error;
  1031. return 0;
  1032. error:
  1033. cs_free(codec);
  1034. return err;
  1035. }
  1036. /*
  1037. * patch entries
  1038. */
  1039. static const struct hda_device_id snd_hda_id_cirrus[] = {
  1040. HDA_CODEC_ENTRY(0x10134206, "CS4206", patch_cs420x),
  1041. HDA_CODEC_ENTRY(0x10134207, "CS4207", patch_cs420x),
  1042. HDA_CODEC_ENTRY(0x10134208, "CS4208", patch_cs4208),
  1043. HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210),
  1044. HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213),
  1045. {} /* terminator */
  1046. };
  1047. MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_cirrus);
  1048. MODULE_LICENSE("GPL");
  1049. MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
  1050. static struct hda_codec_driver cirrus_driver = {
  1051. .id = snd_hda_id_cirrus,
  1052. };
  1053. module_hda_codec_driver(cirrus_driver);