fm801.c 40 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * The driver for the ForteMedia FM801 based soundcards
  4. * Copyright (c) by Jaroslav Kysela <[email protected]>
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/init.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/io.h>
  10. #include <linux/pci.h>
  11. #include <linux/slab.h>
  12. #include <linux/module.h>
  13. #include <sound/core.h>
  14. #include <sound/pcm.h>
  15. #include <sound/tlv.h>
  16. #include <sound/ac97_codec.h>
  17. #include <sound/mpu401.h>
  18. #include <sound/opl3.h>
  19. #include <sound/initval.h>
  20. #ifdef CONFIG_SND_FM801_TEA575X_BOOL
  21. #include <media/drv-intf/tea575x.h>
  22. #endif
  23. MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
  24. MODULE_DESCRIPTION("ForteMedia FM801");
  25. MODULE_LICENSE("GPL");
  26. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  27. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  28. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  29. /*
  30. * Enable TEA575x tuner
  31. * 1 = MediaForte 256-PCS
  32. * 2 = MediaForte 256-PCP
  33. * 3 = MediaForte 64-PCR
  34. * 16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
  35. * High 16-bits are video (radio) device number + 1
  36. */
  37. static int tea575x_tuner[SNDRV_CARDS];
  38. static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
  39. module_param_array(index, int, NULL, 0444);
  40. MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
  41. module_param_array(id, charp, NULL, 0444);
  42. MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
  43. module_param_array(enable, bool, NULL, 0444);
  44. MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
  45. module_param_array(tea575x_tuner, int, NULL, 0444);
  46. MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
  47. module_param_array(radio_nr, int, NULL, 0444);
  48. MODULE_PARM_DESC(radio_nr, "Radio device numbers");
  49. #define TUNER_DISABLED (1<<3)
  50. #define TUNER_ONLY (1<<4)
  51. #define TUNER_TYPE_MASK (~TUNER_ONLY & 0xFFFF)
  52. /*
  53. * Direct registers
  54. */
  55. #define fm801_writew(chip,reg,value) outw((value), chip->port + FM801_##reg)
  56. #define fm801_readw(chip,reg) inw(chip->port + FM801_##reg)
  57. #define fm801_writel(chip,reg,value) outl((value), chip->port + FM801_##reg)
  58. #define FM801_PCM_VOL 0x00 /* PCM Output Volume */
  59. #define FM801_FM_VOL 0x02 /* FM Output Volume */
  60. #define FM801_I2S_VOL 0x04 /* I2S Volume */
  61. #define FM801_REC_SRC 0x06 /* Record Source */
  62. #define FM801_PLY_CTRL 0x08 /* Playback Control */
  63. #define FM801_PLY_COUNT 0x0a /* Playback Count */
  64. #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
  65. #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
  66. #define FM801_CAP_CTRL 0x14 /* Capture Control */
  67. #define FM801_CAP_COUNT 0x16 /* Capture Count */
  68. #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
  69. #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
  70. #define FM801_CODEC_CTRL 0x22 /* Codec Control */
  71. #define FM801_I2S_MODE 0x24 /* I2S Mode Control */
  72. #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
  73. #define FM801_I2C_CTRL 0x29 /* I2C Control */
  74. #define FM801_AC97_CMD 0x2a /* AC'97 Command */
  75. #define FM801_AC97_DATA 0x2c /* AC'97 Data */
  76. #define FM801_MPU401_DATA 0x30 /* MPU401 Data */
  77. #define FM801_MPU401_CMD 0x31 /* MPU401 Command */
  78. #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
  79. #define FM801_GEN_CTRL 0x54 /* General Control */
  80. #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
  81. #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
  82. #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
  83. #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
  84. #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
  85. #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
  86. #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
  87. /* codec access */
  88. #define FM801_AC97_READ (1<<7) /* read=1, write=0 */
  89. #define FM801_AC97_VALID (1<<8) /* port valid=1 */
  90. #define FM801_AC97_BUSY (1<<9) /* busy=1 */
  91. #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
  92. /* playback and record control register bits */
  93. #define FM801_BUF1_LAST (1<<1)
  94. #define FM801_BUF2_LAST (1<<2)
  95. #define FM801_START (1<<5)
  96. #define FM801_PAUSE (1<<6)
  97. #define FM801_IMMED_STOP (1<<7)
  98. #define FM801_RATE_SHIFT 8
  99. #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
  100. #define FM801_CHANNELS_4 (1<<12) /* playback only */
  101. #define FM801_CHANNELS_6 (2<<12) /* playback only */
  102. #define FM801_CHANNELS_6MS (3<<12) /* playback only */
  103. #define FM801_CHANNELS_MASK (3<<12)
  104. #define FM801_16BIT (1<<14)
  105. #define FM801_STEREO (1<<15)
  106. /* IRQ status bits */
  107. #define FM801_IRQ_PLAYBACK (1<<8)
  108. #define FM801_IRQ_CAPTURE (1<<9)
  109. #define FM801_IRQ_VOLUME (1<<14)
  110. #define FM801_IRQ_MPU (1<<15)
  111. /* GPIO control register */
  112. #define FM801_GPIO_GP0 (1<<0) /* read/write */
  113. #define FM801_GPIO_GP1 (1<<1)
  114. #define FM801_GPIO_GP2 (1<<2)
  115. #define FM801_GPIO_GP3 (1<<3)
  116. #define FM801_GPIO_GP(x) (1<<(0+(x)))
  117. #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
  118. #define FM801_GPIO_GD1 (1<<9)
  119. #define FM801_GPIO_GD2 (1<<10)
  120. #define FM801_GPIO_GD3 (1<<11)
  121. #define FM801_GPIO_GD(x) (1<<(8+(x)))
  122. #define FM801_GPIO_GS0 (1<<12) /* function select: */
  123. #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
  124. #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
  125. #define FM801_GPIO_GS3 (1<<15)
  126. #define FM801_GPIO_GS(x) (1<<(12+(x)))
  127. /**
  128. * struct fm801 - describes FM801 chip
  129. * @dev: device for this chio
  130. * @irq: irq number
  131. * @port: I/O port number
  132. * @multichannel: multichannel support
  133. * @secondary: secondary codec
  134. * @secondary_addr: address of the secondary codec
  135. * @tea575x_tuner: tuner access method & flags
  136. * @ply_ctrl: playback control
  137. * @cap_ctrl: capture control
  138. * @ply_buffer: playback buffer
  139. * @ply_buf: playback buffer index
  140. * @ply_count: playback buffer count
  141. * @ply_size: playback buffer size
  142. * @ply_pos: playback position
  143. * @cap_buffer: capture buffer
  144. * @cap_buf: capture buffer index
  145. * @cap_count: capture buffer count
  146. * @cap_size: capture buffer size
  147. * @cap_pos: capture position
  148. * @ac97_bus: ac97 bus handle
  149. * @ac97: ac97 handle
  150. * @ac97_sec: ac97 secondary handle
  151. * @card: ALSA card
  152. * @pcm: PCM devices
  153. * @rmidi: rmidi device
  154. * @playback_substream: substream for playback
  155. * @capture_substream: substream for capture
  156. * @p_dma_size: playback DMA size
  157. * @c_dma_size: capture DMA size
  158. * @reg_lock: lock
  159. * @proc_entry: /proc entry
  160. * @v4l2_dev: v4l2 device
  161. * @tea: tea575a structure
  162. * @saved_regs: context saved during suspend
  163. */
  164. struct fm801 {
  165. struct device *dev;
  166. int irq;
  167. unsigned long port;
  168. unsigned int multichannel: 1,
  169. secondary: 1;
  170. unsigned char secondary_addr;
  171. unsigned int tea575x_tuner;
  172. unsigned short ply_ctrl;
  173. unsigned short cap_ctrl;
  174. unsigned long ply_buffer;
  175. unsigned int ply_buf;
  176. unsigned int ply_count;
  177. unsigned int ply_size;
  178. unsigned int ply_pos;
  179. unsigned long cap_buffer;
  180. unsigned int cap_buf;
  181. unsigned int cap_count;
  182. unsigned int cap_size;
  183. unsigned int cap_pos;
  184. struct snd_ac97_bus *ac97_bus;
  185. struct snd_ac97 *ac97;
  186. struct snd_ac97 *ac97_sec;
  187. struct snd_card *card;
  188. struct snd_pcm *pcm;
  189. struct snd_rawmidi *rmidi;
  190. struct snd_pcm_substream *playback_substream;
  191. struct snd_pcm_substream *capture_substream;
  192. unsigned int p_dma_size;
  193. unsigned int c_dma_size;
  194. spinlock_t reg_lock;
  195. struct snd_info_entry *proc_entry;
  196. #ifdef CONFIG_SND_FM801_TEA575X_BOOL
  197. struct v4l2_device v4l2_dev;
  198. struct snd_tea575x tea;
  199. #endif
  200. #ifdef CONFIG_PM_SLEEP
  201. u16 saved_regs[0x20];
  202. #endif
  203. };
  204. /*
  205. * IO accessors
  206. */
  207. static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)
  208. {
  209. outw(value, chip->port + offset);
  210. }
  211. static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)
  212. {
  213. return inw(chip->port + offset);
  214. }
  215. static const struct pci_device_id snd_fm801_ids[] = {
  216. { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
  217. { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
  218. { 0, }
  219. };
  220. MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
  221. /*
  222. * common I/O routines
  223. */
  224. static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
  225. {
  226. unsigned int idx;
  227. for (idx = 0; idx < iterations; idx++) {
  228. if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
  229. return true;
  230. udelay(10);
  231. }
  232. return false;
  233. }
  234. static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
  235. {
  236. unsigned int idx;
  237. for (idx = 0; idx < iterations; idx++) {
  238. if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
  239. return true;
  240. udelay(10);
  241. }
  242. return false;
  243. }
  244. static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
  245. unsigned short mask, unsigned short value)
  246. {
  247. int change;
  248. unsigned long flags;
  249. unsigned short old, new;
  250. spin_lock_irqsave(&chip->reg_lock, flags);
  251. old = fm801_ioread16(chip, reg);
  252. new = (old & ~mask) | value;
  253. change = old != new;
  254. if (change)
  255. fm801_iowrite16(chip, reg, new);
  256. spin_unlock_irqrestore(&chip->reg_lock, flags);
  257. return change;
  258. }
  259. static void snd_fm801_codec_write(struct snd_ac97 *ac97,
  260. unsigned short reg,
  261. unsigned short val)
  262. {
  263. struct fm801 *chip = ac97->private_data;
  264. /*
  265. * Wait until the codec interface is not ready..
  266. */
  267. if (!fm801_ac97_is_ready(chip, 100)) {
  268. dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
  269. return;
  270. }
  271. /* write data and address */
  272. fm801_writew(chip, AC97_DATA, val);
  273. fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
  274. /*
  275. * Wait until the write command is not completed..
  276. */
  277. if (!fm801_ac97_is_ready(chip, 1000))
  278. dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
  279. ac97->num);
  280. }
  281. static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
  282. {
  283. struct fm801 *chip = ac97->private_data;
  284. /*
  285. * Wait until the codec interface is not ready..
  286. */
  287. if (!fm801_ac97_is_ready(chip, 100)) {
  288. dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
  289. return 0;
  290. }
  291. /* read command */
  292. fm801_writew(chip, AC97_CMD,
  293. reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
  294. if (!fm801_ac97_is_ready(chip, 100)) {
  295. dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
  296. ac97->num);
  297. return 0;
  298. }
  299. if (!fm801_ac97_is_valid(chip, 1000)) {
  300. dev_err(chip->card->dev,
  301. "AC'97 interface #%d is not valid (2)\n", ac97->num);
  302. return 0;
  303. }
  304. return fm801_readw(chip, AC97_DATA);
  305. }
  306. static const unsigned int rates[] = {
  307. 5500, 8000, 9600, 11025,
  308. 16000, 19200, 22050, 32000,
  309. 38400, 44100, 48000
  310. };
  311. static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
  312. .count = ARRAY_SIZE(rates),
  313. .list = rates,
  314. .mask = 0,
  315. };
  316. static const unsigned int channels[] = {
  317. 2, 4, 6
  318. };
  319. static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
  320. .count = ARRAY_SIZE(channels),
  321. .list = channels,
  322. .mask = 0,
  323. };
  324. /*
  325. * Sample rate routines
  326. */
  327. static unsigned short snd_fm801_rate_bits(unsigned int rate)
  328. {
  329. unsigned int idx;
  330. for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
  331. if (rates[idx] == rate)
  332. return idx;
  333. snd_BUG();
  334. return ARRAY_SIZE(rates) - 1;
  335. }
  336. /*
  337. * PCM part
  338. */
  339. static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
  340. int cmd)
  341. {
  342. struct fm801 *chip = snd_pcm_substream_chip(substream);
  343. spin_lock(&chip->reg_lock);
  344. switch (cmd) {
  345. case SNDRV_PCM_TRIGGER_START:
  346. chip->ply_ctrl &= ~(FM801_BUF1_LAST |
  347. FM801_BUF2_LAST |
  348. FM801_PAUSE);
  349. chip->ply_ctrl |= FM801_START |
  350. FM801_IMMED_STOP;
  351. break;
  352. case SNDRV_PCM_TRIGGER_STOP:
  353. chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
  354. break;
  355. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  356. case SNDRV_PCM_TRIGGER_SUSPEND:
  357. chip->ply_ctrl |= FM801_PAUSE;
  358. break;
  359. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  360. case SNDRV_PCM_TRIGGER_RESUME:
  361. chip->ply_ctrl &= ~FM801_PAUSE;
  362. break;
  363. default:
  364. spin_unlock(&chip->reg_lock);
  365. snd_BUG();
  366. return -EINVAL;
  367. }
  368. fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
  369. spin_unlock(&chip->reg_lock);
  370. return 0;
  371. }
  372. static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
  373. int cmd)
  374. {
  375. struct fm801 *chip = snd_pcm_substream_chip(substream);
  376. spin_lock(&chip->reg_lock);
  377. switch (cmd) {
  378. case SNDRV_PCM_TRIGGER_START:
  379. chip->cap_ctrl &= ~(FM801_BUF1_LAST |
  380. FM801_BUF2_LAST |
  381. FM801_PAUSE);
  382. chip->cap_ctrl |= FM801_START |
  383. FM801_IMMED_STOP;
  384. break;
  385. case SNDRV_PCM_TRIGGER_STOP:
  386. chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
  387. break;
  388. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  389. case SNDRV_PCM_TRIGGER_SUSPEND:
  390. chip->cap_ctrl |= FM801_PAUSE;
  391. break;
  392. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  393. case SNDRV_PCM_TRIGGER_RESUME:
  394. chip->cap_ctrl &= ~FM801_PAUSE;
  395. break;
  396. default:
  397. spin_unlock(&chip->reg_lock);
  398. snd_BUG();
  399. return -EINVAL;
  400. }
  401. fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
  402. spin_unlock(&chip->reg_lock);
  403. return 0;
  404. }
  405. static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
  406. {
  407. struct fm801 *chip = snd_pcm_substream_chip(substream);
  408. struct snd_pcm_runtime *runtime = substream->runtime;
  409. chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
  410. chip->ply_count = snd_pcm_lib_period_bytes(substream);
  411. spin_lock_irq(&chip->reg_lock);
  412. chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
  413. FM801_STEREO | FM801_RATE_MASK |
  414. FM801_CHANNELS_MASK);
  415. if (snd_pcm_format_width(runtime->format) == 16)
  416. chip->ply_ctrl |= FM801_16BIT;
  417. if (runtime->channels > 1) {
  418. chip->ply_ctrl |= FM801_STEREO;
  419. if (runtime->channels == 4)
  420. chip->ply_ctrl |= FM801_CHANNELS_4;
  421. else if (runtime->channels == 6)
  422. chip->ply_ctrl |= FM801_CHANNELS_6;
  423. }
  424. chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
  425. chip->ply_buf = 0;
  426. fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
  427. fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
  428. chip->ply_buffer = runtime->dma_addr;
  429. chip->ply_pos = 0;
  430. fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
  431. fm801_writel(chip, PLY_BUF2,
  432. chip->ply_buffer + (chip->ply_count % chip->ply_size));
  433. spin_unlock_irq(&chip->reg_lock);
  434. return 0;
  435. }
  436. static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
  437. {
  438. struct fm801 *chip = snd_pcm_substream_chip(substream);
  439. struct snd_pcm_runtime *runtime = substream->runtime;
  440. chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
  441. chip->cap_count = snd_pcm_lib_period_bytes(substream);
  442. spin_lock_irq(&chip->reg_lock);
  443. chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
  444. FM801_STEREO | FM801_RATE_MASK);
  445. if (snd_pcm_format_width(runtime->format) == 16)
  446. chip->cap_ctrl |= FM801_16BIT;
  447. if (runtime->channels > 1)
  448. chip->cap_ctrl |= FM801_STEREO;
  449. chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
  450. chip->cap_buf = 0;
  451. fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
  452. fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
  453. chip->cap_buffer = runtime->dma_addr;
  454. chip->cap_pos = 0;
  455. fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
  456. fm801_writel(chip, CAP_BUF2,
  457. chip->cap_buffer + (chip->cap_count % chip->cap_size));
  458. spin_unlock_irq(&chip->reg_lock);
  459. return 0;
  460. }
  461. static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
  462. {
  463. struct fm801 *chip = snd_pcm_substream_chip(substream);
  464. size_t ptr;
  465. if (!(chip->ply_ctrl & FM801_START))
  466. return 0;
  467. spin_lock(&chip->reg_lock);
  468. ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
  469. if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
  470. ptr += chip->ply_count;
  471. ptr %= chip->ply_size;
  472. }
  473. spin_unlock(&chip->reg_lock);
  474. return bytes_to_frames(substream->runtime, ptr);
  475. }
  476. static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
  477. {
  478. struct fm801 *chip = snd_pcm_substream_chip(substream);
  479. size_t ptr;
  480. if (!(chip->cap_ctrl & FM801_START))
  481. return 0;
  482. spin_lock(&chip->reg_lock);
  483. ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
  484. if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
  485. ptr += chip->cap_count;
  486. ptr %= chip->cap_size;
  487. }
  488. spin_unlock(&chip->reg_lock);
  489. return bytes_to_frames(substream->runtime, ptr);
  490. }
  491. static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
  492. {
  493. struct fm801 *chip = dev_id;
  494. unsigned short status;
  495. unsigned int tmp;
  496. status = fm801_readw(chip, IRQ_STATUS);
  497. status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
  498. if (! status)
  499. return IRQ_NONE;
  500. /* ack first */
  501. fm801_writew(chip, IRQ_STATUS, status);
  502. if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
  503. spin_lock(&chip->reg_lock);
  504. chip->ply_buf++;
  505. chip->ply_pos += chip->ply_count;
  506. chip->ply_pos %= chip->ply_size;
  507. tmp = chip->ply_pos + chip->ply_count;
  508. tmp %= chip->ply_size;
  509. if (chip->ply_buf & 1)
  510. fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
  511. else
  512. fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
  513. spin_unlock(&chip->reg_lock);
  514. snd_pcm_period_elapsed(chip->playback_substream);
  515. }
  516. if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
  517. spin_lock(&chip->reg_lock);
  518. chip->cap_buf++;
  519. chip->cap_pos += chip->cap_count;
  520. chip->cap_pos %= chip->cap_size;
  521. tmp = chip->cap_pos + chip->cap_count;
  522. tmp %= chip->cap_size;
  523. if (chip->cap_buf & 1)
  524. fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
  525. else
  526. fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
  527. spin_unlock(&chip->reg_lock);
  528. snd_pcm_period_elapsed(chip->capture_substream);
  529. }
  530. if (chip->rmidi && (status & FM801_IRQ_MPU))
  531. snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
  532. if (status & FM801_IRQ_VOLUME) {
  533. /* TODO */
  534. }
  535. return IRQ_HANDLED;
  536. }
  537. static const struct snd_pcm_hardware snd_fm801_playback =
  538. {
  539. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  540. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  541. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
  542. SNDRV_PCM_INFO_MMAP_VALID),
  543. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  544. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  545. .rate_min = 5500,
  546. .rate_max = 48000,
  547. .channels_min = 1,
  548. .channels_max = 2,
  549. .buffer_bytes_max = (128*1024),
  550. .period_bytes_min = 64,
  551. .period_bytes_max = (128*1024),
  552. .periods_min = 1,
  553. .periods_max = 1024,
  554. .fifo_size = 0,
  555. };
  556. static const struct snd_pcm_hardware snd_fm801_capture =
  557. {
  558. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  559. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  560. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
  561. SNDRV_PCM_INFO_MMAP_VALID),
  562. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  563. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
  564. .rate_min = 5500,
  565. .rate_max = 48000,
  566. .channels_min = 1,
  567. .channels_max = 2,
  568. .buffer_bytes_max = (128*1024),
  569. .period_bytes_min = 64,
  570. .period_bytes_max = (128*1024),
  571. .periods_min = 1,
  572. .periods_max = 1024,
  573. .fifo_size = 0,
  574. };
  575. static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
  576. {
  577. struct fm801 *chip = snd_pcm_substream_chip(substream);
  578. struct snd_pcm_runtime *runtime = substream->runtime;
  579. int err;
  580. chip->playback_substream = substream;
  581. runtime->hw = snd_fm801_playback;
  582. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  583. &hw_constraints_rates);
  584. if (chip->multichannel) {
  585. runtime->hw.channels_max = 6;
  586. snd_pcm_hw_constraint_list(runtime, 0,
  587. SNDRV_PCM_HW_PARAM_CHANNELS,
  588. &hw_constraints_channels);
  589. }
  590. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  591. if (err < 0)
  592. return err;
  593. return 0;
  594. }
  595. static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
  596. {
  597. struct fm801 *chip = snd_pcm_substream_chip(substream);
  598. struct snd_pcm_runtime *runtime = substream->runtime;
  599. int err;
  600. chip->capture_substream = substream;
  601. runtime->hw = snd_fm801_capture;
  602. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  603. &hw_constraints_rates);
  604. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  605. if (err < 0)
  606. return err;
  607. return 0;
  608. }
  609. static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
  610. {
  611. struct fm801 *chip = snd_pcm_substream_chip(substream);
  612. chip->playback_substream = NULL;
  613. return 0;
  614. }
  615. static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
  616. {
  617. struct fm801 *chip = snd_pcm_substream_chip(substream);
  618. chip->capture_substream = NULL;
  619. return 0;
  620. }
  621. static const struct snd_pcm_ops snd_fm801_playback_ops = {
  622. .open = snd_fm801_playback_open,
  623. .close = snd_fm801_playback_close,
  624. .prepare = snd_fm801_playback_prepare,
  625. .trigger = snd_fm801_playback_trigger,
  626. .pointer = snd_fm801_playback_pointer,
  627. };
  628. static const struct snd_pcm_ops snd_fm801_capture_ops = {
  629. .open = snd_fm801_capture_open,
  630. .close = snd_fm801_capture_close,
  631. .prepare = snd_fm801_capture_prepare,
  632. .trigger = snd_fm801_capture_trigger,
  633. .pointer = snd_fm801_capture_pointer,
  634. };
  635. static int snd_fm801_pcm(struct fm801 *chip, int device)
  636. {
  637. struct pci_dev *pdev = to_pci_dev(chip->dev);
  638. struct snd_pcm *pcm;
  639. int err;
  640. err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm);
  641. if (err < 0)
  642. return err;
  643. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
  644. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
  645. pcm->private_data = chip;
  646. pcm->info_flags = 0;
  647. strcpy(pcm->name, "FM801");
  648. chip->pcm = pcm;
  649. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &pdev->dev,
  650. chip->multichannel ? 128*1024 : 64*1024, 128*1024);
  651. return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  652. snd_pcm_alt_chmaps,
  653. chip->multichannel ? 6 : 2, 0,
  654. NULL);
  655. }
  656. /*
  657. * TEA5757 radio
  658. */
  659. #ifdef CONFIG_SND_FM801_TEA575X_BOOL
  660. /* GPIO to TEA575x maps */
  661. struct snd_fm801_tea575x_gpio {
  662. u8 data, clk, wren, most;
  663. char *name;
  664. };
  665. static const struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
  666. { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
  667. { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
  668. { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
  669. };
  670. #define get_tea575x_gpio(chip) \
  671. (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
  672. static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
  673. {
  674. struct fm801 *chip = tea->private_data;
  675. unsigned short reg = fm801_readw(chip, GPIO_CTRL);
  676. struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
  677. reg &= ~(FM801_GPIO_GP(gpio.data) |
  678. FM801_GPIO_GP(gpio.clk) |
  679. FM801_GPIO_GP(gpio.wren));
  680. reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
  681. reg |= (pins & TEA575X_CLK) ? FM801_GPIO_GP(gpio.clk) : 0;
  682. /* WRITE_ENABLE is inverted */
  683. reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
  684. fm801_writew(chip, GPIO_CTRL, reg);
  685. }
  686. static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
  687. {
  688. struct fm801 *chip = tea->private_data;
  689. unsigned short reg = fm801_readw(chip, GPIO_CTRL);
  690. struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
  691. u8 ret;
  692. ret = 0;
  693. if (reg & FM801_GPIO_GP(gpio.data))
  694. ret |= TEA575X_DATA;
  695. if (reg & FM801_GPIO_GP(gpio.most))
  696. ret |= TEA575X_MOST;
  697. return ret;
  698. }
  699. static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
  700. {
  701. struct fm801 *chip = tea->private_data;
  702. unsigned short reg = fm801_readw(chip, GPIO_CTRL);
  703. struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
  704. /* use GPIO lines and set write enable bit */
  705. reg |= FM801_GPIO_GS(gpio.data) |
  706. FM801_GPIO_GS(gpio.wren) |
  707. FM801_GPIO_GS(gpio.clk) |
  708. FM801_GPIO_GS(gpio.most);
  709. if (output) {
  710. /* all of lines are in the write direction */
  711. /* clear data and clock lines */
  712. reg &= ~(FM801_GPIO_GD(gpio.data) |
  713. FM801_GPIO_GD(gpio.wren) |
  714. FM801_GPIO_GD(gpio.clk) |
  715. FM801_GPIO_GP(gpio.data) |
  716. FM801_GPIO_GP(gpio.clk) |
  717. FM801_GPIO_GP(gpio.wren));
  718. } else {
  719. /* use GPIO lines, set data direction to input */
  720. reg |= FM801_GPIO_GD(gpio.data) |
  721. FM801_GPIO_GD(gpio.most) |
  722. FM801_GPIO_GP(gpio.data) |
  723. FM801_GPIO_GP(gpio.most) |
  724. FM801_GPIO_GP(gpio.wren);
  725. /* all of lines are in the write direction, except data */
  726. /* clear data, write enable and clock lines */
  727. reg &= ~(FM801_GPIO_GD(gpio.wren) |
  728. FM801_GPIO_GD(gpio.clk) |
  729. FM801_GPIO_GP(gpio.clk));
  730. }
  731. fm801_writew(chip, GPIO_CTRL, reg);
  732. }
  733. static const struct snd_tea575x_ops snd_fm801_tea_ops = {
  734. .set_pins = snd_fm801_tea575x_set_pins,
  735. .get_pins = snd_fm801_tea575x_get_pins,
  736. .set_direction = snd_fm801_tea575x_set_direction,
  737. };
  738. #endif
  739. /*
  740. * Mixer routines
  741. */
  742. #define FM801_SINGLE(xname, reg, shift, mask, invert) \
  743. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
  744. .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
  745. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  746. static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
  747. struct snd_ctl_elem_info *uinfo)
  748. {
  749. int mask = (kcontrol->private_value >> 16) & 0xff;
  750. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  751. uinfo->count = 1;
  752. uinfo->value.integer.min = 0;
  753. uinfo->value.integer.max = mask;
  754. return 0;
  755. }
  756. static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
  757. struct snd_ctl_elem_value *ucontrol)
  758. {
  759. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  760. int reg = kcontrol->private_value & 0xff;
  761. int shift = (kcontrol->private_value >> 8) & 0xff;
  762. int mask = (kcontrol->private_value >> 16) & 0xff;
  763. int invert = (kcontrol->private_value >> 24) & 0xff;
  764. long *value = ucontrol->value.integer.value;
  765. value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;
  766. if (invert)
  767. value[0] = mask - value[0];
  768. return 0;
  769. }
  770. static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
  771. struct snd_ctl_elem_value *ucontrol)
  772. {
  773. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  774. int reg = kcontrol->private_value & 0xff;
  775. int shift = (kcontrol->private_value >> 8) & 0xff;
  776. int mask = (kcontrol->private_value >> 16) & 0xff;
  777. int invert = (kcontrol->private_value >> 24) & 0xff;
  778. unsigned short val;
  779. val = (ucontrol->value.integer.value[0] & mask);
  780. if (invert)
  781. val = mask - val;
  782. return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
  783. }
  784. #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
  785. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
  786. .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
  787. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
  788. #define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
  789. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  790. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  791. .name = xname, .info = snd_fm801_info_double, \
  792. .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
  793. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
  794. .tlv = { .p = (xtlv) } }
  795. static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
  796. struct snd_ctl_elem_info *uinfo)
  797. {
  798. int mask = (kcontrol->private_value >> 16) & 0xff;
  799. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  800. uinfo->count = 2;
  801. uinfo->value.integer.min = 0;
  802. uinfo->value.integer.max = mask;
  803. return 0;
  804. }
  805. static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
  806. struct snd_ctl_elem_value *ucontrol)
  807. {
  808. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  809. int reg = kcontrol->private_value & 0xff;
  810. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  811. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  812. int mask = (kcontrol->private_value >> 16) & 0xff;
  813. int invert = (kcontrol->private_value >> 24) & 0xff;
  814. long *value = ucontrol->value.integer.value;
  815. spin_lock_irq(&chip->reg_lock);
  816. value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;
  817. value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;
  818. spin_unlock_irq(&chip->reg_lock);
  819. if (invert) {
  820. value[0] = mask - value[0];
  821. value[1] = mask - value[1];
  822. }
  823. return 0;
  824. }
  825. static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
  826. struct snd_ctl_elem_value *ucontrol)
  827. {
  828. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  829. int reg = kcontrol->private_value & 0xff;
  830. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  831. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  832. int mask = (kcontrol->private_value >> 16) & 0xff;
  833. int invert = (kcontrol->private_value >> 24) & 0xff;
  834. unsigned short val1, val2;
  835. val1 = ucontrol->value.integer.value[0] & mask;
  836. val2 = ucontrol->value.integer.value[1] & mask;
  837. if (invert) {
  838. val1 = mask - val1;
  839. val2 = mask - val2;
  840. }
  841. return snd_fm801_update_bits(chip, reg,
  842. (mask << shift_left) | (mask << shift_right),
  843. (val1 << shift_left ) | (val2 << shift_right));
  844. }
  845. static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
  846. struct snd_ctl_elem_info *uinfo)
  847. {
  848. static const char * const texts[5] = {
  849. "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
  850. };
  851. return snd_ctl_enum_info(uinfo, 1, 5, texts);
  852. }
  853. static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
  854. struct snd_ctl_elem_value *ucontrol)
  855. {
  856. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  857. unsigned short val;
  858. val = fm801_readw(chip, REC_SRC) & 7;
  859. if (val > 4)
  860. val = 4;
  861. ucontrol->value.enumerated.item[0] = val;
  862. return 0;
  863. }
  864. static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
  865. struct snd_ctl_elem_value *ucontrol)
  866. {
  867. struct fm801 *chip = snd_kcontrol_chip(kcontrol);
  868. unsigned short val;
  869. val = ucontrol->value.enumerated.item[0];
  870. if (val > 4)
  871. return -EINVAL;
  872. return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
  873. }
  874. static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
  875. #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
  876. static const struct snd_kcontrol_new snd_fm801_controls[] = {
  877. FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
  878. db_scale_dsp),
  879. FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
  880. FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
  881. db_scale_dsp),
  882. FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
  883. FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
  884. db_scale_dsp),
  885. FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
  886. {
  887. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  888. .name = "Digital Capture Source",
  889. .info = snd_fm801_info_mux,
  890. .get = snd_fm801_get_mux,
  891. .put = snd_fm801_put_mux,
  892. }
  893. };
  894. #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
  895. static const struct snd_kcontrol_new snd_fm801_controls_multi[] = {
  896. FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
  897. FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
  898. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
  899. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
  900. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
  901. FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
  902. };
  903. static int snd_fm801_mixer(struct fm801 *chip)
  904. {
  905. struct snd_ac97_template ac97;
  906. unsigned int i;
  907. int err;
  908. static const struct snd_ac97_bus_ops ops = {
  909. .write = snd_fm801_codec_write,
  910. .read = snd_fm801_codec_read,
  911. };
  912. err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
  913. if (err < 0)
  914. return err;
  915. memset(&ac97, 0, sizeof(ac97));
  916. ac97.private_data = chip;
  917. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
  918. if (err < 0)
  919. return err;
  920. if (chip->secondary) {
  921. ac97.num = 1;
  922. ac97.addr = chip->secondary_addr;
  923. err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec);
  924. if (err < 0)
  925. return err;
  926. }
  927. for (i = 0; i < FM801_CONTROLS; i++) {
  928. err = snd_ctl_add(chip->card,
  929. snd_ctl_new1(&snd_fm801_controls[i], chip));
  930. if (err < 0)
  931. return err;
  932. }
  933. if (chip->multichannel) {
  934. for (i = 0; i < FM801_CONTROLS_MULTI; i++) {
  935. err = snd_ctl_add(chip->card,
  936. snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
  937. if (err < 0)
  938. return err;
  939. }
  940. }
  941. return 0;
  942. }
  943. /*
  944. * initialization routines
  945. */
  946. static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
  947. unsigned short reg, unsigned long waits)
  948. {
  949. unsigned long timeout = jiffies + waits;
  950. fm801_writew(chip, AC97_CMD,
  951. reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
  952. udelay(5);
  953. do {
  954. if ((fm801_readw(chip, AC97_CMD) &
  955. (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
  956. return 0;
  957. schedule_timeout_uninterruptible(1);
  958. } while (time_after(timeout, jiffies));
  959. return -EIO;
  960. }
  961. static int reset_codec(struct fm801 *chip)
  962. {
  963. /* codec cold reset + AC'97 warm reset */
  964. fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
  965. fm801_readw(chip, CODEC_CTRL); /* flush posting data */
  966. udelay(100);
  967. fm801_writew(chip, CODEC_CTRL, 0);
  968. return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));
  969. }
  970. static void snd_fm801_chip_multichannel_init(struct fm801 *chip)
  971. {
  972. unsigned short cmdw;
  973. if (chip->multichannel) {
  974. if (chip->secondary_addr) {
  975. wait_for_codec(chip, chip->secondary_addr,
  976. AC97_VENDOR_ID1, msecs_to_jiffies(50));
  977. } else {
  978. /* my card has the secondary codec */
  979. /* at address #3, so the loop is inverted */
  980. int i;
  981. for (i = 3; i > 0; i--) {
  982. if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
  983. msecs_to_jiffies(50))) {
  984. cmdw = fm801_readw(chip, AC97_DATA);
  985. if (cmdw != 0xffff && cmdw != 0) {
  986. chip->secondary = 1;
  987. chip->secondary_addr = i;
  988. break;
  989. }
  990. }
  991. }
  992. }
  993. /* the recovery phase, it seems that probing for non-existing codec might */
  994. /* cause timeout problems */
  995. wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
  996. }
  997. }
  998. static void snd_fm801_chip_init(struct fm801 *chip)
  999. {
  1000. unsigned short cmdw;
  1001. /* init volume */
  1002. fm801_writew(chip, PCM_VOL, 0x0808);
  1003. fm801_writew(chip, FM_VOL, 0x9f1f);
  1004. fm801_writew(chip, I2S_VOL, 0x8808);
  1005. /* I2S control - I2S mode */
  1006. fm801_writew(chip, I2S_MODE, 0x0003);
  1007. /* interrupt setup */
  1008. cmdw = fm801_readw(chip, IRQ_MASK);
  1009. if (chip->irq < 0)
  1010. cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */
  1011. else
  1012. cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */
  1013. fm801_writew(chip, IRQ_MASK, cmdw);
  1014. /* interrupt clear */
  1015. fm801_writew(chip, IRQ_STATUS,
  1016. FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
  1017. }
  1018. static void snd_fm801_free(struct snd_card *card)
  1019. {
  1020. struct fm801 *chip = card->private_data;
  1021. unsigned short cmdw;
  1022. /* interrupt setup - mask everything */
  1023. cmdw = fm801_readw(chip, IRQ_MASK);
  1024. cmdw |= 0x00c3;
  1025. fm801_writew(chip, IRQ_MASK, cmdw);
  1026. #ifdef CONFIG_SND_FM801_TEA575X_BOOL
  1027. if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
  1028. snd_tea575x_exit(&chip->tea);
  1029. v4l2_device_unregister(&chip->v4l2_dev);
  1030. }
  1031. #endif
  1032. }
  1033. static int snd_fm801_create(struct snd_card *card,
  1034. struct pci_dev *pci,
  1035. int tea575x_tuner,
  1036. int radio_nr)
  1037. {
  1038. struct fm801 *chip = card->private_data;
  1039. int err;
  1040. err = pcim_enable_device(pci);
  1041. if (err < 0)
  1042. return err;
  1043. spin_lock_init(&chip->reg_lock);
  1044. chip->card = card;
  1045. chip->dev = &pci->dev;
  1046. chip->irq = -1;
  1047. chip->tea575x_tuner = tea575x_tuner;
  1048. err = pci_request_regions(pci, "FM801");
  1049. if (err < 0)
  1050. return err;
  1051. chip->port = pci_resource_start(pci, 0);
  1052. if (pci->revision >= 0xb1) /* FM801-AU */
  1053. chip->multichannel = 1;
  1054. if (!(chip->tea575x_tuner & TUNER_ONLY)) {
  1055. if (reset_codec(chip) < 0) {
  1056. dev_info(chip->card->dev,
  1057. "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
  1058. chip->tea575x_tuner = 3 | TUNER_ONLY;
  1059. } else {
  1060. snd_fm801_chip_multichannel_init(chip);
  1061. }
  1062. }
  1063. if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {
  1064. if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
  1065. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  1066. dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
  1067. return -EBUSY;
  1068. }
  1069. chip->irq = pci->irq;
  1070. card->sync_irq = chip->irq;
  1071. pci_set_master(pci);
  1072. }
  1073. card->private_free = snd_fm801_free;
  1074. snd_fm801_chip_init(chip);
  1075. #ifdef CONFIG_SND_FM801_TEA575X_BOOL
  1076. err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
  1077. if (err < 0)
  1078. return err;
  1079. chip->tea.v4l2_dev = &chip->v4l2_dev;
  1080. chip->tea.radio_nr = radio_nr;
  1081. chip->tea.private_data = chip;
  1082. chip->tea.ops = &snd_fm801_tea_ops;
  1083. sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
  1084. if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
  1085. (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {
  1086. if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
  1087. dev_err(card->dev, "TEA575x radio not found\n");
  1088. return -ENODEV;
  1089. }
  1090. } else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {
  1091. unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;
  1092. /* autodetect tuner connection */
  1093. for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
  1094. chip->tea575x_tuner = tea575x_tuner;
  1095. if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
  1096. dev_info(card->dev,
  1097. "detected TEA575x radio type %s\n",
  1098. get_tea575x_gpio(chip)->name);
  1099. break;
  1100. }
  1101. }
  1102. if (tea575x_tuner == 4) {
  1103. dev_err(card->dev, "TEA575x radio not found\n");
  1104. chip->tea575x_tuner = TUNER_DISABLED;
  1105. }
  1106. chip->tea575x_tuner |= tuner_only;
  1107. }
  1108. if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
  1109. strscpy(chip->tea.card, get_tea575x_gpio(chip)->name,
  1110. sizeof(chip->tea.card));
  1111. }
  1112. #endif
  1113. return 0;
  1114. }
  1115. static int __snd_card_fm801_probe(struct pci_dev *pci,
  1116. const struct pci_device_id *pci_id)
  1117. {
  1118. static int dev;
  1119. struct snd_card *card;
  1120. struct fm801 *chip;
  1121. struct snd_opl3 *opl3;
  1122. int err;
  1123. if (dev >= SNDRV_CARDS)
  1124. return -ENODEV;
  1125. if (!enable[dev]) {
  1126. dev++;
  1127. return -ENOENT;
  1128. }
  1129. err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  1130. sizeof(*chip), &card);
  1131. if (err < 0)
  1132. return err;
  1133. chip = card->private_data;
  1134. err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev]);
  1135. if (err < 0)
  1136. return err;
  1137. strcpy(card->driver, "FM801");
  1138. strcpy(card->shortname, "ForteMedia FM801-");
  1139. strcat(card->shortname, chip->multichannel ? "AU" : "AS");
  1140. sprintf(card->longname, "%s at 0x%lx, irq %i",
  1141. card->shortname, chip->port, chip->irq);
  1142. if (chip->tea575x_tuner & TUNER_ONLY)
  1143. goto __fm801_tuner_only;
  1144. err = snd_fm801_pcm(chip, 0);
  1145. if (err < 0)
  1146. return err;
  1147. err = snd_fm801_mixer(chip);
  1148. if (err < 0)
  1149. return err;
  1150. err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
  1151. chip->port + FM801_MPU401_DATA,
  1152. MPU401_INFO_INTEGRATED |
  1153. MPU401_INFO_IRQ_HOOK,
  1154. -1, &chip->rmidi);
  1155. if (err < 0)
  1156. return err;
  1157. err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
  1158. chip->port + FM801_OPL3_BANK1,
  1159. OPL3_HW_OPL3_FM801, 1, &opl3);
  1160. if (err < 0)
  1161. return err;
  1162. err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
  1163. if (err < 0)
  1164. return err;
  1165. __fm801_tuner_only:
  1166. err = snd_card_register(card);
  1167. if (err < 0)
  1168. return err;
  1169. pci_set_drvdata(pci, card);
  1170. dev++;
  1171. return 0;
  1172. }
  1173. static int snd_card_fm801_probe(struct pci_dev *pci,
  1174. const struct pci_device_id *pci_id)
  1175. {
  1176. return snd_card_free_on_error(&pci->dev, __snd_card_fm801_probe(pci, pci_id));
  1177. }
  1178. #ifdef CONFIG_PM_SLEEP
  1179. static const unsigned char saved_regs[] = {
  1180. FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
  1181. FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
  1182. FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
  1183. FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
  1184. };
  1185. static int snd_fm801_suspend(struct device *dev)
  1186. {
  1187. struct snd_card *card = dev_get_drvdata(dev);
  1188. struct fm801 *chip = card->private_data;
  1189. int i;
  1190. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1191. for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
  1192. chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);
  1193. if (chip->tea575x_tuner & TUNER_ONLY) {
  1194. /* FIXME: tea575x suspend */
  1195. } else {
  1196. snd_ac97_suspend(chip->ac97);
  1197. snd_ac97_suspend(chip->ac97_sec);
  1198. }
  1199. return 0;
  1200. }
  1201. static int snd_fm801_resume(struct device *dev)
  1202. {
  1203. struct snd_card *card = dev_get_drvdata(dev);
  1204. struct fm801 *chip = card->private_data;
  1205. int i;
  1206. if (chip->tea575x_tuner & TUNER_ONLY) {
  1207. snd_fm801_chip_init(chip);
  1208. } else {
  1209. reset_codec(chip);
  1210. snd_fm801_chip_multichannel_init(chip);
  1211. snd_fm801_chip_init(chip);
  1212. snd_ac97_resume(chip->ac97);
  1213. snd_ac97_resume(chip->ac97_sec);
  1214. }
  1215. for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
  1216. fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);
  1217. #ifdef CONFIG_SND_FM801_TEA575X_BOOL
  1218. if (!(chip->tea575x_tuner & TUNER_DISABLED))
  1219. snd_tea575x_set_freq(&chip->tea);
  1220. #endif
  1221. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1222. return 0;
  1223. }
  1224. static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
  1225. #define SND_FM801_PM_OPS &snd_fm801_pm
  1226. #else
  1227. #define SND_FM801_PM_OPS NULL
  1228. #endif /* CONFIG_PM_SLEEP */
  1229. static struct pci_driver fm801_driver = {
  1230. .name = KBUILD_MODNAME,
  1231. .id_table = snd_fm801_ids,
  1232. .probe = snd_card_fm801_probe,
  1233. .driver = {
  1234. .pm = SND_FM801_PM_OPS,
  1235. },
  1236. };
  1237. module_pci_driver(fm801_driver);