irq.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) by Jaroslav Kysela <[email protected]>
  4. * Creative Labs, Inc.
  5. * Routines for IRQ control of EMU10K1 chips
  6. *
  7. * BUGS:
  8. * --
  9. *
  10. * TODO:
  11. * --
  12. */
  13. #include <linux/time.h>
  14. #include <sound/core.h>
  15. #include <sound/emu10k1.h>
  16. irqreturn_t snd_emu10k1_interrupt(int irq, void *dev_id)
  17. {
  18. struct snd_emu10k1 *emu = dev_id;
  19. unsigned int status, status2, orig_status, orig_status2;
  20. int handled = 0;
  21. int timeout = 0;
  22. while (((status = inl(emu->port + IPR)) != 0) && (timeout < 1000)) {
  23. timeout++;
  24. orig_status = status;
  25. handled = 1;
  26. if ((status & 0xffffffff) == 0xffffffff) {
  27. dev_info(emu->card->dev,
  28. "Suspected sound card removal\n");
  29. break;
  30. }
  31. if (status & IPR_PCIERROR) {
  32. dev_err(emu->card->dev, "interrupt: PCI error\n");
  33. snd_emu10k1_intr_disable(emu, INTE_PCIERRORENABLE);
  34. status &= ~IPR_PCIERROR;
  35. }
  36. if (status & (IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE)) {
  37. if (emu->hwvol_interrupt)
  38. emu->hwvol_interrupt(emu, status);
  39. else
  40. snd_emu10k1_intr_disable(emu, INTE_VOLINCRENABLE|INTE_VOLDECRENABLE|INTE_MUTEENABLE);
  41. status &= ~(IPR_VOLINCR|IPR_VOLDECR|IPR_MUTE);
  42. }
  43. if (status & IPR_CHANNELLOOP) {
  44. int voice;
  45. int voice_max = status & IPR_CHANNELNUMBERMASK;
  46. u32 val;
  47. struct snd_emu10k1_voice *pvoice = emu->voices;
  48. val = snd_emu10k1_ptr_read(emu, CLIPL, 0);
  49. for (voice = 0; voice <= voice_max; voice++) {
  50. if (voice == 0x20)
  51. val = snd_emu10k1_ptr_read(emu, CLIPH, 0);
  52. if (val & 1) {
  53. if (pvoice->use && pvoice->interrupt != NULL) {
  54. pvoice->interrupt(emu, pvoice);
  55. snd_emu10k1_voice_intr_ack(emu, voice);
  56. } else {
  57. snd_emu10k1_voice_intr_disable(emu, voice);
  58. }
  59. }
  60. val >>= 1;
  61. pvoice++;
  62. }
  63. val = snd_emu10k1_ptr_read(emu, HLIPL, 0);
  64. for (voice = 0; voice <= voice_max; voice++) {
  65. if (voice == 0x20)
  66. val = snd_emu10k1_ptr_read(emu, HLIPH, 0);
  67. if (val & 1) {
  68. if (pvoice->use && pvoice->interrupt != NULL) {
  69. pvoice->interrupt(emu, pvoice);
  70. snd_emu10k1_voice_half_loop_intr_ack(emu, voice);
  71. } else {
  72. snd_emu10k1_voice_half_loop_intr_disable(emu, voice);
  73. }
  74. }
  75. val >>= 1;
  76. pvoice++;
  77. }
  78. status &= ~IPR_CHANNELLOOP;
  79. }
  80. status &= ~IPR_CHANNELNUMBERMASK;
  81. if (status & (IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL)) {
  82. if (emu->capture_interrupt)
  83. emu->capture_interrupt(emu, status);
  84. else
  85. snd_emu10k1_intr_disable(emu, INTE_ADCBUFENABLE);
  86. status &= ~(IPR_ADCBUFFULL|IPR_ADCBUFHALFFULL);
  87. }
  88. if (status & (IPR_MICBUFFULL|IPR_MICBUFHALFFULL)) {
  89. if (emu->capture_mic_interrupt)
  90. emu->capture_mic_interrupt(emu, status);
  91. else
  92. snd_emu10k1_intr_disable(emu, INTE_MICBUFENABLE);
  93. status &= ~(IPR_MICBUFFULL|IPR_MICBUFHALFFULL);
  94. }
  95. if (status & (IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL)) {
  96. if (emu->capture_efx_interrupt)
  97. emu->capture_efx_interrupt(emu, status);
  98. else
  99. snd_emu10k1_intr_disable(emu, INTE_EFXBUFENABLE);
  100. status &= ~(IPR_EFXBUFFULL|IPR_EFXBUFHALFFULL);
  101. }
  102. if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
  103. if (emu->midi.interrupt)
  104. emu->midi.interrupt(emu, status);
  105. else
  106. snd_emu10k1_intr_disable(emu, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
  107. status &= ~(IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY);
  108. }
  109. if (status & (IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2)) {
  110. if (emu->midi2.interrupt)
  111. emu->midi2.interrupt(emu, status);
  112. else
  113. snd_emu10k1_intr_disable(emu, INTE_A_MIDITXENABLE2|INTE_A_MIDIRXENABLE2);
  114. status &= ~(IPR_A_MIDITRANSBUFEMPTY2|IPR_A_MIDIRECVBUFEMPTY2);
  115. }
  116. if (status & IPR_INTERVALTIMER) {
  117. if (emu->timer)
  118. snd_timer_interrupt(emu->timer, emu->timer->sticks);
  119. else
  120. snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
  121. status &= ~IPR_INTERVALTIMER;
  122. }
  123. if (status & (IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE)) {
  124. if (emu->spdif_interrupt)
  125. emu->spdif_interrupt(emu, status);
  126. else
  127. snd_emu10k1_intr_disable(emu, INTE_GPSPDIFENABLE|INTE_CDSPDIFENABLE);
  128. status &= ~(IPR_GPSPDIFSTATUSCHANGE|IPR_CDROMSTATUSCHANGE);
  129. }
  130. if (status & IPR_FXDSP) {
  131. if (emu->dsp_interrupt)
  132. emu->dsp_interrupt(emu);
  133. else
  134. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  135. status &= ~IPR_FXDSP;
  136. }
  137. if (status & IPR_P16V) {
  138. while ((status2 = inl(emu->port + IPR2)) != 0) {
  139. u32 mask = INTE2_PLAYBACK_CH_0_LOOP; /* Full Loop */
  140. struct snd_emu10k1_voice *pvoice = &(emu->p16v_voices[0]);
  141. struct snd_emu10k1_voice *cvoice = &(emu->p16v_capture_voice);
  142. /* dev_dbg(emu->card->dev, "status2=0x%x\n", status2); */
  143. orig_status2 = status2;
  144. if(status2 & mask) {
  145. if(pvoice->use) {
  146. snd_pcm_period_elapsed(pvoice->epcm->substream);
  147. } else {
  148. dev_err(emu->card->dev,
  149. "p16v: status: 0x%08x, mask=0x%08x, pvoice=%p, use=%d\n",
  150. status2, mask, pvoice,
  151. pvoice->use);
  152. }
  153. }
  154. if(status2 & 0x110000) {
  155. /* dev_info(emu->card->dev, "capture int found\n"); */
  156. if(cvoice->use) {
  157. /* dev_info(emu->card->dev, "capture period_elapsed\n"); */
  158. snd_pcm_period_elapsed(cvoice->epcm->substream);
  159. }
  160. }
  161. outl(orig_status2, emu->port + IPR2); /* ack all */
  162. }
  163. status &= ~IPR_P16V;
  164. }
  165. if (status) {
  166. unsigned int bits;
  167. dev_err(emu->card->dev,
  168. "unhandled interrupt: 0x%08x\n", status);
  169. //make sure any interrupts we don't handle are disabled:
  170. bits = INTE_FXDSPENABLE |
  171. INTE_PCIERRORENABLE |
  172. INTE_VOLINCRENABLE |
  173. INTE_VOLDECRENABLE |
  174. INTE_MUTEENABLE |
  175. INTE_MICBUFENABLE |
  176. INTE_ADCBUFENABLE |
  177. INTE_EFXBUFENABLE |
  178. INTE_GPSPDIFENABLE |
  179. INTE_CDSPDIFENABLE |
  180. INTE_INTERVALTIMERENB |
  181. INTE_MIDITXENABLE |
  182. INTE_MIDIRXENABLE;
  183. if (emu->audigy)
  184. bits |= INTE_A_MIDITXENABLE2 | INTE_A_MIDIRXENABLE2;
  185. snd_emu10k1_intr_disable(emu, bits);
  186. }
  187. outl(orig_status, emu->port + IPR); /* ack all */
  188. }
  189. if (timeout == 1000)
  190. dev_info(emu->card->dev, "emu10k1 irq routine failure\n");
  191. return IRQ_RETVAL(handled);
  192. }