ca0106_main.c 55 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) 2004 James Courtier-Dutton <[email protected]>
  4. * Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
  5. * Version: 0.0.25
  6. *
  7. * FEATURES currently supported:
  8. * Front, Rear and Center/LFE.
  9. * Surround40 and Surround51.
  10. * Capture from MIC an LINE IN input.
  11. * SPDIF digital playback of PCM stereo and AC3/DTS works.
  12. * (One can use a standard mono mini-jack to one RCA plugs cable.
  13. * or one can use a standard stereo mini-jack to two RCA plugs cable.
  14. * Plug one of the RCA plugs into the Coax input of the external decoder/receiver.)
  15. * ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. )
  16. * Notes on how to capture sound:
  17. * The AC97 is used in the PLAYBACK direction.
  18. * The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC.
  19. * So, to record from the MIC, set the MIC Playback volume to max,
  20. * unmute the MIC and turn up the MASTER Playback volume.
  21. * So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume.
  22. *
  23. * The only playback controls that currently do anything are: -
  24. * Analog Front
  25. * Analog Rear
  26. * Analog Center/LFE
  27. * SPDIF Front
  28. * SPDIF Rear
  29. * SPDIF Center/LFE
  30. *
  31. * For capture from Mic in or Line in.
  32. * Digital/Analog ( switch must be in Analog mode for CAPTURE. )
  33. *
  34. * CAPTURE feedback into PLAYBACK
  35. *
  36. * Changelog:
  37. * Support interrupts per period.
  38. * Removed noise from Center/LFE channel when in Analog mode.
  39. * Rename and remove mixer controls.
  40. * 0.0.6
  41. * Use separate card based DMA buffer for periods table list.
  42. * 0.0.7
  43. * Change remove and rename ctrls into lists.
  44. * 0.0.8
  45. * Try to fix capture sources.
  46. * 0.0.9
  47. * Fix AC3 output.
  48. * Enable S32_LE format support.
  49. * 0.0.10
  50. * Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".)
  51. * 0.0.11
  52. * Add Model name recognition.
  53. * 0.0.12
  54. * Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period.
  55. * Remove redundent "voice" handling.
  56. * 0.0.13
  57. * Single trigger call for multi channels.
  58. * 0.0.14
  59. * Set limits based on what the sound card hardware can do.
  60. * playback periods_min=2, periods_max=8
  61. * capture hw constraints require period_size = n * 64 bytes.
  62. * playback hw constraints require period_size = n * 64 bytes.
  63. * 0.0.15
  64. * Minor updates.
  65. * 0.0.16
  66. * Implement 192000 sample rate.
  67. * 0.0.17
  68. * Add support for SB0410 and SB0413.
  69. * 0.0.18
  70. * Modified Copyright message.
  71. * 0.0.19
  72. * Finally fix support for SB Live 24 bit. SB0410 and SB0413.
  73. * The output codec needs resetting, otherwise all output is muted.
  74. * 0.0.20
  75. * Merge "pci_disable_device(pci);" fixes.
  76. * 0.0.21
  77. * Add 4 capture channels. (SPDIF only comes in on channel 0. )
  78. * Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.)
  79. * 0.0.22
  80. * Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901
  81. * 0.0.23
  82. * Implement support for Line-in capture on SB Live 24bit.
  83. * 0.0.24
  84. * Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
  85. * 0.0.25
  86. * Powerdown SPI DAC channels when not in use
  87. *
  88. * BUGS:
  89. * Some stability problems when unloading the snd-ca0106 kernel module.
  90. * --
  91. *
  92. * TODO:
  93. * 4 Capture channels, only one implemented so far.
  94. * Other capture rates apart from 48khz not implemented.
  95. * MIDI
  96. * --
  97. * GENERAL INFO:
  98. * Model: SB0310
  99. * P17 Chip: CA0106-DAT
  100. * AC97 Codec: STAC 9721
  101. * ADC: Philips 1361T (Stereo 24bit)
  102. * DAC: WM8746EDS (6-channel, 24bit, 192Khz)
  103. *
  104. * GENERAL INFO:
  105. * Model: SB0410
  106. * P17 Chip: CA0106-DAT
  107. * AC97 Codec: None
  108. * ADC: WM8775EDS (4 Channel)
  109. * DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support)
  110. * SPDIF Out control switches between Mic in and SPDIF out.
  111. * No sound out or mic input working yet.
  112. *
  113. * GENERAL INFO:
  114. * Model: SB0413
  115. * P17 Chip: CA0106-DAT
  116. * AC97 Codec: None.
  117. * ADC: Unknown
  118. * DAC: Unknown
  119. * Trying to handle it like the SB0410.
  120. *
  121. * This code was initially based on code from ALSA's emu10k1x.c which is:
  122. * Copyright (c) by Francisco Moraes <[email protected]>
  123. */
  124. #include <linux/delay.h>
  125. #include <linux/init.h>
  126. #include <linux/interrupt.h>
  127. #include <linux/pci.h>
  128. #include <linux/slab.h>
  129. #include <linux/module.h>
  130. #include <linux/dma-mapping.h>
  131. #include <sound/core.h>
  132. #include <sound/initval.h>
  133. #include <sound/pcm.h>
  134. #include <sound/ac97_codec.h>
  135. #include <sound/info.h>
  136. MODULE_AUTHOR("James Courtier-Dutton <[email protected]>");
  137. MODULE_DESCRIPTION("CA0106");
  138. MODULE_LICENSE("GPL");
  139. // module parameters (see "Module Parameters")
  140. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  141. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  142. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  143. static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
  144. module_param_array(index, int, NULL, 0444);
  145. MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
  146. module_param_array(id, charp, NULL, 0444);
  147. MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
  148. module_param_array(enable, bool, NULL, 0444);
  149. MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
  150. module_param_array(subsystem, uint, NULL, 0444);
  151. MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
  152. #include "ca0106.h"
  153. static const struct snd_ca0106_details ca0106_chip_details[] = {
  154. /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
  155. /* It is really just a normal SB Live 24bit. */
  156. /* Tested:
  157. * See ALSA bug#3251
  158. */
  159. { .serial = 0x10131102,
  160. .name = "X-Fi Extreme Audio [SBxxxx]",
  161. .gpio_type = 1,
  162. .i2c_adc = 1 } ,
  163. /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
  164. /* It is really just a normal SB Live 24bit. */
  165. /*
  166. * CTRL:CA0111-WTLF
  167. * ADC: WM8775SEDS
  168. * DAC: CS4382-KQZ
  169. */
  170. /* Tested:
  171. * Playback on front, rear, center/lfe speakers
  172. * Capture from Mic in.
  173. * Not-Tested:
  174. * Capture from Line in.
  175. * Playback to digital out.
  176. */
  177. { .serial = 0x10121102,
  178. .name = "X-Fi Extreme Audio [SB0790]",
  179. .gpio_type = 1,
  180. .i2c_adc = 1 } ,
  181. /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
  182. /* AudigyLS[SB0310] */
  183. { .serial = 0x10021102,
  184. .name = "AudigyLS [SB0310]",
  185. .ac97 = 1 } ,
  186. /* Unknown AudigyLS that also says SB0310 on it */
  187. { .serial = 0x10051102,
  188. .name = "AudigyLS [SB0310b]",
  189. .ac97 = 1 } ,
  190. /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */
  191. { .serial = 0x10061102,
  192. .name = "Live! 7.1 24bit [SB0410]",
  193. .gpio_type = 1,
  194. .i2c_adc = 1 } ,
  195. /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
  196. { .serial = 0x10071102,
  197. .name = "Live! 7.1 24bit [SB0413]",
  198. .gpio_type = 1,
  199. .i2c_adc = 1 } ,
  200. /* New Audigy SE. Has a different DAC. */
  201. /* SB0570:
  202. * CTRL:CA0106-DAT
  203. * ADC: WM8775EDS
  204. * DAC: WM8768GEDS
  205. */
  206. { .serial = 0x100a1102,
  207. .name = "Audigy SE [SB0570]",
  208. .gpio_type = 1,
  209. .i2c_adc = 1,
  210. .spi_dac = 0x4021 } ,
  211. /* New Audigy LS. Has a different DAC. */
  212. /* SB0570:
  213. * CTRL:CA0106-DAT
  214. * ADC: WM8775EDS
  215. * DAC: WM8768GEDS
  216. */
  217. { .serial = 0x10111102,
  218. .name = "Audigy SE OEM [SB0570a]",
  219. .gpio_type = 1,
  220. .i2c_adc = 1,
  221. .spi_dac = 0x4021 } ,
  222. /* Sound Blaster 5.1vx
  223. * Tested: Playback on front, rear, center/lfe speakers
  224. * Not-Tested: Capture
  225. */
  226. { .serial = 0x10041102,
  227. .name = "Sound Blaster 5.1vx [SB1070]",
  228. .gpio_type = 1,
  229. .i2c_adc = 0,
  230. .spi_dac = 0x0124
  231. } ,
  232. /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */
  233. /* SB0438
  234. * CTRL:CA0106-DAT
  235. * ADC: WM8775SEDS
  236. * DAC: CS4382-KQZ
  237. */
  238. { .serial = 0x10091462,
  239. .name = "MSI K8N Diamond MB [SB0438]",
  240. .gpio_type = 2,
  241. .i2c_adc = 1 } ,
  242. /* MSI K8N Diamond PLUS MB */
  243. { .serial = 0x10091102,
  244. .name = "MSI K8N Diamond MB",
  245. .gpio_type = 2,
  246. .i2c_adc = 1,
  247. .spi_dac = 0x4021 } ,
  248. /* Giga-byte GA-G1975X mobo
  249. * Novell bnc#395807
  250. */
  251. /* FIXME: the GPIO and I2C setting aren't tested well */
  252. { .serial = 0x1458a006,
  253. .name = "Giga-byte GA-G1975X",
  254. .gpio_type = 1,
  255. .i2c_adc = 1 },
  256. /* Shuttle XPC SD31P which has an onboard Creative Labs
  257. * Sound Blaster Live! 24-bit EAX
  258. * high-definition 7.1 audio processor".
  259. * Added using info from andrewvegan in alsa bug #1298
  260. */
  261. { .serial = 0x30381297,
  262. .name = "Shuttle XPC SD31P [SD31P]",
  263. .gpio_type = 1,
  264. .i2c_adc = 1 } ,
  265. /* Shuttle XPC SD11G5 which has an onboard Creative Labs
  266. * Sound Blaster Live! 24-bit EAX
  267. * high-definition 7.1 audio processor".
  268. * Fixes ALSA bug#1600
  269. */
  270. { .serial = 0x30411297,
  271. .name = "Shuttle XPC SD11G5 [SD11G5]",
  272. .gpio_type = 1,
  273. .i2c_adc = 1 } ,
  274. { .serial = 0,
  275. .name = "AudigyLS [Unknown]" }
  276. };
  277. /* hardware definition */
  278. static const struct snd_pcm_hardware snd_ca0106_playback_hw = {
  279. .info = SNDRV_PCM_INFO_MMAP |
  280. SNDRV_PCM_INFO_INTERLEAVED |
  281. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  282. SNDRV_PCM_INFO_MMAP_VALID |
  283. SNDRV_PCM_INFO_SYNC_START,
  284. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
  285. .rates = (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
  286. SNDRV_PCM_RATE_192000),
  287. .rate_min = 48000,
  288. .rate_max = 192000,
  289. .channels_min = 2, //1,
  290. .channels_max = 2, //6,
  291. .buffer_bytes_max = ((65536 - 64) * 8),
  292. .period_bytes_min = 64,
  293. .period_bytes_max = (65536 - 64),
  294. .periods_min = 2,
  295. .periods_max = 8,
  296. .fifo_size = 0,
  297. };
  298. static const struct snd_pcm_hardware snd_ca0106_capture_hw = {
  299. .info = (SNDRV_PCM_INFO_MMAP |
  300. SNDRV_PCM_INFO_INTERLEAVED |
  301. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  302. SNDRV_PCM_INFO_MMAP_VALID),
  303. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
  304. #if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */
  305. .rates = (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  306. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
  307. .rate_min = 44100,
  308. #else
  309. .rates = (SNDRV_PCM_RATE_48000 |
  310. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
  311. .rate_min = 48000,
  312. #endif /* FIXME */
  313. .rate_max = 192000,
  314. .channels_min = 2,
  315. .channels_max = 2,
  316. .buffer_bytes_max = 65536 - 128,
  317. .period_bytes_min = 64,
  318. .period_bytes_max = 32768 - 64,
  319. .periods_min = 2,
  320. .periods_max = 2,
  321. .fifo_size = 0,
  322. };
  323. unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
  324. unsigned int reg,
  325. unsigned int chn)
  326. {
  327. unsigned long flags;
  328. unsigned int regptr, val;
  329. regptr = (reg << 16) | chn;
  330. spin_lock_irqsave(&emu->emu_lock, flags);
  331. outl(regptr, emu->port + CA0106_PTR);
  332. val = inl(emu->port + CA0106_DATA);
  333. spin_unlock_irqrestore(&emu->emu_lock, flags);
  334. return val;
  335. }
  336. void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
  337. unsigned int reg,
  338. unsigned int chn,
  339. unsigned int data)
  340. {
  341. unsigned int regptr;
  342. unsigned long flags;
  343. regptr = (reg << 16) | chn;
  344. spin_lock_irqsave(&emu->emu_lock, flags);
  345. outl(regptr, emu->port + CA0106_PTR);
  346. outl(data, emu->port + CA0106_DATA);
  347. spin_unlock_irqrestore(&emu->emu_lock, flags);
  348. }
  349. int snd_ca0106_spi_write(struct snd_ca0106 * emu,
  350. unsigned int data)
  351. {
  352. unsigned int reset, set;
  353. unsigned int reg, tmp;
  354. int n, result;
  355. reg = SPI;
  356. if (data > 0xffff) /* Only 16bit values allowed */
  357. return 1;
  358. tmp = snd_ca0106_ptr_read(emu, reg, 0);
  359. reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
  360. set = reset | 0x10000; /* Set xxx1xxxx */
  361. snd_ca0106_ptr_write(emu, reg, 0, reset | data);
  362. tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */
  363. snd_ca0106_ptr_write(emu, reg, 0, set | data);
  364. result = 1;
  365. /* Wait for status bit to return to 0 */
  366. for (n = 0; n < 100; n++) {
  367. udelay(10);
  368. tmp = snd_ca0106_ptr_read(emu, reg, 0);
  369. if (!(tmp & 0x10000)) {
  370. result = 0;
  371. break;
  372. }
  373. }
  374. if (result) /* Timed out */
  375. return 1;
  376. snd_ca0106_ptr_write(emu, reg, 0, reset | data);
  377. tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */
  378. return 0;
  379. }
  380. /* The ADC does not support i2c read, so only write is implemented */
  381. int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
  382. u32 reg,
  383. u32 value)
  384. {
  385. u32 tmp;
  386. int timeout = 0;
  387. int status;
  388. int retry;
  389. if ((reg > 0x7f) || (value > 0x1ff)) {
  390. dev_err(emu->card->dev, "i2c_write: invalid values.\n");
  391. return -EINVAL;
  392. }
  393. tmp = reg << 25 | value << 16;
  394. /*
  395. dev_dbg(emu->card->dev, "I2C-write:reg=0x%x, value=0x%x\n", reg, value);
  396. */
  397. /* Not sure what this I2C channel controls. */
  398. /* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
  399. /* This controls the I2C connected to the WM8775 ADC Codec */
  400. snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
  401. for (retry = 0; retry < 10; retry++) {
  402. /* Send the data to i2c */
  403. //tmp = snd_ca0106_ptr_read(emu, I2C_A, 0);
  404. //tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
  405. tmp = 0;
  406. tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
  407. snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
  408. /* Wait till the transaction ends */
  409. while (1) {
  410. status = snd_ca0106_ptr_read(emu, I2C_A, 0);
  411. /*dev_dbg(emu->card->dev, "I2C:status=0x%x\n", status);*/
  412. timeout++;
  413. if ((status & I2C_A_ADC_START) == 0)
  414. break;
  415. if (timeout > 1000)
  416. break;
  417. }
  418. //Read back and see if the transaction is successful
  419. if ((status & I2C_A_ADC_ABORT) == 0)
  420. break;
  421. }
  422. if (retry == 10) {
  423. dev_err(emu->card->dev, "Writing to ADC failed!\n");
  424. return -EINVAL;
  425. }
  426. return 0;
  427. }
  428. static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
  429. {
  430. unsigned long flags;
  431. unsigned int intr_enable;
  432. spin_lock_irqsave(&emu->emu_lock, flags);
  433. intr_enable = inl(emu->port + CA0106_INTE) | intrenb;
  434. outl(intr_enable, emu->port + CA0106_INTE);
  435. spin_unlock_irqrestore(&emu->emu_lock, flags);
  436. }
  437. static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
  438. {
  439. unsigned long flags;
  440. unsigned int intr_enable;
  441. spin_lock_irqsave(&emu->emu_lock, flags);
  442. intr_enable = inl(emu->port + CA0106_INTE) & ~intrenb;
  443. outl(intr_enable, emu->port + CA0106_INTE);
  444. spin_unlock_irqrestore(&emu->emu_lock, flags);
  445. }
  446. static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
  447. {
  448. kfree(runtime->private_data);
  449. }
  450. static const int spi_dacd_reg[] = {
  451. SPI_DACD0_REG,
  452. SPI_DACD1_REG,
  453. SPI_DACD2_REG,
  454. 0,
  455. SPI_DACD4_REG,
  456. };
  457. static const int spi_dacd_bit[] = {
  458. SPI_DACD0_BIT,
  459. SPI_DACD1_BIT,
  460. SPI_DACD2_BIT,
  461. 0,
  462. SPI_DACD4_BIT,
  463. };
  464. static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
  465. {
  466. if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
  467. chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
  468. snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
  469. chip->spdif_str_bits[idx]);
  470. }
  471. }
  472. static int snd_ca0106_channel_dac(struct snd_ca0106 *chip,
  473. const struct snd_ca0106_details *details,
  474. int channel_id)
  475. {
  476. switch (channel_id) {
  477. case PCM_FRONT_CHANNEL:
  478. return (details->spi_dac & 0xf000) >> (4 * 3);
  479. case PCM_REAR_CHANNEL:
  480. return (details->spi_dac & 0x0f00) >> (4 * 2);
  481. case PCM_CENTER_LFE_CHANNEL:
  482. return (details->spi_dac & 0x00f0) >> (4 * 1);
  483. case PCM_UNKNOWN_CHANNEL:
  484. return (details->spi_dac & 0x000f) >> (4 * 0);
  485. default:
  486. dev_dbg(chip->card->dev, "ca0106: unknown channel_id %d\n",
  487. channel_id);
  488. }
  489. return 0;
  490. }
  491. static int snd_ca0106_pcm_power_dac(struct snd_ca0106 *chip, int channel_id,
  492. int power)
  493. {
  494. if (chip->details->spi_dac) {
  495. const int dac = snd_ca0106_channel_dac(chip, chip->details,
  496. channel_id);
  497. const int reg = spi_dacd_reg[dac];
  498. const int bit = spi_dacd_bit[dac];
  499. if (power)
  500. /* Power up */
  501. chip->spi_dac_reg[reg] &= ~bit;
  502. else
  503. /* Power down */
  504. chip->spi_dac_reg[reg] |= bit;
  505. if (snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]) != 0)
  506. return -ENXIO;
  507. }
  508. return 0;
  509. }
  510. /* open_playback callback */
  511. static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
  512. int channel_id)
  513. {
  514. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  515. struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
  516. struct snd_ca0106_pcm *epcm;
  517. struct snd_pcm_runtime *runtime = substream->runtime;
  518. int err;
  519. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  520. if (epcm == NULL)
  521. return -ENOMEM;
  522. epcm->emu = chip;
  523. epcm->substream = substream;
  524. epcm->channel_id=channel_id;
  525. runtime->private_data = epcm;
  526. runtime->private_free = snd_ca0106_pcm_free_substream;
  527. runtime->hw = snd_ca0106_playback_hw;
  528. channel->emu = chip;
  529. channel->number = channel_id;
  530. channel->use = 1;
  531. /*
  532. dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
  533. channel_id, chip, channel);
  534. */
  535. //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
  536. channel->epcm = epcm;
  537. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  538. if (err < 0)
  539. return err;
  540. err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
  541. if (err < 0)
  542. return err;
  543. snd_pcm_set_sync(substream);
  544. /* Front channel dac should already be on */
  545. if (channel_id != PCM_FRONT_CHANNEL) {
  546. err = snd_ca0106_pcm_power_dac(chip, channel_id, 1);
  547. if (err < 0)
  548. return err;
  549. }
  550. restore_spdif_bits(chip, channel_id);
  551. return 0;
  552. }
  553. /* close callback */
  554. static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
  555. {
  556. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  557. struct snd_pcm_runtime *runtime = substream->runtime;
  558. struct snd_ca0106_pcm *epcm = runtime->private_data;
  559. chip->playback_channels[epcm->channel_id].use = 0;
  560. restore_spdif_bits(chip, epcm->channel_id);
  561. /* Front channel dac should stay on */
  562. if (epcm->channel_id != PCM_FRONT_CHANNEL) {
  563. int err;
  564. err = snd_ca0106_pcm_power_dac(chip, epcm->channel_id, 0);
  565. if (err < 0)
  566. return err;
  567. }
  568. /* FIXME: maybe zero others */
  569. return 0;
  570. }
  571. static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
  572. {
  573. return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
  574. }
  575. static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
  576. {
  577. return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
  578. }
  579. static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
  580. {
  581. return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
  582. }
  583. static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
  584. {
  585. return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
  586. }
  587. /* open_capture callback */
  588. static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
  589. int channel_id)
  590. {
  591. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  592. struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
  593. struct snd_ca0106_pcm *epcm;
  594. struct snd_pcm_runtime *runtime = substream->runtime;
  595. int err;
  596. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  597. if (!epcm)
  598. return -ENOMEM;
  599. epcm->emu = chip;
  600. epcm->substream = substream;
  601. epcm->channel_id=channel_id;
  602. runtime->private_data = epcm;
  603. runtime->private_free = snd_ca0106_pcm_free_substream;
  604. runtime->hw = snd_ca0106_capture_hw;
  605. channel->emu = chip;
  606. channel->number = channel_id;
  607. channel->use = 1;
  608. /*
  609. dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
  610. channel_id, chip, channel);
  611. */
  612. //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
  613. channel->epcm = epcm;
  614. err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
  615. if (err < 0)
  616. return err;
  617. //snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes);
  618. err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
  619. if (err < 0)
  620. return err;
  621. return 0;
  622. }
  623. /* close callback */
  624. static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
  625. {
  626. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  627. struct snd_pcm_runtime *runtime = substream->runtime;
  628. struct snd_ca0106_pcm *epcm = runtime->private_data;
  629. chip->capture_channels[epcm->channel_id].use = 0;
  630. /* FIXME: maybe zero others */
  631. return 0;
  632. }
  633. static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
  634. {
  635. return snd_ca0106_pcm_open_capture_channel(substream, 0);
  636. }
  637. static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
  638. {
  639. return snd_ca0106_pcm_open_capture_channel(substream, 1);
  640. }
  641. static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
  642. {
  643. return snd_ca0106_pcm_open_capture_channel(substream, 2);
  644. }
  645. static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
  646. {
  647. return snd_ca0106_pcm_open_capture_channel(substream, 3);
  648. }
  649. /* prepare playback callback */
  650. static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
  651. {
  652. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  653. struct snd_pcm_runtime *runtime = substream->runtime;
  654. struct snd_ca0106_pcm *epcm = runtime->private_data;
  655. int channel = epcm->channel_id;
  656. u32 *table_base = (u32 *)(emu->buffer->area+(8*16*channel));
  657. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  658. u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
  659. u32 hcfg_set = 0x00000000;
  660. u32 hcfg;
  661. u32 reg40_mask = 0x30000 << (channel<<1);
  662. u32 reg40_set = 0;
  663. u32 reg40;
  664. /* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */
  665. u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */
  666. u32 reg71_set = 0;
  667. u32 reg71;
  668. int i;
  669. #if 0 /* debug */
  670. dev_dbg(emu->card->dev,
  671. "prepare:channel_number=%d, rate=%d, format=0x%x, "
  672. "channels=%d, buffer_size=%ld, period_size=%ld, "
  673. "periods=%u, frames_to_bytes=%d\n",
  674. channel, runtime->rate, runtime->format,
  675. runtime->channels, runtime->buffer_size,
  676. runtime->period_size, runtime->periods,
  677. frames_to_bytes(runtime, 1));
  678. dev_dbg(emu->card->dev,
  679. "dma_addr=%x, dma_area=%p, table_base=%p\n",
  680. runtime->dma_addr, runtime->dma_area, table_base);
  681. dev_dbg(emu->card->dev,
  682. "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
  683. emu->buffer->addr, emu->buffer->area, emu->buffer->bytes);
  684. #endif /* debug */
  685. /* Rate can be set per channel. */
  686. /* reg40 control host to fifo */
  687. /* reg71 controls DAC rate. */
  688. switch (runtime->rate) {
  689. case 44100:
  690. reg40_set = 0x10000 << (channel<<1);
  691. reg71_set = 0x01010000;
  692. break;
  693. case 48000:
  694. reg40_set = 0;
  695. reg71_set = 0;
  696. break;
  697. case 96000:
  698. reg40_set = 0x20000 << (channel<<1);
  699. reg71_set = 0x02020000;
  700. break;
  701. case 192000:
  702. reg40_set = 0x30000 << (channel<<1);
  703. reg71_set = 0x03030000;
  704. break;
  705. default:
  706. reg40_set = 0;
  707. reg71_set = 0;
  708. break;
  709. }
  710. /* Format is a global setting */
  711. /* FIXME: Only let the first channel accessed set this. */
  712. switch (runtime->format) {
  713. case SNDRV_PCM_FORMAT_S16_LE:
  714. hcfg_set = 0;
  715. break;
  716. case SNDRV_PCM_FORMAT_S32_LE:
  717. hcfg_set = HCFG_PLAYBACK_S32_LE;
  718. break;
  719. default:
  720. hcfg_set = 0;
  721. break;
  722. }
  723. hcfg = inl(emu->port + CA0106_HCFG) ;
  724. hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
  725. outl(hcfg, emu->port + CA0106_HCFG);
  726. reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
  727. reg40 = (reg40 & ~reg40_mask) | reg40_set;
  728. snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
  729. reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
  730. reg71 = (reg71 & ~reg71_mask) | reg71_set;
  731. snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
  732. /* FIXME: Check emu->buffer->size before actually writing to it. */
  733. for(i=0; i < runtime->periods; i++) {
  734. table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
  735. table_base[i*2+1] = period_size_bytes << 16;
  736. }
  737. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer->addr+(8*16*channel));
  738. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
  739. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
  740. snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
  741. snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
  742. /* FIXME test what 0 bytes does. */
  743. snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
  744. snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
  745. snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
  746. snd_ca0106_ptr_write(emu, 0x08, channel, 0);
  747. snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */
  748. #if 0
  749. snd_ca0106_ptr_write(emu, SPCS0, 0,
  750. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  751. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  752. SPCS_GENERATIONSTATUS | 0x00001200 |
  753. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
  754. #endif
  755. return 0;
  756. }
  757. /* prepare capture callback */
  758. static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
  759. {
  760. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  761. struct snd_pcm_runtime *runtime = substream->runtime;
  762. struct snd_ca0106_pcm *epcm = runtime->private_data;
  763. int channel = epcm->channel_id;
  764. u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
  765. u32 hcfg_set = 0x00000000;
  766. u32 hcfg;
  767. u32 over_sampling=0x2;
  768. u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */
  769. u32 reg71_set = 0;
  770. u32 reg71;
  771. #if 0 /* debug */
  772. dev_dbg(emu->card->dev,
  773. "prepare:channel_number=%d, rate=%d, format=0x%x, "
  774. "channels=%d, buffer_size=%ld, period_size=%ld, "
  775. "periods=%u, frames_to_bytes=%d\n",
  776. channel, runtime->rate, runtime->format,
  777. runtime->channels, runtime->buffer_size,
  778. runtime->period_size, runtime->periods,
  779. frames_to_bytes(runtime, 1));
  780. dev_dbg(emu->card->dev,
  781. "dma_addr=%x, dma_area=%p, table_base=%p\n",
  782. runtime->dma_addr, runtime->dma_area, table_base);
  783. dev_dbg(emu->card->dev,
  784. "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
  785. emu->buffer->addr, emu->buffer->area, emu->buffer->bytes);
  786. #endif /* debug */
  787. /* reg71 controls ADC rate. */
  788. switch (runtime->rate) {
  789. case 44100:
  790. reg71_set = 0x00004000;
  791. break;
  792. case 48000:
  793. reg71_set = 0;
  794. break;
  795. case 96000:
  796. reg71_set = 0x00008000;
  797. over_sampling=0xa;
  798. break;
  799. case 192000:
  800. reg71_set = 0x0000c000;
  801. over_sampling=0xa;
  802. break;
  803. default:
  804. reg71_set = 0;
  805. break;
  806. }
  807. /* Format is a global setting */
  808. /* FIXME: Only let the first channel accessed set this. */
  809. switch (runtime->format) {
  810. case SNDRV_PCM_FORMAT_S16_LE:
  811. hcfg_set = 0;
  812. break;
  813. case SNDRV_PCM_FORMAT_S32_LE:
  814. hcfg_set = HCFG_CAPTURE_S32_LE;
  815. break;
  816. default:
  817. hcfg_set = 0;
  818. break;
  819. }
  820. hcfg = inl(emu->port + CA0106_HCFG) ;
  821. hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
  822. outl(hcfg, emu->port + CA0106_HCFG);
  823. reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
  824. reg71 = (reg71 & ~reg71_mask) | reg71_set;
  825. snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
  826. if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */
  827. snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */
  828. }
  829. /*
  830. dev_dbg(emu->card->dev,
  831. "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, "
  832. "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",
  833. channel, runtime->rate, runtime->format, runtime->channels,
  834. runtime->buffer_size, runtime->period_size,
  835. frames_to_bytes(runtime, 1));
  836. */
  837. snd_ca0106_ptr_write(emu, 0x13, channel, 0);
  838. snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
  839. snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  840. snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
  841. return 0;
  842. }
  843. /* trigger_playback callback */
  844. static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
  845. int cmd)
  846. {
  847. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  848. struct snd_pcm_runtime *runtime;
  849. struct snd_ca0106_pcm *epcm;
  850. int channel;
  851. int result = 0;
  852. struct snd_pcm_substream *s;
  853. u32 basic = 0;
  854. u32 extended = 0;
  855. u32 bits;
  856. int running = 0;
  857. switch (cmd) {
  858. case SNDRV_PCM_TRIGGER_START:
  859. case SNDRV_PCM_TRIGGER_RESUME:
  860. running = 1;
  861. break;
  862. case SNDRV_PCM_TRIGGER_STOP:
  863. case SNDRV_PCM_TRIGGER_SUSPEND:
  864. default:
  865. running = 0;
  866. break;
  867. }
  868. snd_pcm_group_for_each_entry(s, substream) {
  869. if (snd_pcm_substream_chip(s) != emu ||
  870. s->stream != SNDRV_PCM_STREAM_PLAYBACK)
  871. continue;
  872. runtime = s->runtime;
  873. epcm = runtime->private_data;
  874. channel = epcm->channel_id;
  875. /* dev_dbg(emu->card->dev, "channel=%d\n", channel); */
  876. epcm->running = running;
  877. basic |= (0x1 << channel);
  878. extended |= (0x10 << channel);
  879. snd_pcm_trigger_done(s, substream);
  880. }
  881. /* dev_dbg(emu->card->dev, "basic=0x%x, extended=0x%x\n",basic, extended); */
  882. switch (cmd) {
  883. case SNDRV_PCM_TRIGGER_START:
  884. case SNDRV_PCM_TRIGGER_RESUME:
  885. bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
  886. bits |= extended;
  887. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
  888. bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
  889. bits |= basic;
  890. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
  891. break;
  892. case SNDRV_PCM_TRIGGER_STOP:
  893. case SNDRV_PCM_TRIGGER_SUSPEND:
  894. bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
  895. bits &= ~basic;
  896. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
  897. bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
  898. bits &= ~extended;
  899. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
  900. break;
  901. default:
  902. result = -EINVAL;
  903. break;
  904. }
  905. return result;
  906. }
  907. /* trigger_capture callback */
  908. static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
  909. int cmd)
  910. {
  911. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  912. struct snd_pcm_runtime *runtime = substream->runtime;
  913. struct snd_ca0106_pcm *epcm = runtime->private_data;
  914. int channel = epcm->channel_id;
  915. int result = 0;
  916. switch (cmd) {
  917. case SNDRV_PCM_TRIGGER_START:
  918. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
  919. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
  920. epcm->running = 1;
  921. break;
  922. case SNDRV_PCM_TRIGGER_STOP:
  923. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
  924. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
  925. epcm->running = 0;
  926. break;
  927. default:
  928. result = -EINVAL;
  929. break;
  930. }
  931. return result;
  932. }
  933. /* pointer_playback callback */
  934. static snd_pcm_uframes_t
  935. snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
  936. {
  937. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  938. struct snd_pcm_runtime *runtime = substream->runtime;
  939. struct snd_ca0106_pcm *epcm = runtime->private_data;
  940. unsigned int ptr, prev_ptr;
  941. int channel = epcm->channel_id;
  942. int timeout = 10;
  943. if (!epcm->running)
  944. return 0;
  945. prev_ptr = -1;
  946. do {
  947. ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  948. ptr = (ptr >> 3) * runtime->period_size;
  949. ptr += bytes_to_frames(runtime,
  950. snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel));
  951. if (ptr >= runtime->buffer_size)
  952. ptr -= runtime->buffer_size;
  953. if (prev_ptr == ptr)
  954. return ptr;
  955. prev_ptr = ptr;
  956. } while (--timeout);
  957. dev_warn(emu->card->dev, "ca0106: unstable DMA pointer!\n");
  958. return 0;
  959. }
  960. /* pointer_capture callback */
  961. static snd_pcm_uframes_t
  962. snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
  963. {
  964. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  965. struct snd_pcm_runtime *runtime = substream->runtime;
  966. struct snd_ca0106_pcm *epcm = runtime->private_data;
  967. snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
  968. int channel = epcm->channel_id;
  969. if (!epcm->running)
  970. return 0;
  971. ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
  972. ptr2 = bytes_to_frames(runtime, ptr1);
  973. ptr=ptr2;
  974. if (ptr >= runtime->buffer_size)
  975. ptr -= runtime->buffer_size;
  976. /*
  977. dev_dbg(emu->card->dev, "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
  978. "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
  979. ptr1, ptr2, ptr, (int)runtime->buffer_size,
  980. (int)runtime->period_size, (int)runtime->frame_bits,
  981. (int)runtime->rate);
  982. */
  983. return ptr;
  984. }
  985. /* operators */
  986. static const struct snd_pcm_ops snd_ca0106_playback_front_ops = {
  987. .open = snd_ca0106_pcm_open_playback_front,
  988. .close = snd_ca0106_pcm_close_playback,
  989. .prepare = snd_ca0106_pcm_prepare_playback,
  990. .trigger = snd_ca0106_pcm_trigger_playback,
  991. .pointer = snd_ca0106_pcm_pointer_playback,
  992. };
  993. static const struct snd_pcm_ops snd_ca0106_capture_0_ops = {
  994. .open = snd_ca0106_pcm_open_0_capture,
  995. .close = snd_ca0106_pcm_close_capture,
  996. .prepare = snd_ca0106_pcm_prepare_capture,
  997. .trigger = snd_ca0106_pcm_trigger_capture,
  998. .pointer = snd_ca0106_pcm_pointer_capture,
  999. };
  1000. static const struct snd_pcm_ops snd_ca0106_capture_1_ops = {
  1001. .open = snd_ca0106_pcm_open_1_capture,
  1002. .close = snd_ca0106_pcm_close_capture,
  1003. .prepare = snd_ca0106_pcm_prepare_capture,
  1004. .trigger = snd_ca0106_pcm_trigger_capture,
  1005. .pointer = snd_ca0106_pcm_pointer_capture,
  1006. };
  1007. static const struct snd_pcm_ops snd_ca0106_capture_2_ops = {
  1008. .open = snd_ca0106_pcm_open_2_capture,
  1009. .close = snd_ca0106_pcm_close_capture,
  1010. .prepare = snd_ca0106_pcm_prepare_capture,
  1011. .trigger = snd_ca0106_pcm_trigger_capture,
  1012. .pointer = snd_ca0106_pcm_pointer_capture,
  1013. };
  1014. static const struct snd_pcm_ops snd_ca0106_capture_3_ops = {
  1015. .open = snd_ca0106_pcm_open_3_capture,
  1016. .close = snd_ca0106_pcm_close_capture,
  1017. .prepare = snd_ca0106_pcm_prepare_capture,
  1018. .trigger = snd_ca0106_pcm_trigger_capture,
  1019. .pointer = snd_ca0106_pcm_pointer_capture,
  1020. };
  1021. static const struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
  1022. .open = snd_ca0106_pcm_open_playback_center_lfe,
  1023. .close = snd_ca0106_pcm_close_playback,
  1024. .prepare = snd_ca0106_pcm_prepare_playback,
  1025. .trigger = snd_ca0106_pcm_trigger_playback,
  1026. .pointer = snd_ca0106_pcm_pointer_playback,
  1027. };
  1028. static const struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
  1029. .open = snd_ca0106_pcm_open_playback_unknown,
  1030. .close = snd_ca0106_pcm_close_playback,
  1031. .prepare = snd_ca0106_pcm_prepare_playback,
  1032. .trigger = snd_ca0106_pcm_trigger_playback,
  1033. .pointer = snd_ca0106_pcm_pointer_playback,
  1034. };
  1035. static const struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
  1036. .open = snd_ca0106_pcm_open_playback_rear,
  1037. .close = snd_ca0106_pcm_close_playback,
  1038. .prepare = snd_ca0106_pcm_prepare_playback,
  1039. .trigger = snd_ca0106_pcm_trigger_playback,
  1040. .pointer = snd_ca0106_pcm_pointer_playback,
  1041. };
  1042. static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
  1043. unsigned short reg)
  1044. {
  1045. struct snd_ca0106 *emu = ac97->private_data;
  1046. unsigned long flags;
  1047. unsigned short val;
  1048. spin_lock_irqsave(&emu->emu_lock, flags);
  1049. outb(reg, emu->port + CA0106_AC97ADDRESS);
  1050. val = inw(emu->port + CA0106_AC97DATA);
  1051. spin_unlock_irqrestore(&emu->emu_lock, flags);
  1052. return val;
  1053. }
  1054. static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
  1055. unsigned short reg, unsigned short val)
  1056. {
  1057. struct snd_ca0106 *emu = ac97->private_data;
  1058. unsigned long flags;
  1059. spin_lock_irqsave(&emu->emu_lock, flags);
  1060. outb(reg, emu->port + CA0106_AC97ADDRESS);
  1061. outw(val, emu->port + CA0106_AC97DATA);
  1062. spin_unlock_irqrestore(&emu->emu_lock, flags);
  1063. }
  1064. static int snd_ca0106_ac97(struct snd_ca0106 *chip)
  1065. {
  1066. struct snd_ac97_bus *pbus;
  1067. struct snd_ac97_template ac97;
  1068. int err;
  1069. static const struct snd_ac97_bus_ops ops = {
  1070. .write = snd_ca0106_ac97_write,
  1071. .read = snd_ca0106_ac97_read,
  1072. };
  1073. err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
  1074. if (err < 0)
  1075. return err;
  1076. pbus->no_vra = 1; /* we don't need VRA */
  1077. memset(&ac97, 0, sizeof(ac97));
  1078. ac97.private_data = chip;
  1079. ac97.scaps = AC97_SCAP_NO_SPDIF;
  1080. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1081. }
  1082. static void ca0106_stop_chip(struct snd_ca0106 *chip);
  1083. static void snd_ca0106_free(struct snd_card *card)
  1084. {
  1085. struct snd_ca0106 *chip = card->private_data;
  1086. ca0106_stop_chip(chip);
  1087. }
  1088. static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
  1089. {
  1090. unsigned int status;
  1091. struct snd_ca0106 *chip = dev_id;
  1092. int i;
  1093. int mask;
  1094. unsigned int stat76;
  1095. struct snd_ca0106_channel *pchannel;
  1096. status = inl(chip->port + CA0106_IPR);
  1097. if (! status)
  1098. return IRQ_NONE;
  1099. stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
  1100. /*
  1101. dev_dbg(emu->card->dev, "interrupt status = 0x%08x, stat76=0x%08x\n",
  1102. status, stat76);
  1103. dev_dbg(emu->card->dev, "ptr=0x%08x\n",
  1104. snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
  1105. */
  1106. mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
  1107. for(i = 0; i < 4; i++) {
  1108. pchannel = &(chip->playback_channels[i]);
  1109. if (stat76 & mask) {
  1110. /* FIXME: Select the correct substream for period elapsed */
  1111. if(pchannel->use) {
  1112. snd_pcm_period_elapsed(pchannel->epcm->substream);
  1113. /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
  1114. }
  1115. }
  1116. /*
  1117. dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
  1118. dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
  1119. */
  1120. mask <<= 1;
  1121. }
  1122. mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */
  1123. for(i = 0; i < 4; i++) {
  1124. pchannel = &(chip->capture_channels[i]);
  1125. if (stat76 & mask) {
  1126. /* FIXME: Select the correct substream for period elapsed */
  1127. if(pchannel->use) {
  1128. snd_pcm_period_elapsed(pchannel->epcm->substream);
  1129. /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
  1130. }
  1131. }
  1132. /*
  1133. dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
  1134. dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
  1135. */
  1136. mask <<= 1;
  1137. }
  1138. snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
  1139. if (chip->midi.dev_id &&
  1140. (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
  1141. if (chip->midi.interrupt)
  1142. chip->midi.interrupt(&chip->midi, status);
  1143. else
  1144. chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
  1145. }
  1146. // acknowledge the interrupt if necessary
  1147. outl(status, chip->port + CA0106_IPR);
  1148. return IRQ_HANDLED;
  1149. }
  1150. static const struct snd_pcm_chmap_elem surround_map[] = {
  1151. { .channels = 2,
  1152. .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
  1153. { }
  1154. };
  1155. static const struct snd_pcm_chmap_elem clfe_map[] = {
  1156. { .channels = 2,
  1157. .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
  1158. { }
  1159. };
  1160. static const struct snd_pcm_chmap_elem side_map[] = {
  1161. { .channels = 2,
  1162. .map = { SNDRV_CHMAP_SL, SNDRV_CHMAP_SR } },
  1163. { }
  1164. };
  1165. static int snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
  1166. {
  1167. struct snd_pcm *pcm;
  1168. struct snd_pcm_substream *substream;
  1169. const struct snd_pcm_chmap_elem *map = NULL;
  1170. int err;
  1171. err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
  1172. if (err < 0)
  1173. return err;
  1174. pcm->private_data = emu;
  1175. switch (device) {
  1176. case 0:
  1177. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
  1178. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
  1179. map = snd_pcm_std_chmaps;
  1180. break;
  1181. case 1:
  1182. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
  1183. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
  1184. map = surround_map;
  1185. break;
  1186. case 2:
  1187. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
  1188. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
  1189. map = clfe_map;
  1190. break;
  1191. case 3:
  1192. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
  1193. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
  1194. map = side_map;
  1195. break;
  1196. }
  1197. pcm->info_flags = 0;
  1198. strcpy(pcm->name, "CA0106");
  1199. for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1200. substream;
  1201. substream = substream->next) {
  1202. snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
  1203. &emu->pci->dev,
  1204. 64*1024, 64*1024);
  1205. }
  1206. for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
  1207. substream;
  1208. substream = substream->next) {
  1209. snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
  1210. &emu->pci->dev,
  1211. 64*1024, 64*1024);
  1212. }
  1213. err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
  1214. 1 << 2, NULL);
  1215. if (err < 0)
  1216. return err;
  1217. emu->pcm[device] = pcm;
  1218. return 0;
  1219. }
  1220. #define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
  1221. static const unsigned int spi_dac_init[] = {
  1222. SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
  1223. SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
  1224. SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
  1225. SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
  1226. SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
  1227. SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
  1228. SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
  1229. SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
  1230. SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
  1231. SPI_REG(9, 0x00),
  1232. SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
  1233. SPI_REG(12, 0x00),
  1234. SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB),
  1235. SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
  1236. SPI_REG(SPI_DACD4_REG, SPI_DACD4_BIT),
  1237. };
  1238. static const unsigned int i2c_adc_init[][2] = {
  1239. { 0x17, 0x00 }, /* Reset */
  1240. { 0x07, 0x00 }, /* Timeout */
  1241. { 0x0b, 0x22 }, /* Interface control */
  1242. { 0x0c, 0x22 }, /* Master mode control */
  1243. { 0x0d, 0x08 }, /* Powerdown control */
  1244. { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
  1245. { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
  1246. { 0x10, 0x7b }, /* ALC Control 1 */
  1247. { 0x11, 0x00 }, /* ALC Control 2 */
  1248. { 0x12, 0x32 }, /* ALC Control 3 */
  1249. { 0x13, 0x00 }, /* Noise gate control */
  1250. { 0x14, 0xa6 }, /* Limiter control */
  1251. { 0x15, ADC_MUX_LINEIN }, /* ADC Mixer control */
  1252. };
  1253. static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
  1254. {
  1255. int ch;
  1256. unsigned int def_bits;
  1257. outl(0, chip->port + CA0106_INTE);
  1258. /*
  1259. * Init to 0x02109204 :
  1260. * Clock accuracy = 0 (1000ppm)
  1261. * Sample Rate = 2 (48kHz)
  1262. * Audio Channel = 1 (Left of 2)
  1263. * Source Number = 0 (Unspecified)
  1264. * Generation Status = 1 (Original for Cat Code 12)
  1265. * Cat Code = 12 (Digital Signal Mixer)
  1266. * Mode = 0 (Mode 0)
  1267. * Emphasis = 0 (None)
  1268. * CP = 1 (Copyright unasserted)
  1269. * AN = 0 (Audio data)
  1270. * P = 0 (Consumer)
  1271. */
  1272. def_bits =
  1273. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  1274. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  1275. SPCS_GENERATIONSTATUS | 0x00001200 |
  1276. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
  1277. if (!resume) {
  1278. chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
  1279. chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
  1280. chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
  1281. chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
  1282. }
  1283. /* Only SPCS1 has been tested */
  1284. snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
  1285. snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
  1286. snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
  1287. snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
  1288. snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
  1289. snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
  1290. /* Write 0x8000 to AC97_REC_GAIN to mute it. */
  1291. outb(AC97_REC_GAIN, chip->port + CA0106_AC97ADDRESS);
  1292. outw(0x8000, chip->port + CA0106_AC97DATA);
  1293. #if 0 /* FIXME: what are these? */
  1294. snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
  1295. snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
  1296. snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
  1297. snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
  1298. #endif
  1299. /* OSS drivers set this. */
  1300. /* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */
  1301. /* Analog or Digital output */
  1302. snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
  1303. /* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers.
  1304. * Use 0x000f0000 for surround71
  1305. */
  1306. snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
  1307. chip->spdif_enable = 0; /* Set digital SPDIF output off */
  1308. /*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */
  1309. /*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */
  1310. /* goes to 0x40c80000 when doing SPDIF IN/OUT */
  1311. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
  1312. /* (Mute) CAPTURE feedback into PLAYBACK volume.
  1313. * Only lower 16 bits matter.
  1314. */
  1315. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
  1316. /* SPDIF IN Volume */
  1317. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
  1318. /* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */
  1319. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
  1320. snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
  1321. snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
  1322. snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
  1323. snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
  1324. for (ch = 0; ch < 4; ch++) {
  1325. /* Only high 16 bits matter */
  1326. snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
  1327. snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
  1328. #if 0 /* Mute */
  1329. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
  1330. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
  1331. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
  1332. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
  1333. #endif
  1334. }
  1335. if (chip->details->i2c_adc == 1) {
  1336. /* Select MIC, Line in, TAD in, AUX in */
  1337. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
  1338. /* Default to CAPTURE_SOURCE to i2s in */
  1339. if (!resume)
  1340. chip->capture_source = 3;
  1341. } else if (chip->details->ac97 == 1) {
  1342. /* Default to AC97 in */
  1343. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
  1344. /* Default to CAPTURE_SOURCE to AC97 in */
  1345. if (!resume)
  1346. chip->capture_source = 4;
  1347. } else {
  1348. /* Select MIC, Line in, TAD in, AUX in */
  1349. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
  1350. /* Default to Set CAPTURE_SOURCE to i2s in */
  1351. if (!resume)
  1352. chip->capture_source = 3;
  1353. }
  1354. if (chip->details->gpio_type == 2) {
  1355. /* The SB0438 use GPIO differently. */
  1356. /* FIXME: Still need to find out what the other GPIO bits do.
  1357. * E.g. For digital spdif out.
  1358. */
  1359. outl(0x0, chip->port + CA0106_GPIO);
  1360. /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
  1361. outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
  1362. } else if (chip->details->gpio_type == 1) {
  1363. /* The SB0410 and SB0413 use GPIO differently. */
  1364. /* FIXME: Still need to find out what the other GPIO bits do.
  1365. * E.g. For digital spdif out.
  1366. */
  1367. outl(0x0, chip->port + CA0106_GPIO);
  1368. /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
  1369. outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
  1370. } else {
  1371. outl(0x0, chip->port + CA0106_GPIO);
  1372. outl(0x005f03a3, chip->port + CA0106_GPIO); /* Analog */
  1373. /* outl(0x005f02a2, chip->port + CA0106_GPIO); */ /* SPDIF */
  1374. }
  1375. snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */
  1376. /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
  1377. /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
  1378. /* outl(0x00001409, chip->port + CA0106_HCFG); */
  1379. /* outl(0x00000009, chip->port + CA0106_HCFG); */
  1380. /* AC97 2.0, Enable outputs. */
  1381. outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port + CA0106_HCFG);
  1382. if (chip->details->i2c_adc == 1) {
  1383. /* The SB0410 and SB0413 use I2C to control ADC. */
  1384. int size, n;
  1385. size = ARRAY_SIZE(i2c_adc_init);
  1386. /* dev_dbg(emu->card->dev, "I2C:array size=0x%x\n", size); */
  1387. for (n = 0; n < size; n++)
  1388. snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
  1389. i2c_adc_init[n][1]);
  1390. for (n = 0; n < 4; n++) {
  1391. chip->i2c_capture_volume[n][0] = 0xcf;
  1392. chip->i2c_capture_volume[n][1] = 0xcf;
  1393. }
  1394. chip->i2c_capture_source = 2; /* Line in */
  1395. /* Enable Line-in capture. MIC in currently untested. */
  1396. /* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */
  1397. }
  1398. if (chip->details->spi_dac) {
  1399. /* The SB0570 use SPI to control DAC. */
  1400. int size, n;
  1401. size = ARRAY_SIZE(spi_dac_init);
  1402. for (n = 0; n < size; n++) {
  1403. int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
  1404. snd_ca0106_spi_write(chip, spi_dac_init[n]);
  1405. if (reg < ARRAY_SIZE(chip->spi_dac_reg))
  1406. chip->spi_dac_reg[reg] = spi_dac_init[n];
  1407. }
  1408. /* Enable front dac only */
  1409. snd_ca0106_pcm_power_dac(chip, PCM_FRONT_CHANNEL, 1);
  1410. }
  1411. }
  1412. static void ca0106_stop_chip(struct snd_ca0106 *chip)
  1413. {
  1414. /* disable interrupts */
  1415. snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
  1416. outl(0, chip->port + CA0106_INTE);
  1417. snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
  1418. udelay(1000);
  1419. /* disable audio */
  1420. /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
  1421. outl(0, chip->port + CA0106_HCFG);
  1422. /* FIXME: We need to stop and DMA transfers here.
  1423. * But as I am not sure how yet, we cannot from the dma pages.
  1424. * So we can fix: snd-malloc: Memory leak? pages not freed = 8
  1425. */
  1426. }
  1427. static int snd_ca0106_create(int dev, struct snd_card *card,
  1428. struct pci_dev *pci)
  1429. {
  1430. struct snd_ca0106 *chip = card->private_data;
  1431. const struct snd_ca0106_details *c;
  1432. int err;
  1433. err = pcim_enable_device(pci);
  1434. if (err < 0)
  1435. return err;
  1436. if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) {
  1437. dev_err(card->dev, "error to set 32bit mask DMA\n");
  1438. return -ENXIO;
  1439. }
  1440. chip->card = card;
  1441. chip->pci = pci;
  1442. chip->irq = -1;
  1443. spin_lock_init(&chip->emu_lock);
  1444. err = pci_request_regions(pci, "snd_ca0106");
  1445. if (err < 0)
  1446. return err;
  1447. chip->port = pci_resource_start(pci, 0);
  1448. if (devm_request_irq(&pci->dev, pci->irq, snd_ca0106_interrupt,
  1449. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  1450. dev_err(card->dev, "cannot grab irq\n");
  1451. return -EBUSY;
  1452. }
  1453. chip->irq = pci->irq;
  1454. card->sync_irq = chip->irq;
  1455. /* This stores the periods table. */
  1456. chip->buffer = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 1024);
  1457. if (!chip->buffer)
  1458. return -ENOMEM;
  1459. pci_set_master(pci);
  1460. /* read serial */
  1461. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  1462. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  1463. dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n",
  1464. chip->model, pci->revision, chip->serial);
  1465. strcpy(card->driver, "CA0106");
  1466. strcpy(card->shortname, "CA0106");
  1467. for (c = ca0106_chip_details; c->serial; c++) {
  1468. if (subsystem[dev]) {
  1469. if (c->serial == subsystem[dev])
  1470. break;
  1471. } else if (c->serial == chip->serial)
  1472. break;
  1473. }
  1474. chip->details = c;
  1475. if (subsystem[dev]) {
  1476. dev_info(card->dev, "Sound card name=%s, "
  1477. "subsystem=0x%x. Forced to subsystem=0x%x\n",
  1478. c->name, chip->serial, subsystem[dev]);
  1479. }
  1480. sprintf(card->longname, "%s at 0x%lx irq %i",
  1481. c->name, chip->port, chip->irq);
  1482. ca0106_init_chip(chip, 0);
  1483. return 0;
  1484. }
  1485. static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
  1486. {
  1487. snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
  1488. }
  1489. static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
  1490. {
  1491. snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
  1492. }
  1493. static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
  1494. {
  1495. return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
  1496. midi->port + idx, 0);
  1497. }
  1498. static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
  1499. {
  1500. snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
  1501. }
  1502. static struct snd_card *ca0106_dev_id_card(void *dev_id)
  1503. {
  1504. return ((struct snd_ca0106 *)dev_id)->card;
  1505. }
  1506. static int ca0106_dev_id_port(void *dev_id)
  1507. {
  1508. return ((struct snd_ca0106 *)dev_id)->port;
  1509. }
  1510. static int snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
  1511. {
  1512. struct snd_ca_midi *midi;
  1513. char *name;
  1514. int err;
  1515. if (channel == CA0106_MIDI_CHAN_B) {
  1516. name = "CA0106 MPU-401 (UART) B";
  1517. midi = &chip->midi2;
  1518. midi->tx_enable = INTE_MIDI_TX_B;
  1519. midi->rx_enable = INTE_MIDI_RX_B;
  1520. midi->ipr_tx = IPR_MIDI_TX_B;
  1521. midi->ipr_rx = IPR_MIDI_RX_B;
  1522. midi->port = MIDI_UART_B_DATA;
  1523. } else {
  1524. name = "CA0106 MPU-401 (UART)";
  1525. midi = &chip->midi;
  1526. midi->tx_enable = INTE_MIDI_TX_A;
  1527. midi->rx_enable = INTE_MIDI_TX_B;
  1528. midi->ipr_tx = IPR_MIDI_TX_A;
  1529. midi->ipr_rx = IPR_MIDI_RX_A;
  1530. midi->port = MIDI_UART_A_DATA;
  1531. }
  1532. midi->reset = CA0106_MPU401_RESET;
  1533. midi->enter_uart = CA0106_MPU401_ENTER_UART;
  1534. midi->ack = CA0106_MPU401_ACK;
  1535. midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
  1536. midi->output_ready = CA0106_MIDI_OUTPUT_READY;
  1537. midi->channel = channel;
  1538. midi->interrupt_enable = ca0106_midi_interrupt_enable;
  1539. midi->interrupt_disable = ca0106_midi_interrupt_disable;
  1540. midi->read = ca0106_midi_read;
  1541. midi->write = ca0106_midi_write;
  1542. midi->get_dev_id_card = ca0106_dev_id_card;
  1543. midi->get_dev_id_port = ca0106_dev_id_port;
  1544. midi->dev_id = chip;
  1545. err = ca_midi_init(chip, midi, 0, name);
  1546. if (err < 0)
  1547. return err;
  1548. return 0;
  1549. }
  1550. static int __snd_ca0106_probe(struct pci_dev *pci,
  1551. const struct pci_device_id *pci_id)
  1552. {
  1553. static int dev;
  1554. struct snd_card *card;
  1555. struct snd_ca0106 *chip;
  1556. int i, err;
  1557. if (dev >= SNDRV_CARDS)
  1558. return -ENODEV;
  1559. if (!enable[dev]) {
  1560. dev++;
  1561. return -ENOENT;
  1562. }
  1563. err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
  1564. sizeof(*chip), &card);
  1565. if (err < 0)
  1566. return err;
  1567. chip = card->private_data;
  1568. err = snd_ca0106_create(dev, card, pci);
  1569. if (err < 0)
  1570. return err;
  1571. card->private_free = snd_ca0106_free;
  1572. for (i = 0; i < 4; i++) {
  1573. err = snd_ca0106_pcm(chip, i);
  1574. if (err < 0)
  1575. return err;
  1576. }
  1577. if (chip->details->ac97 == 1) {
  1578. /* The SB0410 and SB0413 do not have an AC97 chip. */
  1579. err = snd_ca0106_ac97(chip);
  1580. if (err < 0)
  1581. return err;
  1582. }
  1583. err = snd_ca0106_mixer(chip);
  1584. if (err < 0)
  1585. return err;
  1586. dev_dbg(card->dev, "probe for MIDI channel A ...");
  1587. err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
  1588. if (err < 0)
  1589. return err;
  1590. dev_dbg(card->dev, " done.\n");
  1591. #ifdef CONFIG_SND_PROC_FS
  1592. snd_ca0106_proc_init(chip);
  1593. #endif
  1594. err = snd_card_register(card);
  1595. if (err < 0)
  1596. return err;
  1597. pci_set_drvdata(pci, card);
  1598. dev++;
  1599. return 0;
  1600. }
  1601. static int snd_ca0106_probe(struct pci_dev *pci,
  1602. const struct pci_device_id *pci_id)
  1603. {
  1604. return snd_card_free_on_error(&pci->dev, __snd_ca0106_probe(pci, pci_id));
  1605. }
  1606. #ifdef CONFIG_PM_SLEEP
  1607. static int snd_ca0106_suspend(struct device *dev)
  1608. {
  1609. struct snd_card *card = dev_get_drvdata(dev);
  1610. struct snd_ca0106 *chip = card->private_data;
  1611. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1612. if (chip->details->ac97)
  1613. snd_ac97_suspend(chip->ac97);
  1614. snd_ca0106_mixer_suspend(chip);
  1615. ca0106_stop_chip(chip);
  1616. return 0;
  1617. }
  1618. static int snd_ca0106_resume(struct device *dev)
  1619. {
  1620. struct snd_card *card = dev_get_drvdata(dev);
  1621. struct snd_ca0106 *chip = card->private_data;
  1622. int i;
  1623. ca0106_init_chip(chip, 1);
  1624. if (chip->details->ac97)
  1625. snd_ac97_resume(chip->ac97);
  1626. snd_ca0106_mixer_resume(chip);
  1627. if (chip->details->spi_dac) {
  1628. for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
  1629. snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
  1630. }
  1631. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1632. return 0;
  1633. }
  1634. static SIMPLE_DEV_PM_OPS(snd_ca0106_pm, snd_ca0106_suspend, snd_ca0106_resume);
  1635. #define SND_CA0106_PM_OPS &snd_ca0106_pm
  1636. #else
  1637. #define SND_CA0106_PM_OPS NULL
  1638. #endif
  1639. // PCI IDs
  1640. static const struct pci_device_id snd_ca0106_ids[] = {
  1641. { PCI_VDEVICE(CREATIVE, 0x0007), 0 }, /* Audigy LS or Live 24bit */
  1642. { 0, }
  1643. };
  1644. MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
  1645. // pci_driver definition
  1646. static struct pci_driver ca0106_driver = {
  1647. .name = KBUILD_MODNAME,
  1648. .id_table = snd_ca0106_ids,
  1649. .probe = snd_ca0106_probe,
  1650. .driver = {
  1651. .pm = SND_CA0106_PM_OPS,
  1652. },
  1653. };
  1654. module_pci_driver(ca0106_driver);