sb16_main.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) by Jaroslav Kysela <[email protected]>
  4. * Routines for control of 16-bit SoundBlaster cards and clones
  5. * Note: This is very ugly hardware which uses one 8-bit DMA channel and
  6. * second 16-bit DMA channel. Unfortunately 8-bit DMA channel can't
  7. * transfer 16-bit samples and 16-bit DMA channels can't transfer
  8. * 8-bit samples. This make full duplex more complicated than
  9. * can be... People, don't buy these soundcards for full 16-bit
  10. * duplex!!!
  11. * Note: 16-bit wide is assigned to first direction which made request.
  12. * With full duplex - playback is preferred with abstract layer.
  13. *
  14. * Note: Some chip revisions have hardware bug. Changing capture
  15. * channel from full-duplex 8bit DMA to 16bit DMA will block
  16. * 16bit DMA transfers from DSP chip (capture) until 8bit transfer
  17. * to DSP chip (playback) starts. This bug can be avoided with
  18. * "16bit DMA Allocation" setting set to Playback or Capture.
  19. */
  20. #include <linux/io.h>
  21. #include <asm/dma.h>
  22. #include <linux/init.h>
  23. #include <linux/time.h>
  24. #include <linux/module.h>
  25. #include <sound/core.h>
  26. #include <sound/sb.h>
  27. #include <sound/sb16_csp.h>
  28. #include <sound/mpu401.h>
  29. #include <sound/control.h>
  30. #include <sound/info.h>
  31. MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
  32. MODULE_DESCRIPTION("Routines for control of 16-bit SoundBlaster cards and clones");
  33. MODULE_LICENSE("GPL");
  34. #define runtime_format_bits(runtime) \
  35. ((unsigned int)pcm_format_to_bits((runtime)->format))
  36. #ifdef CONFIG_SND_SB16_CSP
  37. static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  38. {
  39. if (chip->hardware == SB_HW_16CSP) {
  40. struct snd_sb_csp *csp = chip->csp;
  41. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  42. /* manually loaded codec */
  43. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) &&
  44. (runtime_format_bits(runtime) == csp->acc_format)) {
  45. /* Supported runtime PCM format for playback */
  46. if (csp->ops.csp_use(csp) == 0) {
  47. /* If CSP was successfully acquired */
  48. goto __start_CSP;
  49. }
  50. } else if ((csp->mode & SNDRV_SB_CSP_MODE_QSOUND) && (csp->q_enabled)) {
  51. /* QSound decoder is loaded and enabled */
  52. if (runtime_format_bits(runtime) & (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
  53. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE)) {
  54. /* Only for simple PCM formats */
  55. if (csp->ops.csp_use(csp) == 0) {
  56. /* If CSP was successfully acquired */
  57. goto __start_CSP;
  58. }
  59. }
  60. }
  61. } else if (csp->ops.csp_use(csp) == 0) {
  62. /* Acquire CSP and try to autoload hardware codec */
  63. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  64. /* Unsupported format, release CSP */
  65. csp->ops.csp_unuse(csp);
  66. } else {
  67. __start_CSP:
  68. /* Try to start CSP */
  69. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ?
  70. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  71. (runtime->channels > 1) ?
  72. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  73. /* Failed, release CSP */
  74. csp->ops.csp_unuse(csp);
  75. } else {
  76. /* Success, CSP acquired and running */
  77. chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE;
  78. }
  79. }
  80. }
  81. }
  82. }
  83. static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  84. {
  85. if (chip->hardware == SB_HW_16CSP) {
  86. struct snd_sb_csp *csp = chip->csp;
  87. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  88. /* manually loaded codec */
  89. if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) &&
  90. (runtime_format_bits(runtime) == csp->acc_format)) {
  91. /* Supported runtime PCM format for capture */
  92. if (csp->ops.csp_use(csp) == 0) {
  93. /* If CSP was successfully acquired */
  94. goto __start_CSP;
  95. }
  96. }
  97. } else if (csp->ops.csp_use(csp) == 0) {
  98. /* Acquire CSP and try to autoload hardware codec */
  99. if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_READ)) {
  100. /* Unsupported format, release CSP */
  101. csp->ops.csp_unuse(csp);
  102. } else {
  103. __start_CSP:
  104. /* Try to start CSP */
  105. if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ?
  106. SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
  107. (runtime->channels > 1) ?
  108. SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
  109. /* Failed, release CSP */
  110. csp->ops.csp_unuse(csp);
  111. } else {
  112. /* Success, CSP acquired and running */
  113. chip->open = SNDRV_SB_CSP_MODE_DSP_READ;
  114. }
  115. }
  116. }
  117. }
  118. }
  119. static void snd_sb16_csp_update(struct snd_sb *chip)
  120. {
  121. if (chip->hardware == SB_HW_16CSP) {
  122. struct snd_sb_csp *csp = chip->csp;
  123. if (csp->qpos_changed) {
  124. spin_lock(&chip->reg_lock);
  125. csp->ops.csp_qsound_transfer (csp);
  126. spin_unlock(&chip->reg_lock);
  127. }
  128. }
  129. }
  130. static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  131. {
  132. /* CSP decoders (QSound excluded) support only 16bit transfers */
  133. if (chip->hardware == SB_HW_16CSP) {
  134. struct snd_sb_csp *csp = chip->csp;
  135. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  136. /* manually loaded codec */
  137. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) {
  138. runtime->hw.formats |= csp->acc_format;
  139. }
  140. } else {
  141. /* autoloaded codecs */
  142. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  143. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  144. }
  145. }
  146. }
  147. static void snd_sb16_csp_playback_close(struct snd_sb *chip)
  148. {
  149. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) {
  150. struct snd_sb_csp *csp = chip->csp;
  151. if (csp->ops.csp_stop(csp) == 0) {
  152. csp->ops.csp_unuse(csp);
  153. chip->open = 0;
  154. }
  155. }
  156. }
  157. static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
  158. {
  159. /* CSP coders support only 16bit transfers */
  160. if (chip->hardware == SB_HW_16CSP) {
  161. struct snd_sb_csp *csp = chip->csp;
  162. if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
  163. /* manually loaded codec */
  164. if (csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) {
  165. runtime->hw.formats |= csp->acc_format;
  166. }
  167. } else {
  168. /* autoloaded codecs */
  169. runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  170. SNDRV_PCM_FMTBIT_IMA_ADPCM;
  171. }
  172. }
  173. }
  174. static void snd_sb16_csp_capture_close(struct snd_sb *chip)
  175. {
  176. if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) {
  177. struct snd_sb_csp *csp = chip->csp;
  178. if (csp->ops.csp_stop(csp) == 0) {
  179. csp->ops.csp_unuse(csp);
  180. chip->open = 0;
  181. }
  182. }
  183. }
  184. #else
  185. #define snd_sb16_csp_playback_prepare(chip, runtime) /*nop*/
  186. #define snd_sb16_csp_capture_prepare(chip, runtime) /*nop*/
  187. #define snd_sb16_csp_update(chip) /*nop*/
  188. #define snd_sb16_csp_playback_open(chip, runtime) /*nop*/
  189. #define snd_sb16_csp_playback_close(chip) /*nop*/
  190. #define snd_sb16_csp_capture_open(chip, runtime) /*nop*/
  191. #define snd_sb16_csp_capture_close(chip) /*nop*/
  192. #endif
  193. static void snd_sb16_setup_rate(struct snd_sb *chip,
  194. unsigned short rate,
  195. int channel)
  196. {
  197. unsigned long flags;
  198. spin_lock_irqsave(&chip->reg_lock, flags);
  199. if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16))
  200. snd_sb_ack_16bit(chip);
  201. else
  202. snd_sb_ack_8bit(chip);
  203. if (!(chip->mode & SB_RATE_LOCK)) {
  204. chip->locked_rate = rate;
  205. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN);
  206. snd_sbdsp_command(chip, rate >> 8);
  207. snd_sbdsp_command(chip, rate & 0xff);
  208. snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
  209. snd_sbdsp_command(chip, rate >> 8);
  210. snd_sbdsp_command(chip, rate & 0xff);
  211. }
  212. spin_unlock_irqrestore(&chip->reg_lock, flags);
  213. }
  214. static int snd_sb16_playback_prepare(struct snd_pcm_substream *substream)
  215. {
  216. unsigned long flags;
  217. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  218. struct snd_pcm_runtime *runtime = substream->runtime;
  219. unsigned char format;
  220. unsigned int size, count, dma;
  221. snd_sb16_csp_playback_prepare(chip, runtime);
  222. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  223. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  224. } else {
  225. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  226. }
  227. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK);
  228. size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream);
  229. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  230. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
  231. count = snd_pcm_lib_period_bytes(substream);
  232. spin_lock_irqsave(&chip->reg_lock, flags);
  233. if (chip->mode & SB_MODE_PLAYBACK_16) {
  234. count >>= 1;
  235. count--;
  236. snd_sbdsp_command(chip, SB_DSP4_OUT16_AI);
  237. snd_sbdsp_command(chip, format);
  238. snd_sbdsp_command(chip, count & 0xff);
  239. snd_sbdsp_command(chip, count >> 8);
  240. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  241. } else {
  242. count--;
  243. snd_sbdsp_command(chip, SB_DSP4_OUT8_AI);
  244. snd_sbdsp_command(chip, format);
  245. snd_sbdsp_command(chip, count & 0xff);
  246. snd_sbdsp_command(chip, count >> 8);
  247. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  248. }
  249. spin_unlock_irqrestore(&chip->reg_lock, flags);
  250. return 0;
  251. }
  252. static int snd_sb16_playback_trigger(struct snd_pcm_substream *substream,
  253. int cmd)
  254. {
  255. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  256. int result = 0;
  257. spin_lock(&chip->reg_lock);
  258. switch (cmd) {
  259. case SNDRV_PCM_TRIGGER_START:
  260. case SNDRV_PCM_TRIGGER_RESUME:
  261. chip->mode |= SB_RATE_LOCK_PLAYBACK;
  262. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  263. break;
  264. case SNDRV_PCM_TRIGGER_STOP:
  265. case SNDRV_PCM_TRIGGER_SUSPEND:
  266. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  267. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  268. if (chip->mode & SB_RATE_LOCK_CAPTURE)
  269. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  270. chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
  271. break;
  272. default:
  273. result = -EINVAL;
  274. }
  275. spin_unlock(&chip->reg_lock);
  276. return result;
  277. }
  278. static int snd_sb16_capture_prepare(struct snd_pcm_substream *substream)
  279. {
  280. unsigned long flags;
  281. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  282. struct snd_pcm_runtime *runtime = substream->runtime;
  283. unsigned char format;
  284. unsigned int size, count, dma;
  285. snd_sb16_csp_capture_prepare(chip, runtime);
  286. if (snd_pcm_format_unsigned(runtime->format) > 0) {
  287. format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
  288. } else {
  289. format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
  290. }
  291. snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE);
  292. size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
  293. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  294. snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
  295. count = snd_pcm_lib_period_bytes(substream);
  296. spin_lock_irqsave(&chip->reg_lock, flags);
  297. if (chip->mode & SB_MODE_CAPTURE_16) {
  298. count >>= 1;
  299. count--;
  300. snd_sbdsp_command(chip, SB_DSP4_IN16_AI);
  301. snd_sbdsp_command(chip, format);
  302. snd_sbdsp_command(chip, count & 0xff);
  303. snd_sbdsp_command(chip, count >> 8);
  304. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  305. } else {
  306. count--;
  307. snd_sbdsp_command(chip, SB_DSP4_IN8_AI);
  308. snd_sbdsp_command(chip, format);
  309. snd_sbdsp_command(chip, count & 0xff);
  310. snd_sbdsp_command(chip, count >> 8);
  311. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  312. }
  313. spin_unlock_irqrestore(&chip->reg_lock, flags);
  314. return 0;
  315. }
  316. static int snd_sb16_capture_trigger(struct snd_pcm_substream *substream,
  317. int cmd)
  318. {
  319. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  320. int result = 0;
  321. spin_lock(&chip->reg_lock);
  322. switch (cmd) {
  323. case SNDRV_PCM_TRIGGER_START:
  324. case SNDRV_PCM_TRIGGER_RESUME:
  325. chip->mode |= SB_RATE_LOCK_CAPTURE;
  326. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  327. break;
  328. case SNDRV_PCM_TRIGGER_STOP:
  329. case SNDRV_PCM_TRIGGER_SUSPEND:
  330. snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
  331. /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
  332. if (chip->mode & SB_RATE_LOCK_PLAYBACK)
  333. snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
  334. chip->mode &= ~SB_RATE_LOCK_CAPTURE;
  335. break;
  336. default:
  337. result = -EINVAL;
  338. }
  339. spin_unlock(&chip->reg_lock);
  340. return result;
  341. }
  342. irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id)
  343. {
  344. struct snd_sb *chip = dev_id;
  345. unsigned char status;
  346. int ok;
  347. spin_lock(&chip->mixer_lock);
  348. status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
  349. spin_unlock(&chip->mixer_lock);
  350. if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback)
  351. chip->rmidi_callback(irq, chip->rmidi->private_data);
  352. if (status & SB_IRQTYPE_8BIT) {
  353. ok = 0;
  354. if (chip->mode & SB_MODE_PLAYBACK_8) {
  355. snd_pcm_period_elapsed(chip->playback_substream);
  356. snd_sb16_csp_update(chip);
  357. ok++;
  358. }
  359. if (chip->mode & SB_MODE_CAPTURE_8) {
  360. snd_pcm_period_elapsed(chip->capture_substream);
  361. ok++;
  362. }
  363. spin_lock(&chip->reg_lock);
  364. if (!ok)
  365. snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
  366. snd_sb_ack_8bit(chip);
  367. spin_unlock(&chip->reg_lock);
  368. }
  369. if (status & SB_IRQTYPE_16BIT) {
  370. ok = 0;
  371. if (chip->mode & SB_MODE_PLAYBACK_16) {
  372. snd_pcm_period_elapsed(chip->playback_substream);
  373. snd_sb16_csp_update(chip);
  374. ok++;
  375. }
  376. if (chip->mode & SB_MODE_CAPTURE_16) {
  377. snd_pcm_period_elapsed(chip->capture_substream);
  378. ok++;
  379. }
  380. spin_lock(&chip->reg_lock);
  381. if (!ok)
  382. snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
  383. snd_sb_ack_16bit(chip);
  384. spin_unlock(&chip->reg_lock);
  385. }
  386. return IRQ_HANDLED;
  387. }
  388. /*
  389. */
  390. static snd_pcm_uframes_t snd_sb16_playback_pointer(struct snd_pcm_substream *substream)
  391. {
  392. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  393. unsigned int dma;
  394. size_t ptr;
  395. dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
  396. ptr = snd_dma_pointer(dma, chip->p_dma_size);
  397. return bytes_to_frames(substream->runtime, ptr);
  398. }
  399. static snd_pcm_uframes_t snd_sb16_capture_pointer(struct snd_pcm_substream *substream)
  400. {
  401. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  402. unsigned int dma;
  403. size_t ptr;
  404. dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
  405. ptr = snd_dma_pointer(dma, chip->c_dma_size);
  406. return bytes_to_frames(substream->runtime, ptr);
  407. }
  408. /*
  409. */
  410. static const struct snd_pcm_hardware snd_sb16_playback =
  411. {
  412. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  413. SNDRV_PCM_INFO_MMAP_VALID),
  414. .formats = 0,
  415. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  416. .rate_min = 4000,
  417. .rate_max = 44100,
  418. .channels_min = 1,
  419. .channels_max = 2,
  420. .buffer_bytes_max = (128*1024),
  421. .period_bytes_min = 64,
  422. .period_bytes_max = (128*1024),
  423. .periods_min = 1,
  424. .periods_max = 1024,
  425. .fifo_size = 0,
  426. };
  427. static const struct snd_pcm_hardware snd_sb16_capture =
  428. {
  429. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  430. SNDRV_PCM_INFO_MMAP_VALID),
  431. .formats = 0,
  432. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
  433. .rate_min = 4000,
  434. .rate_max = 44100,
  435. .channels_min = 1,
  436. .channels_max = 2,
  437. .buffer_bytes_max = (128*1024),
  438. .period_bytes_min = 64,
  439. .period_bytes_max = (128*1024),
  440. .periods_min = 1,
  441. .periods_max = 1024,
  442. .fifo_size = 0,
  443. };
  444. /*
  445. * open/close
  446. */
  447. static int snd_sb16_playback_open(struct snd_pcm_substream *substream)
  448. {
  449. unsigned long flags;
  450. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  451. struct snd_pcm_runtime *runtime = substream->runtime;
  452. spin_lock_irqsave(&chip->open_lock, flags);
  453. if (chip->mode & SB_MODE_PLAYBACK) {
  454. spin_unlock_irqrestore(&chip->open_lock, flags);
  455. return -EAGAIN;
  456. }
  457. runtime->hw = snd_sb16_playback;
  458. /* skip if 16 bit DMA was reserved for capture */
  459. if (chip->force_mode16 & SB_MODE_CAPTURE_16)
  460. goto __skip_16bit;
  461. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) {
  462. chip->mode |= SB_MODE_PLAYBACK_16;
  463. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  464. /* Vibra16X hack */
  465. if (chip->dma16 <= 3) {
  466. runtime->hw.buffer_bytes_max =
  467. runtime->hw.period_bytes_max = 64 * 1024;
  468. } else {
  469. snd_sb16_csp_playback_open(chip, runtime);
  470. }
  471. goto __open_ok;
  472. }
  473. __skip_16bit:
  474. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) {
  475. chip->mode |= SB_MODE_PLAYBACK_8;
  476. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  477. if (chip->dma16 < 0) {
  478. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  479. chip->mode |= SB_MODE_PLAYBACK_16;
  480. } else {
  481. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  482. }
  483. runtime->hw.buffer_bytes_max =
  484. runtime->hw.period_bytes_max = 64 * 1024;
  485. goto __open_ok;
  486. }
  487. spin_unlock_irqrestore(&chip->open_lock, flags);
  488. return -EAGAIN;
  489. __open_ok:
  490. if (chip->hardware == SB_HW_ALS100)
  491. runtime->hw.rate_max = 48000;
  492. if (chip->hardware == SB_HW_CS5530) {
  493. runtime->hw.buffer_bytes_max = 32 * 1024;
  494. runtime->hw.periods_min = 2;
  495. runtime->hw.rate_min = 44100;
  496. }
  497. if (chip->mode & SB_RATE_LOCK)
  498. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  499. chip->playback_substream = substream;
  500. spin_unlock_irqrestore(&chip->open_lock, flags);
  501. return 0;
  502. }
  503. static int snd_sb16_playback_close(struct snd_pcm_substream *substream)
  504. {
  505. unsigned long flags;
  506. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  507. snd_sb16_csp_playback_close(chip);
  508. spin_lock_irqsave(&chip->open_lock, flags);
  509. chip->playback_substream = NULL;
  510. chip->mode &= ~SB_MODE_PLAYBACK;
  511. spin_unlock_irqrestore(&chip->open_lock, flags);
  512. return 0;
  513. }
  514. static int snd_sb16_capture_open(struct snd_pcm_substream *substream)
  515. {
  516. unsigned long flags;
  517. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  518. struct snd_pcm_runtime *runtime = substream->runtime;
  519. spin_lock_irqsave(&chip->open_lock, flags);
  520. if (chip->mode & SB_MODE_CAPTURE) {
  521. spin_unlock_irqrestore(&chip->open_lock, flags);
  522. return -EAGAIN;
  523. }
  524. runtime->hw = snd_sb16_capture;
  525. /* skip if 16 bit DMA was reserved for playback */
  526. if (chip->force_mode16 & SB_MODE_PLAYBACK_16)
  527. goto __skip_16bit;
  528. if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) {
  529. chip->mode |= SB_MODE_CAPTURE_16;
  530. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  531. /* Vibra16X hack */
  532. if (chip->dma16 <= 3) {
  533. runtime->hw.buffer_bytes_max =
  534. runtime->hw.period_bytes_max = 64 * 1024;
  535. } else {
  536. snd_sb16_csp_capture_open(chip, runtime);
  537. }
  538. goto __open_ok;
  539. }
  540. __skip_16bit:
  541. if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) {
  542. chip->mode |= SB_MODE_CAPTURE_8;
  543. /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
  544. if (chip->dma16 < 0) {
  545. runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
  546. chip->mode |= SB_MODE_CAPTURE_16;
  547. } else {
  548. runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
  549. }
  550. runtime->hw.buffer_bytes_max =
  551. runtime->hw.period_bytes_max = 64 * 1024;
  552. goto __open_ok;
  553. }
  554. spin_unlock_irqrestore(&chip->open_lock, flags);
  555. return -EAGAIN;
  556. __open_ok:
  557. if (chip->hardware == SB_HW_ALS100)
  558. runtime->hw.rate_max = 48000;
  559. if (chip->hardware == SB_HW_CS5530) {
  560. runtime->hw.buffer_bytes_max = 32 * 1024;
  561. runtime->hw.periods_min = 2;
  562. runtime->hw.rate_min = 44100;
  563. }
  564. if (chip->mode & SB_RATE_LOCK)
  565. runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
  566. chip->capture_substream = substream;
  567. spin_unlock_irqrestore(&chip->open_lock, flags);
  568. return 0;
  569. }
  570. static int snd_sb16_capture_close(struct snd_pcm_substream *substream)
  571. {
  572. unsigned long flags;
  573. struct snd_sb *chip = snd_pcm_substream_chip(substream);
  574. snd_sb16_csp_capture_close(chip);
  575. spin_lock_irqsave(&chip->open_lock, flags);
  576. chip->capture_substream = NULL;
  577. chip->mode &= ~SB_MODE_CAPTURE;
  578. spin_unlock_irqrestore(&chip->open_lock, flags);
  579. return 0;
  580. }
  581. /*
  582. * DMA control interface
  583. */
  584. static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what)
  585. {
  586. if (chip->dma8 < 0 || chip->dma16 < 0) {
  587. if (snd_BUG_ON(what))
  588. return -EINVAL;
  589. return 0;
  590. }
  591. if (what == 0) {
  592. chip->force_mode16 = 0;
  593. } else if (what == 1) {
  594. chip->force_mode16 = SB_MODE_PLAYBACK_16;
  595. } else if (what == 2) {
  596. chip->force_mode16 = SB_MODE_CAPTURE_16;
  597. } else {
  598. return -EINVAL;
  599. }
  600. return 0;
  601. }
  602. static int snd_sb16_get_dma_mode(struct snd_sb *chip)
  603. {
  604. if (chip->dma8 < 0 || chip->dma16 < 0)
  605. return 0;
  606. switch (chip->force_mode16) {
  607. case SB_MODE_PLAYBACK_16:
  608. return 1;
  609. case SB_MODE_CAPTURE_16:
  610. return 2;
  611. default:
  612. return 0;
  613. }
  614. }
  615. static int snd_sb16_dma_control_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  616. {
  617. static const char * const texts[3] = {
  618. "Auto", "Playback", "Capture"
  619. };
  620. return snd_ctl_enum_info(uinfo, 1, 3, texts);
  621. }
  622. static int snd_sb16_dma_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  623. {
  624. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  625. unsigned long flags;
  626. spin_lock_irqsave(&chip->reg_lock, flags);
  627. ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip);
  628. spin_unlock_irqrestore(&chip->reg_lock, flags);
  629. return 0;
  630. }
  631. static int snd_sb16_dma_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  632. {
  633. struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
  634. unsigned long flags;
  635. unsigned char nval, oval;
  636. int change;
  637. nval = ucontrol->value.enumerated.item[0];
  638. if (nval > 2)
  639. return -EINVAL;
  640. spin_lock_irqsave(&chip->reg_lock, flags);
  641. oval = snd_sb16_get_dma_mode(chip);
  642. change = nval != oval;
  643. snd_sb16_set_dma_mode(chip, nval);
  644. spin_unlock_irqrestore(&chip->reg_lock, flags);
  645. return change;
  646. }
  647. static const struct snd_kcontrol_new snd_sb16_dma_control = {
  648. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  649. .name = "16-bit DMA Allocation",
  650. .info = snd_sb16_dma_control_info,
  651. .get = snd_sb16_dma_control_get,
  652. .put = snd_sb16_dma_control_put
  653. };
  654. /*
  655. * Initialization part
  656. */
  657. int snd_sb16dsp_configure(struct snd_sb * chip)
  658. {
  659. unsigned long flags;
  660. unsigned char irqreg = 0, dmareg = 0, mpureg;
  661. unsigned char realirq, realdma, realmpureg;
  662. /* note: mpu register should be present only on SB16 Vibra soundcards */
  663. // printk(KERN_DEBUG "codec->irq=%i, codec->dma8=%i, codec->dma16=%i\n", chip->irq, chip->dma8, chip->dma16);
  664. spin_lock_irqsave(&chip->mixer_lock, flags);
  665. mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06;
  666. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  667. switch (chip->irq) {
  668. case 2:
  669. case 9:
  670. irqreg |= SB_IRQSETUP_IRQ9;
  671. break;
  672. case 5:
  673. irqreg |= SB_IRQSETUP_IRQ5;
  674. break;
  675. case 7:
  676. irqreg |= SB_IRQSETUP_IRQ7;
  677. break;
  678. case 10:
  679. irqreg |= SB_IRQSETUP_IRQ10;
  680. break;
  681. default:
  682. return -EINVAL;
  683. }
  684. if (chip->dma8 >= 0) {
  685. switch (chip->dma8) {
  686. case 0:
  687. dmareg |= SB_DMASETUP_DMA0;
  688. break;
  689. case 1:
  690. dmareg |= SB_DMASETUP_DMA1;
  691. break;
  692. case 3:
  693. dmareg |= SB_DMASETUP_DMA3;
  694. break;
  695. default:
  696. return -EINVAL;
  697. }
  698. }
  699. if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) {
  700. switch (chip->dma16) {
  701. case 5:
  702. dmareg |= SB_DMASETUP_DMA5;
  703. break;
  704. case 6:
  705. dmareg |= SB_DMASETUP_DMA6;
  706. break;
  707. case 7:
  708. dmareg |= SB_DMASETUP_DMA7;
  709. break;
  710. default:
  711. return -EINVAL;
  712. }
  713. }
  714. switch (chip->mpu_port) {
  715. case 0x300:
  716. mpureg |= 0x04;
  717. break;
  718. case 0x330:
  719. mpureg |= 0x00;
  720. break;
  721. default:
  722. mpureg |= 0x02; /* disable MPU */
  723. }
  724. spin_lock_irqsave(&chip->mixer_lock, flags);
  725. snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg);
  726. realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP);
  727. snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg);
  728. realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP);
  729. snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg);
  730. realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP);
  731. spin_unlock_irqrestore(&chip->mixer_lock, flags);
  732. if ((~realirq) & irqreg || (~realdma) & dmareg) {
  733. snd_printk(KERN_ERR "SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n", chip->port);
  734. snd_printk(KERN_ERR "SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, realirq, realdma, realmpureg);
  735. snd_printk(KERN_ERR "SB16 [0x%lx]: got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, irqreg, dmareg, mpureg);
  736. return -ENODEV;
  737. }
  738. return 0;
  739. }
  740. static const struct snd_pcm_ops snd_sb16_playback_ops = {
  741. .open = snd_sb16_playback_open,
  742. .close = snd_sb16_playback_close,
  743. .prepare = snd_sb16_playback_prepare,
  744. .trigger = snd_sb16_playback_trigger,
  745. .pointer = snd_sb16_playback_pointer,
  746. };
  747. static const struct snd_pcm_ops snd_sb16_capture_ops = {
  748. .open = snd_sb16_capture_open,
  749. .close = snd_sb16_capture_close,
  750. .prepare = snd_sb16_capture_prepare,
  751. .trigger = snd_sb16_capture_trigger,
  752. .pointer = snd_sb16_capture_pointer,
  753. };
  754. int snd_sb16dsp_pcm(struct snd_sb *chip, int device)
  755. {
  756. struct snd_card *card = chip->card;
  757. struct snd_pcm *pcm;
  758. int err;
  759. err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm);
  760. if (err < 0)
  761. return err;
  762. sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff);
  763. pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
  764. pcm->private_data = chip;
  765. chip->pcm = pcm;
  766. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sb16_playback_ops);
  767. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops);
  768. if (chip->dma16 >= 0 && chip->dma8 != chip->dma16)
  769. snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip));
  770. else
  771. pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
  772. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
  773. card->dev, 64*1024, 128*1024);
  774. return 0;
  775. }
  776. const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction)
  777. {
  778. return direction == SNDRV_PCM_STREAM_PLAYBACK ?
  779. &snd_sb16_playback_ops : &snd_sb16_capture_ops;
  780. }
  781. EXPORT_SYMBOL(snd_sb16dsp_pcm);
  782. EXPORT_SYMBOL(snd_sb16dsp_get_pcm_ops);
  783. EXPORT_SYMBOL(snd_sb16dsp_configure);
  784. EXPORT_SYMBOL(snd_sb16dsp_interrupt);