emu8000.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) by Jaroslav Kysela <[email protected]>
  4. * and (c) 1999 Steve Ratcliffe <[email protected]>
  5. * Copyright (C) 1999-2000 Takashi Iwai <[email protected]>
  6. *
  7. * Routines for control of EMU8000 chip
  8. */
  9. #include <linux/wait.h>
  10. #include <linux/sched/signal.h>
  11. #include <linux/slab.h>
  12. #include <linux/ioport.h>
  13. #include <linux/export.h>
  14. #include <linux/delay.h>
  15. #include <linux/io.h>
  16. #include <sound/core.h>
  17. #include <sound/emu8000.h>
  18. #include <sound/emu8000_reg.h>
  19. #include <linux/uaccess.h>
  20. #include <linux/init.h>
  21. #include <sound/control.h>
  22. #include <sound/initval.h>
  23. /*
  24. * emu8000 register controls
  25. */
  26. /*
  27. * The following routines read and write registers on the emu8000. They
  28. * should always be called via the EMU8000*READ/WRITE macros and never
  29. * directly. The macros handle the port number and command word.
  30. */
  31. /* Write a word */
  32. void snd_emu8000_poke(struct snd_emu8000 *emu, unsigned int port, unsigned int reg, unsigned int val)
  33. {
  34. unsigned long flags;
  35. spin_lock_irqsave(&emu->reg_lock, flags);
  36. if (reg != emu->last_reg) {
  37. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  38. emu->last_reg = reg;
  39. }
  40. outw((unsigned short)val, port); /* Send data */
  41. spin_unlock_irqrestore(&emu->reg_lock, flags);
  42. }
  43. /* Read a word */
  44. unsigned short snd_emu8000_peek(struct snd_emu8000 *emu, unsigned int port, unsigned int reg)
  45. {
  46. unsigned short res;
  47. unsigned long flags;
  48. spin_lock_irqsave(&emu->reg_lock, flags);
  49. if (reg != emu->last_reg) {
  50. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  51. emu->last_reg = reg;
  52. }
  53. res = inw(port); /* Read data */
  54. spin_unlock_irqrestore(&emu->reg_lock, flags);
  55. return res;
  56. }
  57. /* Write a double word */
  58. void snd_emu8000_poke_dw(struct snd_emu8000 *emu, unsigned int port, unsigned int reg, unsigned int val)
  59. {
  60. unsigned long flags;
  61. spin_lock_irqsave(&emu->reg_lock, flags);
  62. if (reg != emu->last_reg) {
  63. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  64. emu->last_reg = reg;
  65. }
  66. outw((unsigned short)val, port); /* Send low word of data */
  67. outw((unsigned short)(val>>16), port+2); /* Send high word of data */
  68. spin_unlock_irqrestore(&emu->reg_lock, flags);
  69. }
  70. /* Read a double word */
  71. unsigned int snd_emu8000_peek_dw(struct snd_emu8000 *emu, unsigned int port, unsigned int reg)
  72. {
  73. unsigned short low;
  74. unsigned int res;
  75. unsigned long flags;
  76. spin_lock_irqsave(&emu->reg_lock, flags);
  77. if (reg != emu->last_reg) {
  78. outw((unsigned short)reg, EMU8000_PTR(emu)); /* Set register */
  79. emu->last_reg = reg;
  80. }
  81. low = inw(port); /* Read low word of data */
  82. res = low + (inw(port+2) << 16);
  83. spin_unlock_irqrestore(&emu->reg_lock, flags);
  84. return res;
  85. }
  86. /*
  87. * Set up / close a channel to be used for DMA.
  88. */
  89. /*exported*/ void
  90. snd_emu8000_dma_chan(struct snd_emu8000 *emu, int ch, int mode)
  91. {
  92. unsigned right_bit = (mode & EMU8000_RAM_RIGHT) ? 0x01000000 : 0;
  93. mode &= EMU8000_RAM_MODE_MASK;
  94. if (mode == EMU8000_RAM_CLOSE) {
  95. EMU8000_CCCA_WRITE(emu, ch, 0);
  96. EMU8000_DCYSUSV_WRITE(emu, ch, 0x807F);
  97. return;
  98. }
  99. EMU8000_DCYSUSV_WRITE(emu, ch, 0x80);
  100. EMU8000_VTFT_WRITE(emu, ch, 0);
  101. EMU8000_CVCF_WRITE(emu, ch, 0);
  102. EMU8000_PTRX_WRITE(emu, ch, 0x40000000);
  103. EMU8000_CPF_WRITE(emu, ch, 0x40000000);
  104. EMU8000_PSST_WRITE(emu, ch, 0);
  105. EMU8000_CSL_WRITE(emu, ch, 0);
  106. if (mode == EMU8000_RAM_WRITE) /* DMA write */
  107. EMU8000_CCCA_WRITE(emu, ch, 0x06000000 | right_bit);
  108. else /* DMA read */
  109. EMU8000_CCCA_WRITE(emu, ch, 0x04000000 | right_bit);
  110. }
  111. /*
  112. */
  113. static void
  114. snd_emu8000_read_wait(struct snd_emu8000 *emu)
  115. {
  116. while ((EMU8000_SMALR_READ(emu) & 0x80000000) != 0) {
  117. schedule_timeout_interruptible(1);
  118. if (signal_pending(current))
  119. break;
  120. }
  121. }
  122. /*
  123. */
  124. static void
  125. snd_emu8000_write_wait(struct snd_emu8000 *emu)
  126. {
  127. while ((EMU8000_SMALW_READ(emu) & 0x80000000) != 0) {
  128. schedule_timeout_interruptible(1);
  129. if (signal_pending(current))
  130. break;
  131. }
  132. }
  133. /*
  134. * detect a card at the given port
  135. */
  136. static int
  137. snd_emu8000_detect(struct snd_emu8000 *emu)
  138. {
  139. /* Initialise */
  140. EMU8000_HWCF1_WRITE(emu, 0x0059);
  141. EMU8000_HWCF2_WRITE(emu, 0x0020);
  142. EMU8000_HWCF3_WRITE(emu, 0x0000);
  143. /* Check for a recognisable emu8000 */
  144. /*
  145. if ((EMU8000_U1_READ(emu) & 0x000f) != 0x000c)
  146. return -ENODEV;
  147. */
  148. if ((EMU8000_HWCF1_READ(emu) & 0x007e) != 0x0058)
  149. return -ENODEV;
  150. if ((EMU8000_HWCF2_READ(emu) & 0x0003) != 0x0003)
  151. return -ENODEV;
  152. snd_printdd("EMU8000 [0x%lx]: Synth chip found\n",
  153. emu->port1);
  154. return 0;
  155. }
  156. /*
  157. * intiailize audio channels
  158. */
  159. static void
  160. init_audio(struct snd_emu8000 *emu)
  161. {
  162. int ch;
  163. /* turn off envelope engines */
  164. for (ch = 0; ch < EMU8000_CHANNELS; ch++)
  165. EMU8000_DCYSUSV_WRITE(emu, ch, 0x80);
  166. /* reset all other parameters to zero */
  167. for (ch = 0; ch < EMU8000_CHANNELS; ch++) {
  168. EMU8000_ENVVOL_WRITE(emu, ch, 0);
  169. EMU8000_ENVVAL_WRITE(emu, ch, 0);
  170. EMU8000_DCYSUS_WRITE(emu, ch, 0);
  171. EMU8000_ATKHLDV_WRITE(emu, ch, 0);
  172. EMU8000_LFO1VAL_WRITE(emu, ch, 0);
  173. EMU8000_ATKHLD_WRITE(emu, ch, 0);
  174. EMU8000_LFO2VAL_WRITE(emu, ch, 0);
  175. EMU8000_IP_WRITE(emu, ch, 0);
  176. EMU8000_IFATN_WRITE(emu, ch, 0);
  177. EMU8000_PEFE_WRITE(emu, ch, 0);
  178. EMU8000_FMMOD_WRITE(emu, ch, 0);
  179. EMU8000_TREMFRQ_WRITE(emu, ch, 0);
  180. EMU8000_FM2FRQ2_WRITE(emu, ch, 0);
  181. EMU8000_PTRX_WRITE(emu, ch, 0);
  182. EMU8000_VTFT_WRITE(emu, ch, 0);
  183. EMU8000_PSST_WRITE(emu, ch, 0);
  184. EMU8000_CSL_WRITE(emu, ch, 0);
  185. EMU8000_CCCA_WRITE(emu, ch, 0);
  186. }
  187. for (ch = 0; ch < EMU8000_CHANNELS; ch++) {
  188. EMU8000_CPF_WRITE(emu, ch, 0);
  189. EMU8000_CVCF_WRITE(emu, ch, 0);
  190. }
  191. }
  192. /*
  193. * initialize DMA address
  194. */
  195. static void
  196. init_dma(struct snd_emu8000 *emu)
  197. {
  198. EMU8000_SMALR_WRITE(emu, 0);
  199. EMU8000_SMARR_WRITE(emu, 0);
  200. EMU8000_SMALW_WRITE(emu, 0);
  201. EMU8000_SMARW_WRITE(emu, 0);
  202. }
  203. /*
  204. * initialization arrays; from ADIP
  205. */
  206. static const unsigned short init1[128] = {
  207. 0x03ff, 0x0030, 0x07ff, 0x0130, 0x0bff, 0x0230, 0x0fff, 0x0330,
  208. 0x13ff, 0x0430, 0x17ff, 0x0530, 0x1bff, 0x0630, 0x1fff, 0x0730,
  209. 0x23ff, 0x0830, 0x27ff, 0x0930, 0x2bff, 0x0a30, 0x2fff, 0x0b30,
  210. 0x33ff, 0x0c30, 0x37ff, 0x0d30, 0x3bff, 0x0e30, 0x3fff, 0x0f30,
  211. 0x43ff, 0x0030, 0x47ff, 0x0130, 0x4bff, 0x0230, 0x4fff, 0x0330,
  212. 0x53ff, 0x0430, 0x57ff, 0x0530, 0x5bff, 0x0630, 0x5fff, 0x0730,
  213. 0x63ff, 0x0830, 0x67ff, 0x0930, 0x6bff, 0x0a30, 0x6fff, 0x0b30,
  214. 0x73ff, 0x0c30, 0x77ff, 0x0d30, 0x7bff, 0x0e30, 0x7fff, 0x0f30,
  215. 0x83ff, 0x0030, 0x87ff, 0x0130, 0x8bff, 0x0230, 0x8fff, 0x0330,
  216. 0x93ff, 0x0430, 0x97ff, 0x0530, 0x9bff, 0x0630, 0x9fff, 0x0730,
  217. 0xa3ff, 0x0830, 0xa7ff, 0x0930, 0xabff, 0x0a30, 0xafff, 0x0b30,
  218. 0xb3ff, 0x0c30, 0xb7ff, 0x0d30, 0xbbff, 0x0e30, 0xbfff, 0x0f30,
  219. 0xc3ff, 0x0030, 0xc7ff, 0x0130, 0xcbff, 0x0230, 0xcfff, 0x0330,
  220. 0xd3ff, 0x0430, 0xd7ff, 0x0530, 0xdbff, 0x0630, 0xdfff, 0x0730,
  221. 0xe3ff, 0x0830, 0xe7ff, 0x0930, 0xebff, 0x0a30, 0xefff, 0x0b30,
  222. 0xf3ff, 0x0c30, 0xf7ff, 0x0d30, 0xfbff, 0x0e30, 0xffff, 0x0f30,
  223. };
  224. static const unsigned short init2[128] = {
  225. 0x03ff, 0x8030, 0x07ff, 0x8130, 0x0bff, 0x8230, 0x0fff, 0x8330,
  226. 0x13ff, 0x8430, 0x17ff, 0x8530, 0x1bff, 0x8630, 0x1fff, 0x8730,
  227. 0x23ff, 0x8830, 0x27ff, 0x8930, 0x2bff, 0x8a30, 0x2fff, 0x8b30,
  228. 0x33ff, 0x8c30, 0x37ff, 0x8d30, 0x3bff, 0x8e30, 0x3fff, 0x8f30,
  229. 0x43ff, 0x8030, 0x47ff, 0x8130, 0x4bff, 0x8230, 0x4fff, 0x8330,
  230. 0x53ff, 0x8430, 0x57ff, 0x8530, 0x5bff, 0x8630, 0x5fff, 0x8730,
  231. 0x63ff, 0x8830, 0x67ff, 0x8930, 0x6bff, 0x8a30, 0x6fff, 0x8b30,
  232. 0x73ff, 0x8c30, 0x77ff, 0x8d30, 0x7bff, 0x8e30, 0x7fff, 0x8f30,
  233. 0x83ff, 0x8030, 0x87ff, 0x8130, 0x8bff, 0x8230, 0x8fff, 0x8330,
  234. 0x93ff, 0x8430, 0x97ff, 0x8530, 0x9bff, 0x8630, 0x9fff, 0x8730,
  235. 0xa3ff, 0x8830, 0xa7ff, 0x8930, 0xabff, 0x8a30, 0xafff, 0x8b30,
  236. 0xb3ff, 0x8c30, 0xb7ff, 0x8d30, 0xbbff, 0x8e30, 0xbfff, 0x8f30,
  237. 0xc3ff, 0x8030, 0xc7ff, 0x8130, 0xcbff, 0x8230, 0xcfff, 0x8330,
  238. 0xd3ff, 0x8430, 0xd7ff, 0x8530, 0xdbff, 0x8630, 0xdfff, 0x8730,
  239. 0xe3ff, 0x8830, 0xe7ff, 0x8930, 0xebff, 0x8a30, 0xefff, 0x8b30,
  240. 0xf3ff, 0x8c30, 0xf7ff, 0x8d30, 0xfbff, 0x8e30, 0xffff, 0x8f30,
  241. };
  242. static const unsigned short init3[128] = {
  243. 0x0C10, 0x8470, 0x14FE, 0xB488, 0x167F, 0xA470, 0x18E7, 0x84B5,
  244. 0x1B6E, 0x842A, 0x1F1D, 0x852A, 0x0DA3, 0x8F7C, 0x167E, 0xF254,
  245. 0x0000, 0x842A, 0x0001, 0x852A, 0x18E6, 0x8BAA, 0x1B6D, 0xF234,
  246. 0x229F, 0x8429, 0x2746, 0x8529, 0x1F1C, 0x86E7, 0x229E, 0xF224,
  247. 0x0DA4, 0x8429, 0x2C29, 0x8529, 0x2745, 0x87F6, 0x2C28, 0xF254,
  248. 0x383B, 0x8428, 0x320F, 0x8528, 0x320E, 0x8F02, 0x1341, 0xF264,
  249. 0x3EB6, 0x8428, 0x3EB9, 0x8528, 0x383A, 0x8FA9, 0x3EB5, 0xF294,
  250. 0x3EB7, 0x8474, 0x3EBA, 0x8575, 0x3EB8, 0xC4C3, 0x3EBB, 0xC5C3,
  251. 0x0000, 0xA404, 0x0001, 0xA504, 0x141F, 0x8671, 0x14FD, 0x8287,
  252. 0x3EBC, 0xE610, 0x3EC8, 0x8C7B, 0x031A, 0x87E6, 0x3EC8, 0x86F7,
  253. 0x3EC0, 0x821E, 0x3EBE, 0xD208, 0x3EBD, 0x821F, 0x3ECA, 0x8386,
  254. 0x3EC1, 0x8C03, 0x3EC9, 0x831E, 0x3ECA, 0x8C4C, 0x3EBF, 0x8C55,
  255. 0x3EC9, 0xC208, 0x3EC4, 0xBC84, 0x3EC8, 0x8EAD, 0x3EC8, 0xD308,
  256. 0x3EC2, 0x8F7E, 0x3ECB, 0x8219, 0x3ECB, 0xD26E, 0x3EC5, 0x831F,
  257. 0x3EC6, 0xC308, 0x3EC3, 0xB2FF, 0x3EC9, 0x8265, 0x3EC9, 0x8319,
  258. 0x1342, 0xD36E, 0x3EC7, 0xB3FF, 0x0000, 0x8365, 0x1420, 0x9570,
  259. };
  260. static const unsigned short init4[128] = {
  261. 0x0C10, 0x8470, 0x14FE, 0xB488, 0x167F, 0xA470, 0x18E7, 0x84B5,
  262. 0x1B6E, 0x842A, 0x1F1D, 0x852A, 0x0DA3, 0x0F7C, 0x167E, 0x7254,
  263. 0x0000, 0x842A, 0x0001, 0x852A, 0x18E6, 0x0BAA, 0x1B6D, 0x7234,
  264. 0x229F, 0x8429, 0x2746, 0x8529, 0x1F1C, 0x06E7, 0x229E, 0x7224,
  265. 0x0DA4, 0x8429, 0x2C29, 0x8529, 0x2745, 0x07F6, 0x2C28, 0x7254,
  266. 0x383B, 0x8428, 0x320F, 0x8528, 0x320E, 0x0F02, 0x1341, 0x7264,
  267. 0x3EB6, 0x8428, 0x3EB9, 0x8528, 0x383A, 0x0FA9, 0x3EB5, 0x7294,
  268. 0x3EB7, 0x8474, 0x3EBA, 0x8575, 0x3EB8, 0x44C3, 0x3EBB, 0x45C3,
  269. 0x0000, 0xA404, 0x0001, 0xA504, 0x141F, 0x0671, 0x14FD, 0x0287,
  270. 0x3EBC, 0xE610, 0x3EC8, 0x0C7B, 0x031A, 0x07E6, 0x3EC8, 0x86F7,
  271. 0x3EC0, 0x821E, 0x3EBE, 0xD208, 0x3EBD, 0x021F, 0x3ECA, 0x0386,
  272. 0x3EC1, 0x0C03, 0x3EC9, 0x031E, 0x3ECA, 0x8C4C, 0x3EBF, 0x0C55,
  273. 0x3EC9, 0xC208, 0x3EC4, 0xBC84, 0x3EC8, 0x0EAD, 0x3EC8, 0xD308,
  274. 0x3EC2, 0x8F7E, 0x3ECB, 0x0219, 0x3ECB, 0xD26E, 0x3EC5, 0x031F,
  275. 0x3EC6, 0xC308, 0x3EC3, 0x32FF, 0x3EC9, 0x0265, 0x3EC9, 0x8319,
  276. 0x1342, 0xD36E, 0x3EC7, 0x33FF, 0x0000, 0x8365, 0x1420, 0x9570,
  277. };
  278. /* send an initialization array
  279. * Taken from the oss driver, not obvious from the doc how this
  280. * is meant to work
  281. */
  282. static void
  283. send_array(struct snd_emu8000 *emu, const unsigned short *data, int size)
  284. {
  285. int i;
  286. const unsigned short *p;
  287. p = data;
  288. for (i = 0; i < size; i++, p++)
  289. EMU8000_INIT1_WRITE(emu, i, *p);
  290. for (i = 0; i < size; i++, p++)
  291. EMU8000_INIT2_WRITE(emu, i, *p);
  292. for (i = 0; i < size; i++, p++)
  293. EMU8000_INIT3_WRITE(emu, i, *p);
  294. for (i = 0; i < size; i++, p++)
  295. EMU8000_INIT4_WRITE(emu, i, *p);
  296. }
  297. /*
  298. * Send initialization arrays to start up, this just follows the
  299. * initialisation sequence in the adip.
  300. */
  301. static void
  302. init_arrays(struct snd_emu8000 *emu)
  303. {
  304. send_array(emu, init1, ARRAY_SIZE(init1)/4);
  305. msleep((1024 * 1000) / 44100); /* wait for 1024 clocks */
  306. send_array(emu, init2, ARRAY_SIZE(init2)/4);
  307. send_array(emu, init3, ARRAY_SIZE(init3)/4);
  308. EMU8000_HWCF4_WRITE(emu, 0);
  309. EMU8000_HWCF5_WRITE(emu, 0x83);
  310. EMU8000_HWCF6_WRITE(emu, 0x8000);
  311. send_array(emu, init4, ARRAY_SIZE(init4)/4);
  312. }
  313. #define UNIQUE_ID1 0xa5b9
  314. #define UNIQUE_ID2 0x9d53
  315. /*
  316. * Size the onboard memory.
  317. * This is written so as not to need arbitrary delays after the write. It
  318. * seems that the only way to do this is to use the one channel and keep
  319. * reallocating between read and write.
  320. */
  321. static void
  322. size_dram(struct snd_emu8000 *emu)
  323. {
  324. int i, size;
  325. if (emu->dram_checked)
  326. return;
  327. size = 0;
  328. /* write out a magic number */
  329. snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_WRITE);
  330. snd_emu8000_dma_chan(emu, 1, EMU8000_RAM_READ);
  331. EMU8000_SMALW_WRITE(emu, EMU8000_DRAM_OFFSET);
  332. EMU8000_SMLD_WRITE(emu, UNIQUE_ID1);
  333. snd_emu8000_init_fm(emu); /* This must really be here and not 2 lines back even */
  334. snd_emu8000_write_wait(emu);
  335. /*
  336. * Detect first 512 KiB. If a write succeeds at the beginning of a
  337. * 512 KiB page we assume that the whole page is there.
  338. */
  339. EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET);
  340. EMU8000_SMLD_READ(emu); /* discard stale data */
  341. if (EMU8000_SMLD_READ(emu) != UNIQUE_ID1)
  342. goto skip_detect; /* No RAM */
  343. snd_emu8000_read_wait(emu);
  344. for (size = 512 * 1024; size < EMU8000_MAX_DRAM; size += 512 * 1024) {
  345. /* Write a unique data on the test address.
  346. * if the address is out of range, the data is written on
  347. * 0x200000(=EMU8000_DRAM_OFFSET). Then the id word is
  348. * changed by this data.
  349. */
  350. /*snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_WRITE);*/
  351. EMU8000_SMALW_WRITE(emu, EMU8000_DRAM_OFFSET + (size>>1));
  352. EMU8000_SMLD_WRITE(emu, UNIQUE_ID2);
  353. snd_emu8000_write_wait(emu);
  354. /*
  355. * read the data on the just written DRAM address
  356. * if not the same then we have reached the end of ram.
  357. */
  358. /*snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_READ);*/
  359. EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET + (size>>1));
  360. /*snd_emu8000_read_wait(emu);*/
  361. EMU8000_SMLD_READ(emu); /* discard stale data */
  362. if (EMU8000_SMLD_READ(emu) != UNIQUE_ID2)
  363. break; /* no memory at this address */
  364. snd_emu8000_read_wait(emu);
  365. /*
  366. * If it is the same it could be that the address just
  367. * wraps back to the beginning; so check to see if the
  368. * initial value has been overwritten.
  369. */
  370. EMU8000_SMALR_WRITE(emu, EMU8000_DRAM_OFFSET);
  371. EMU8000_SMLD_READ(emu); /* discard stale data */
  372. if (EMU8000_SMLD_READ(emu) != UNIQUE_ID1)
  373. break; /* we must have wrapped around */
  374. snd_emu8000_read_wait(emu);
  375. /* Otherwise, it's valid memory. */
  376. }
  377. skip_detect:
  378. /* wait until FULL bit in SMAxW register is false */
  379. for (i = 0; i < 10000; i++) {
  380. if ((EMU8000_SMALW_READ(emu) & 0x80000000) == 0)
  381. break;
  382. schedule_timeout_interruptible(1);
  383. if (signal_pending(current))
  384. break;
  385. }
  386. snd_emu8000_dma_chan(emu, 0, EMU8000_RAM_CLOSE);
  387. snd_emu8000_dma_chan(emu, 1, EMU8000_RAM_CLOSE);
  388. pr_info("EMU8000 [0x%lx]: %d KiB on-board DRAM detected\n",
  389. emu->port1, size/1024);
  390. emu->mem_size = size;
  391. emu->dram_checked = 1;
  392. }
  393. /*
  394. * Initiailise the FM section. You have to do this to use sample RAM
  395. * and therefore lose 2 voices.
  396. */
  397. /*exported*/ void
  398. snd_emu8000_init_fm(struct snd_emu8000 *emu)
  399. {
  400. unsigned long flags;
  401. /* Initialize the last two channels for DRAM refresh and producing
  402. the reverb and chorus effects for Yamaha OPL-3 synthesizer */
  403. /* 31: FM left channel, 0xffffe0-0xffffe8 */
  404. EMU8000_DCYSUSV_WRITE(emu, 30, 0x80);
  405. EMU8000_PSST_WRITE(emu, 30, 0xFFFFFFE0); /* full left */
  406. EMU8000_CSL_WRITE(emu, 30, 0x00FFFFE8 | (emu->fm_chorus_depth << 24));
  407. EMU8000_PTRX_WRITE(emu, 30, (emu->fm_reverb_depth << 8));
  408. EMU8000_CPF_WRITE(emu, 30, 0);
  409. EMU8000_CCCA_WRITE(emu, 30, 0x00FFFFE3);
  410. /* 32: FM right channel, 0xfffff0-0xfffff8 */
  411. EMU8000_DCYSUSV_WRITE(emu, 31, 0x80);
  412. EMU8000_PSST_WRITE(emu, 31, 0x00FFFFF0); /* full right */
  413. EMU8000_CSL_WRITE(emu, 31, 0x00FFFFF8 | (emu->fm_chorus_depth << 24));
  414. EMU8000_PTRX_WRITE(emu, 31, (emu->fm_reverb_depth << 8));
  415. EMU8000_CPF_WRITE(emu, 31, 0x8000);
  416. EMU8000_CCCA_WRITE(emu, 31, 0x00FFFFF3);
  417. snd_emu8000_poke((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (30)), 0);
  418. spin_lock_irqsave(&emu->reg_lock, flags);
  419. while (!(inw(EMU8000_PTR(emu)) & 0x1000))
  420. ;
  421. while ((inw(EMU8000_PTR(emu)) & 0x1000))
  422. ;
  423. spin_unlock_irqrestore(&emu->reg_lock, flags);
  424. snd_emu8000_poke((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (30)), 0x4828);
  425. /* this is really odd part.. */
  426. outb(0x3C, EMU8000_PTR(emu));
  427. outb(0, EMU8000_DATA1(emu));
  428. /* skew volume & cutoff */
  429. EMU8000_VTFT_WRITE(emu, 30, 0x8000FFFF);
  430. EMU8000_VTFT_WRITE(emu, 31, 0x8000FFFF);
  431. }
  432. /*
  433. * The main initialization routine.
  434. */
  435. static void
  436. snd_emu8000_init_hw(struct snd_emu8000 *emu)
  437. {
  438. int i;
  439. emu->last_reg = 0xffff; /* reset the last register index */
  440. /* initialize hardware configuration */
  441. EMU8000_HWCF1_WRITE(emu, 0x0059);
  442. EMU8000_HWCF2_WRITE(emu, 0x0020);
  443. /* disable audio; this seems to reduce a clicking noise a bit.. */
  444. EMU8000_HWCF3_WRITE(emu, 0);
  445. /* initialize audio channels */
  446. init_audio(emu);
  447. /* initialize DMA */
  448. init_dma(emu);
  449. /* initialize init arrays */
  450. init_arrays(emu);
  451. /*
  452. * Initialize the FM section of the AWE32, this is needed
  453. * for DRAM refresh as well
  454. */
  455. snd_emu8000_init_fm(emu);
  456. /* terminate all voices */
  457. for (i = 0; i < EMU8000_DRAM_VOICES; i++)
  458. EMU8000_DCYSUSV_WRITE(emu, 0, 0x807F);
  459. /* check DRAM memory size */
  460. size_dram(emu);
  461. /* enable audio */
  462. EMU8000_HWCF3_WRITE(emu, 0x4);
  463. /* set equzlier, chorus and reverb modes */
  464. snd_emu8000_update_equalizer(emu);
  465. snd_emu8000_update_chorus_mode(emu);
  466. snd_emu8000_update_reverb_mode(emu);
  467. }
  468. /*----------------------------------------------------------------
  469. * Bass/Treble Equalizer
  470. *----------------------------------------------------------------*/
  471. static const unsigned short bass_parm[12][3] = {
  472. {0xD26A, 0xD36A, 0x0000}, /* -12 dB */
  473. {0xD25B, 0xD35B, 0x0000}, /* -8 */
  474. {0xD24C, 0xD34C, 0x0000}, /* -6 */
  475. {0xD23D, 0xD33D, 0x0000}, /* -4 */
  476. {0xD21F, 0xD31F, 0x0000}, /* -2 */
  477. {0xC208, 0xC308, 0x0001}, /* 0 (HW default) */
  478. {0xC219, 0xC319, 0x0001}, /* +2 */
  479. {0xC22A, 0xC32A, 0x0001}, /* +4 */
  480. {0xC24C, 0xC34C, 0x0001}, /* +6 */
  481. {0xC26E, 0xC36E, 0x0001}, /* +8 */
  482. {0xC248, 0xC384, 0x0002}, /* +10 */
  483. {0xC26A, 0xC36A, 0x0002}, /* +12 dB */
  484. };
  485. static const unsigned short treble_parm[12][9] = {
  486. {0x821E, 0xC26A, 0x031E, 0xC36A, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001}, /* -12 dB */
  487. {0x821E, 0xC25B, 0x031E, 0xC35B, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  488. {0x821E, 0xC24C, 0x031E, 0xC34C, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  489. {0x821E, 0xC23D, 0x031E, 0xC33D, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  490. {0x821E, 0xC21F, 0x031E, 0xC31F, 0x021E, 0xD208, 0x831E, 0xD308, 0x0001},
  491. {0x821E, 0xD208, 0x031E, 0xD308, 0x021E, 0xD208, 0x831E, 0xD308, 0x0002},
  492. {0x821E, 0xD208, 0x031E, 0xD308, 0x021D, 0xD219, 0x831D, 0xD319, 0x0002},
  493. {0x821E, 0xD208, 0x031E, 0xD308, 0x021C, 0xD22A, 0x831C, 0xD32A, 0x0002},
  494. {0x821E, 0xD208, 0x031E, 0xD308, 0x021A, 0xD24C, 0x831A, 0xD34C, 0x0002},
  495. {0x821E, 0xD208, 0x031E, 0xD308, 0x0219, 0xD26E, 0x8319, 0xD36E, 0x0002}, /* +8 (HW default) */
  496. {0x821D, 0xD219, 0x031D, 0xD319, 0x0219, 0xD26E, 0x8319, 0xD36E, 0x0002},
  497. {0x821C, 0xD22A, 0x031C, 0xD32A, 0x0219, 0xD26E, 0x8319, 0xD36E, 0x0002} /* +12 dB */
  498. };
  499. /*
  500. * set Emu8000 digital equalizer; from 0 to 11 [-12dB - 12dB]
  501. */
  502. /*exported*/ void
  503. snd_emu8000_update_equalizer(struct snd_emu8000 *emu)
  504. {
  505. unsigned short w;
  506. int bass = emu->bass_level;
  507. int treble = emu->treble_level;
  508. if (bass < 0 || bass > 11 || treble < 0 || treble > 11)
  509. return;
  510. EMU8000_INIT4_WRITE(emu, 0x01, bass_parm[bass][0]);
  511. EMU8000_INIT4_WRITE(emu, 0x11, bass_parm[bass][1]);
  512. EMU8000_INIT3_WRITE(emu, 0x11, treble_parm[treble][0]);
  513. EMU8000_INIT3_WRITE(emu, 0x13, treble_parm[treble][1]);
  514. EMU8000_INIT3_WRITE(emu, 0x1b, treble_parm[treble][2]);
  515. EMU8000_INIT4_WRITE(emu, 0x07, treble_parm[treble][3]);
  516. EMU8000_INIT4_WRITE(emu, 0x0b, treble_parm[treble][4]);
  517. EMU8000_INIT4_WRITE(emu, 0x0d, treble_parm[treble][5]);
  518. EMU8000_INIT4_WRITE(emu, 0x17, treble_parm[treble][6]);
  519. EMU8000_INIT4_WRITE(emu, 0x19, treble_parm[treble][7]);
  520. w = bass_parm[bass][2] + treble_parm[treble][8];
  521. EMU8000_INIT4_WRITE(emu, 0x15, (unsigned short)(w + 0x0262));
  522. EMU8000_INIT4_WRITE(emu, 0x1d, (unsigned short)(w + 0x8362));
  523. }
  524. /*----------------------------------------------------------------
  525. * Chorus mode control
  526. *----------------------------------------------------------------*/
  527. /*
  528. * chorus mode parameters
  529. */
  530. #define SNDRV_EMU8000_CHORUS_1 0
  531. #define SNDRV_EMU8000_CHORUS_2 1
  532. #define SNDRV_EMU8000_CHORUS_3 2
  533. #define SNDRV_EMU8000_CHORUS_4 3
  534. #define SNDRV_EMU8000_CHORUS_FEEDBACK 4
  535. #define SNDRV_EMU8000_CHORUS_FLANGER 5
  536. #define SNDRV_EMU8000_CHORUS_SHORTDELAY 6
  537. #define SNDRV_EMU8000_CHORUS_SHORTDELAY2 7
  538. #define SNDRV_EMU8000_CHORUS_PREDEFINED 8
  539. /* user can define chorus modes up to 32 */
  540. #define SNDRV_EMU8000_CHORUS_NUMBERS 32
  541. struct soundfont_chorus_fx {
  542. unsigned short feedback; /* feedback level (0xE600-0xE6FF) */
  543. unsigned short delay_offset; /* delay (0-0x0DA3) [1/44100 sec] */
  544. unsigned short lfo_depth; /* LFO depth (0xBC00-0xBCFF) */
  545. unsigned int delay; /* right delay (0-0xFFFFFFFF) [1/256/44100 sec] */
  546. unsigned int lfo_freq; /* LFO freq LFO freq (0-0xFFFFFFFF) */
  547. };
  548. /* 5 parameters for each chorus mode; 3 x 16bit, 2 x 32bit */
  549. static char chorus_defined[SNDRV_EMU8000_CHORUS_NUMBERS];
  550. static struct soundfont_chorus_fx chorus_parm[SNDRV_EMU8000_CHORUS_NUMBERS] = {
  551. {0xE600, 0x03F6, 0xBC2C ,0x00000000, 0x0000006D}, /* chorus 1 */
  552. {0xE608, 0x031A, 0xBC6E, 0x00000000, 0x0000017C}, /* chorus 2 */
  553. {0xE610, 0x031A, 0xBC84, 0x00000000, 0x00000083}, /* chorus 3 */
  554. {0xE620, 0x0269, 0xBC6E, 0x00000000, 0x0000017C}, /* chorus 4 */
  555. {0xE680, 0x04D3, 0xBCA6, 0x00000000, 0x0000005B}, /* feedback */
  556. {0xE6E0, 0x044E, 0xBC37, 0x00000000, 0x00000026}, /* flanger */
  557. {0xE600, 0x0B06, 0xBC00, 0x0006E000, 0x00000083}, /* short delay */
  558. {0xE6C0, 0x0B06, 0xBC00, 0x0006E000, 0x00000083}, /* short delay + feedback */
  559. };
  560. /*exported*/ int
  561. snd_emu8000_load_chorus_fx(struct snd_emu8000 *emu, int mode, const void __user *buf, long len)
  562. {
  563. struct soundfont_chorus_fx rec;
  564. if (mode < SNDRV_EMU8000_CHORUS_PREDEFINED || mode >= SNDRV_EMU8000_CHORUS_NUMBERS) {
  565. snd_printk(KERN_WARNING "invalid chorus mode %d for uploading\n", mode);
  566. return -EINVAL;
  567. }
  568. if (len < (long)sizeof(rec) || copy_from_user(&rec, buf, sizeof(rec)))
  569. return -EFAULT;
  570. chorus_parm[mode] = rec;
  571. chorus_defined[mode] = 1;
  572. return 0;
  573. }
  574. /*exported*/ void
  575. snd_emu8000_update_chorus_mode(struct snd_emu8000 *emu)
  576. {
  577. int effect = emu->chorus_mode;
  578. if (effect < 0 || effect >= SNDRV_EMU8000_CHORUS_NUMBERS ||
  579. (effect >= SNDRV_EMU8000_CHORUS_PREDEFINED && !chorus_defined[effect]))
  580. return;
  581. EMU8000_INIT3_WRITE(emu, 0x09, chorus_parm[effect].feedback);
  582. EMU8000_INIT3_WRITE(emu, 0x0c, chorus_parm[effect].delay_offset);
  583. EMU8000_INIT4_WRITE(emu, 0x03, chorus_parm[effect].lfo_depth);
  584. EMU8000_HWCF4_WRITE(emu, chorus_parm[effect].delay);
  585. EMU8000_HWCF5_WRITE(emu, chorus_parm[effect].lfo_freq);
  586. EMU8000_HWCF6_WRITE(emu, 0x8000);
  587. EMU8000_HWCF7_WRITE(emu, 0x0000);
  588. }
  589. /*----------------------------------------------------------------
  590. * Reverb mode control
  591. *----------------------------------------------------------------*/
  592. /*
  593. * reverb mode parameters
  594. */
  595. #define SNDRV_EMU8000_REVERB_ROOM1 0
  596. #define SNDRV_EMU8000_REVERB_ROOM2 1
  597. #define SNDRV_EMU8000_REVERB_ROOM3 2
  598. #define SNDRV_EMU8000_REVERB_HALL1 3
  599. #define SNDRV_EMU8000_REVERB_HALL2 4
  600. #define SNDRV_EMU8000_REVERB_PLATE 5
  601. #define SNDRV_EMU8000_REVERB_DELAY 6
  602. #define SNDRV_EMU8000_REVERB_PANNINGDELAY 7
  603. #define SNDRV_EMU8000_REVERB_PREDEFINED 8
  604. /* user can define reverb modes up to 32 */
  605. #define SNDRV_EMU8000_REVERB_NUMBERS 32
  606. struct soundfont_reverb_fx {
  607. unsigned short parms[28];
  608. };
  609. /* reverb mode settings; write the following 28 data of 16 bit length
  610. * on the corresponding ports in the reverb_cmds array
  611. */
  612. static char reverb_defined[SNDRV_EMU8000_CHORUS_NUMBERS];
  613. static struct soundfont_reverb_fx reverb_parm[SNDRV_EMU8000_REVERB_NUMBERS] = {
  614. {{ /* room 1 */
  615. 0xB488, 0xA450, 0x9550, 0x84B5, 0x383A, 0x3EB5, 0x72F4,
  616. 0x72A4, 0x7254, 0x7204, 0x7204, 0x7204, 0x4416, 0x4516,
  617. 0xA490, 0xA590, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  618. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  619. }},
  620. {{ /* room 2 */
  621. 0xB488, 0xA458, 0x9558, 0x84B5, 0x383A, 0x3EB5, 0x7284,
  622. 0x7254, 0x7224, 0x7224, 0x7254, 0x7284, 0x4448, 0x4548,
  623. 0xA440, 0xA540, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  624. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  625. }},
  626. {{ /* room 3 */
  627. 0xB488, 0xA460, 0x9560, 0x84B5, 0x383A, 0x3EB5, 0x7284,
  628. 0x7254, 0x7224, 0x7224, 0x7254, 0x7284, 0x4416, 0x4516,
  629. 0xA490, 0xA590, 0x842C, 0x852C, 0x842C, 0x852C, 0x842B,
  630. 0x852B, 0x842B, 0x852B, 0x842A, 0x852A, 0x842A, 0x852A,
  631. }},
  632. {{ /* hall 1 */
  633. 0xB488, 0xA470, 0x9570, 0x84B5, 0x383A, 0x3EB5, 0x7284,
  634. 0x7254, 0x7224, 0x7224, 0x7254, 0x7284, 0x4448, 0x4548,
  635. 0xA440, 0xA540, 0x842B, 0x852B, 0x842B, 0x852B, 0x842A,
  636. 0x852A, 0x842A, 0x852A, 0x8429, 0x8529, 0x8429, 0x8529,
  637. }},
  638. {{ /* hall 2 */
  639. 0xB488, 0xA470, 0x9570, 0x84B5, 0x383A, 0x3EB5, 0x7254,
  640. 0x7234, 0x7224, 0x7254, 0x7264, 0x7294, 0x44C3, 0x45C3,
  641. 0xA404, 0xA504, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  642. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  643. }},
  644. {{ /* plate */
  645. 0xB4FF, 0xA470, 0x9570, 0x84B5, 0x383A, 0x3EB5, 0x7234,
  646. 0x7234, 0x7234, 0x7234, 0x7234, 0x7234, 0x4448, 0x4548,
  647. 0xA440, 0xA540, 0x842A, 0x852A, 0x842A, 0x852A, 0x8429,
  648. 0x8529, 0x8429, 0x8529, 0x8428, 0x8528, 0x8428, 0x8528,
  649. }},
  650. {{ /* delay */
  651. 0xB4FF, 0xA470, 0x9500, 0x84B5, 0x333A, 0x39B5, 0x7204,
  652. 0x7204, 0x7204, 0x7204, 0x7204, 0x72F4, 0x4400, 0x4500,
  653. 0xA4FF, 0xA5FF, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420,
  654. 0x8520, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420, 0x8520,
  655. }},
  656. {{ /* panning delay */
  657. 0xB4FF, 0xA490, 0x9590, 0x8474, 0x333A, 0x39B5, 0x7204,
  658. 0x7204, 0x7204, 0x7204, 0x7204, 0x72F4, 0x4400, 0x4500,
  659. 0xA4FF, 0xA5FF, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420,
  660. 0x8520, 0x8420, 0x8520, 0x8420, 0x8520, 0x8420, 0x8520,
  661. }},
  662. };
  663. enum { DATA1, DATA2 };
  664. #define AWE_INIT1(c) EMU8000_CMD(2,c), DATA1
  665. #define AWE_INIT2(c) EMU8000_CMD(2,c), DATA2
  666. #define AWE_INIT3(c) EMU8000_CMD(3,c), DATA1
  667. #define AWE_INIT4(c) EMU8000_CMD(3,c), DATA2
  668. static struct reverb_cmd_pair {
  669. unsigned short cmd, port;
  670. } reverb_cmds[28] = {
  671. {AWE_INIT1(0x03)}, {AWE_INIT1(0x05)}, {AWE_INIT4(0x1F)}, {AWE_INIT1(0x07)},
  672. {AWE_INIT2(0x14)}, {AWE_INIT2(0x16)}, {AWE_INIT1(0x0F)}, {AWE_INIT1(0x17)},
  673. {AWE_INIT1(0x1F)}, {AWE_INIT2(0x07)}, {AWE_INIT2(0x0F)}, {AWE_INIT2(0x17)},
  674. {AWE_INIT2(0x1D)}, {AWE_INIT2(0x1F)}, {AWE_INIT3(0x01)}, {AWE_INIT3(0x03)},
  675. {AWE_INIT1(0x09)}, {AWE_INIT1(0x0B)}, {AWE_INIT1(0x11)}, {AWE_INIT1(0x13)},
  676. {AWE_INIT1(0x19)}, {AWE_INIT1(0x1B)}, {AWE_INIT2(0x01)}, {AWE_INIT2(0x03)},
  677. {AWE_INIT2(0x09)}, {AWE_INIT2(0x0B)}, {AWE_INIT2(0x11)}, {AWE_INIT2(0x13)},
  678. };
  679. /*exported*/ int
  680. snd_emu8000_load_reverb_fx(struct snd_emu8000 *emu, int mode, const void __user *buf, long len)
  681. {
  682. struct soundfont_reverb_fx rec;
  683. if (mode < SNDRV_EMU8000_REVERB_PREDEFINED || mode >= SNDRV_EMU8000_REVERB_NUMBERS) {
  684. snd_printk(KERN_WARNING "invalid reverb mode %d for uploading\n", mode);
  685. return -EINVAL;
  686. }
  687. if (len < (long)sizeof(rec) || copy_from_user(&rec, buf, sizeof(rec)))
  688. return -EFAULT;
  689. reverb_parm[mode] = rec;
  690. reverb_defined[mode] = 1;
  691. return 0;
  692. }
  693. /*exported*/ void
  694. snd_emu8000_update_reverb_mode(struct snd_emu8000 *emu)
  695. {
  696. int effect = emu->reverb_mode;
  697. int i;
  698. if (effect < 0 || effect >= SNDRV_EMU8000_REVERB_NUMBERS ||
  699. (effect >= SNDRV_EMU8000_REVERB_PREDEFINED && !reverb_defined[effect]))
  700. return;
  701. for (i = 0; i < 28; i++) {
  702. int port;
  703. if (reverb_cmds[i].port == DATA1)
  704. port = EMU8000_DATA1(emu);
  705. else
  706. port = EMU8000_DATA2(emu);
  707. snd_emu8000_poke(emu, port, reverb_cmds[i].cmd, reverb_parm[effect].parms[i]);
  708. }
  709. }
  710. /*----------------------------------------------------------------
  711. * mixer interface
  712. *----------------------------------------------------------------*/
  713. /*
  714. * bass/treble
  715. */
  716. static int mixer_bass_treble_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  717. {
  718. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  719. uinfo->count = 1;
  720. uinfo->value.integer.min = 0;
  721. uinfo->value.integer.max = 11;
  722. return 0;
  723. }
  724. static int mixer_bass_treble_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  725. {
  726. struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
  727. ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->treble_level : emu->bass_level;
  728. return 0;
  729. }
  730. static int mixer_bass_treble_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  731. {
  732. struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
  733. unsigned long flags;
  734. int change;
  735. unsigned short val1;
  736. val1 = ucontrol->value.integer.value[0] % 12;
  737. spin_lock_irqsave(&emu->control_lock, flags);
  738. if (kcontrol->private_value) {
  739. change = val1 != emu->treble_level;
  740. emu->treble_level = val1;
  741. } else {
  742. change = val1 != emu->bass_level;
  743. emu->bass_level = val1;
  744. }
  745. spin_unlock_irqrestore(&emu->control_lock, flags);
  746. snd_emu8000_update_equalizer(emu);
  747. return change;
  748. }
  749. static const struct snd_kcontrol_new mixer_bass_control =
  750. {
  751. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  752. .name = "Synth Tone Control - Bass",
  753. .info = mixer_bass_treble_info,
  754. .get = mixer_bass_treble_get,
  755. .put = mixer_bass_treble_put,
  756. .private_value = 0,
  757. };
  758. static const struct snd_kcontrol_new mixer_treble_control =
  759. {
  760. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  761. .name = "Synth Tone Control - Treble",
  762. .info = mixer_bass_treble_info,
  763. .get = mixer_bass_treble_get,
  764. .put = mixer_bass_treble_put,
  765. .private_value = 1,
  766. };
  767. /*
  768. * chorus/reverb mode
  769. */
  770. static int mixer_chorus_reverb_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  771. {
  772. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  773. uinfo->count = 1;
  774. uinfo->value.integer.min = 0;
  775. uinfo->value.integer.max = kcontrol->private_value ? (SNDRV_EMU8000_CHORUS_NUMBERS-1) : (SNDRV_EMU8000_REVERB_NUMBERS-1);
  776. return 0;
  777. }
  778. static int mixer_chorus_reverb_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  779. {
  780. struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
  781. ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->chorus_mode : emu->reverb_mode;
  782. return 0;
  783. }
  784. static int mixer_chorus_reverb_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  785. {
  786. struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
  787. unsigned long flags;
  788. int change;
  789. unsigned short val1;
  790. spin_lock_irqsave(&emu->control_lock, flags);
  791. if (kcontrol->private_value) {
  792. val1 = ucontrol->value.integer.value[0] % SNDRV_EMU8000_CHORUS_NUMBERS;
  793. change = val1 != emu->chorus_mode;
  794. emu->chorus_mode = val1;
  795. } else {
  796. val1 = ucontrol->value.integer.value[0] % SNDRV_EMU8000_REVERB_NUMBERS;
  797. change = val1 != emu->reverb_mode;
  798. emu->reverb_mode = val1;
  799. }
  800. spin_unlock_irqrestore(&emu->control_lock, flags);
  801. if (change) {
  802. if (kcontrol->private_value)
  803. snd_emu8000_update_chorus_mode(emu);
  804. else
  805. snd_emu8000_update_reverb_mode(emu);
  806. }
  807. return change;
  808. }
  809. static const struct snd_kcontrol_new mixer_chorus_mode_control =
  810. {
  811. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  812. .name = "Chorus Mode",
  813. .info = mixer_chorus_reverb_info,
  814. .get = mixer_chorus_reverb_get,
  815. .put = mixer_chorus_reverb_put,
  816. .private_value = 1,
  817. };
  818. static const struct snd_kcontrol_new mixer_reverb_mode_control =
  819. {
  820. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  821. .name = "Reverb Mode",
  822. .info = mixer_chorus_reverb_info,
  823. .get = mixer_chorus_reverb_get,
  824. .put = mixer_chorus_reverb_put,
  825. .private_value = 0,
  826. };
  827. /*
  828. * FM OPL3 chorus/reverb depth
  829. */
  830. static int mixer_fm_depth_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  831. {
  832. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  833. uinfo->count = 1;
  834. uinfo->value.integer.min = 0;
  835. uinfo->value.integer.max = 255;
  836. return 0;
  837. }
  838. static int mixer_fm_depth_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  839. {
  840. struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
  841. ucontrol->value.integer.value[0] = kcontrol->private_value ? emu->fm_chorus_depth : emu->fm_reverb_depth;
  842. return 0;
  843. }
  844. static int mixer_fm_depth_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  845. {
  846. struct snd_emu8000 *emu = snd_kcontrol_chip(kcontrol);
  847. unsigned long flags;
  848. int change;
  849. unsigned short val1;
  850. val1 = ucontrol->value.integer.value[0] % 256;
  851. spin_lock_irqsave(&emu->control_lock, flags);
  852. if (kcontrol->private_value) {
  853. change = val1 != emu->fm_chorus_depth;
  854. emu->fm_chorus_depth = val1;
  855. } else {
  856. change = val1 != emu->fm_reverb_depth;
  857. emu->fm_reverb_depth = val1;
  858. }
  859. spin_unlock_irqrestore(&emu->control_lock, flags);
  860. if (change)
  861. snd_emu8000_init_fm(emu);
  862. return change;
  863. }
  864. static const struct snd_kcontrol_new mixer_fm_chorus_depth_control =
  865. {
  866. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  867. .name = "FM Chorus Depth",
  868. .info = mixer_fm_depth_info,
  869. .get = mixer_fm_depth_get,
  870. .put = mixer_fm_depth_put,
  871. .private_value = 1,
  872. };
  873. static const struct snd_kcontrol_new mixer_fm_reverb_depth_control =
  874. {
  875. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  876. .name = "FM Reverb Depth",
  877. .info = mixer_fm_depth_info,
  878. .get = mixer_fm_depth_get,
  879. .put = mixer_fm_depth_put,
  880. .private_value = 0,
  881. };
  882. static const struct snd_kcontrol_new *mixer_defs[EMU8000_NUM_CONTROLS] = {
  883. &mixer_bass_control,
  884. &mixer_treble_control,
  885. &mixer_chorus_mode_control,
  886. &mixer_reverb_mode_control,
  887. &mixer_fm_chorus_depth_control,
  888. &mixer_fm_reverb_depth_control,
  889. };
  890. /*
  891. * create and attach mixer elements for WaveTable treble/bass controls
  892. */
  893. static int
  894. snd_emu8000_create_mixer(struct snd_card *card, struct snd_emu8000 *emu)
  895. {
  896. struct snd_kcontrol *kctl;
  897. int i, err = 0;
  898. if (snd_BUG_ON(!emu || !card))
  899. return -EINVAL;
  900. spin_lock_init(&emu->control_lock);
  901. memset(emu->controls, 0, sizeof(emu->controls));
  902. for (i = 0; i < EMU8000_NUM_CONTROLS; i++) {
  903. kctl = snd_ctl_new1(mixer_defs[i], emu);
  904. err = snd_ctl_add(card, kctl);
  905. if (err < 0)
  906. goto __error;
  907. emu->controls[i] = kctl;
  908. }
  909. return 0;
  910. __error:
  911. for (i = 0; i < EMU8000_NUM_CONTROLS; i++) {
  912. down_write(&card->controls_rwsem);
  913. if (emu->controls[i])
  914. snd_ctl_remove(card, emu->controls[i]);
  915. up_write(&card->controls_rwsem);
  916. }
  917. return err;
  918. }
  919. /*
  920. * initialize and register emu8000 synth device.
  921. */
  922. int
  923. snd_emu8000_new(struct snd_card *card, int index, long port, int seq_ports,
  924. struct snd_seq_device **awe_ret)
  925. {
  926. struct snd_seq_device *awe;
  927. struct snd_emu8000 *hw;
  928. int err;
  929. if (awe_ret)
  930. *awe_ret = NULL;
  931. if (seq_ports <= 0)
  932. return 0;
  933. hw = devm_kzalloc(card->dev, sizeof(*hw), GFP_KERNEL);
  934. if (hw == NULL)
  935. return -ENOMEM;
  936. spin_lock_init(&hw->reg_lock);
  937. hw->index = index;
  938. hw->port1 = port;
  939. hw->port2 = port + 0x400;
  940. hw->port3 = port + 0x800;
  941. if (!devm_request_region(card->dev, hw->port1, 4, "Emu8000-1") ||
  942. !devm_request_region(card->dev, hw->port2, 4, "Emu8000-2") ||
  943. !devm_request_region(card->dev, hw->port3, 4, "Emu8000-3")) {
  944. snd_printk(KERN_ERR "sbawe: can't grab ports 0x%lx, 0x%lx, 0x%lx\n", hw->port1, hw->port2, hw->port3);
  945. return -EBUSY;
  946. }
  947. hw->mem_size = 0;
  948. hw->card = card;
  949. hw->seq_ports = seq_ports;
  950. hw->bass_level = 5;
  951. hw->treble_level = 9;
  952. hw->chorus_mode = 2;
  953. hw->reverb_mode = 4;
  954. hw->fm_chorus_depth = 0;
  955. hw->fm_reverb_depth = 0;
  956. if (snd_emu8000_detect(hw) < 0)
  957. return -ENODEV;
  958. snd_emu8000_init_hw(hw);
  959. err = snd_emu8000_create_mixer(card, hw);
  960. if (err < 0)
  961. return err;
  962. #if IS_ENABLED(CONFIG_SND_SEQUENCER)
  963. if (snd_seq_device_new(card, index, SNDRV_SEQ_DEV_ID_EMU8000,
  964. sizeof(struct snd_emu8000*), &awe) >= 0) {
  965. strcpy(awe->name, "EMU-8000");
  966. *(struct snd_emu8000 **)SNDRV_SEQ_DEVICE_ARGPTR(awe) = hw;
  967. }
  968. #else
  969. awe = NULL;
  970. #endif
  971. if (awe_ret)
  972. *awe_ret = awe;
  973. return 0;
  974. }
  975. /*
  976. * exported stuff
  977. */
  978. EXPORT_SYMBOL(snd_emu8000_poke);
  979. EXPORT_SYMBOL(snd_emu8000_peek);
  980. EXPORT_SYMBOL(snd_emu8000_poke_dw);
  981. EXPORT_SYMBOL(snd_emu8000_peek_dw);
  982. EXPORT_SYMBOL(snd_emu8000_dma_chan);
  983. EXPORT_SYMBOL(snd_emu8000_init_fm);
  984. EXPORT_SYMBOL(snd_emu8000_load_chorus_fx);
  985. EXPORT_SYMBOL(snd_emu8000_load_reverb_fx);
  986. EXPORT_SYMBOL(snd_emu8000_update_chorus_mode);
  987. EXPORT_SYMBOL(snd_emu8000_update_reverb_mode);
  988. EXPORT_SYMBOL(snd_emu8000_update_equalizer);