cs4236_lib.c 37 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (c) by Jaroslav Kysela <[email protected]>
  4. * Routines for control of CS4235/4236B/4237B/4238B/4239 chips
  5. *
  6. * Note:
  7. * -----
  8. *
  9. * Bugs:
  10. * -----
  11. */
  12. /*
  13. * Indirect control registers (CS4236B+)
  14. *
  15. * C0
  16. * D8: WSS reset (all chips)
  17. *
  18. * C1 (all chips except CS4236)
  19. * D7-D5: version
  20. * D4-D0: chip id
  21. * 11101 - CS4235
  22. * 01011 - CS4236B
  23. * 01000 - CS4237B
  24. * 01001 - CS4238B
  25. * 11110 - CS4239
  26. *
  27. * C2
  28. * D7-D4: 3D Space (CS4235,CS4237B,CS4238B,CS4239)
  29. * D3-D0: 3D Center (CS4237B); 3D Volume (CS4238B)
  30. *
  31. * C3
  32. * D7: 3D Enable (CS4237B)
  33. * D6: 3D Mono Enable (CS4237B)
  34. * D5: 3D Serial Output (CS4237B,CS4238B)
  35. * D4: 3D Enable (CS4235,CS4238B,CS4239)
  36. *
  37. * C4
  38. * D7: consumer serial port enable (CS4237B,CS4238B)
  39. * D6: channels status block reset (CS4237B,CS4238B)
  40. * D5: user bit in sub-frame of digital audio data (CS4237B,CS4238B)
  41. * D4: validity bit in sub-frame of digital audio data (CS4237B,CS4238B)
  42. *
  43. * C5 lower channel status (digital serial data description) (CS4237B,CS4238B)
  44. * D7-D6: first two bits of category code
  45. * D5: lock
  46. * D4-D3: pre-emphasis (0 = none, 1 = 50/15us)
  47. * D2: copy/copyright (0 = copy inhibited)
  48. * D1: 0 = digital audio / 1 = non-digital audio
  49. *
  50. * C6 upper channel status (digital serial data description) (CS4237B,CS4238B)
  51. * D7-D6: sample frequency (0 = 44.1kHz)
  52. * D5: generation status (0 = no indication, 1 = original/commercially precaptureed data)
  53. * D4-D0: category code (upper bits)
  54. *
  55. * C7 reserved (must write 0)
  56. *
  57. * C8 wavetable control
  58. * D7: volume control interrupt enable (CS4235,CS4239)
  59. * D6: hardware volume control format (CS4235,CS4239)
  60. * D3: wavetable serial port enable (all chips)
  61. * D2: DSP serial port switch (all chips)
  62. * D1: disable MCLK (all chips)
  63. * D0: force BRESET low (all chips)
  64. *
  65. */
  66. #include <linux/io.h>
  67. #include <linux/delay.h>
  68. #include <linux/init.h>
  69. #include <linux/time.h>
  70. #include <linux/wait.h>
  71. #include <sound/core.h>
  72. #include <sound/wss.h>
  73. #include <sound/asoundef.h>
  74. #include <sound/initval.h>
  75. #include <sound/tlv.h>
  76. /*
  77. *
  78. */
  79. static const unsigned char snd_cs4236_ext_map[18] = {
  80. /* CS4236_LEFT_LINE */ 0xff,
  81. /* CS4236_RIGHT_LINE */ 0xff,
  82. /* CS4236_LEFT_MIC */ 0xdf,
  83. /* CS4236_RIGHT_MIC */ 0xdf,
  84. /* CS4236_LEFT_MIX_CTRL */ 0xe0 | 0x18,
  85. /* CS4236_RIGHT_MIX_CTRL */ 0xe0,
  86. /* CS4236_LEFT_FM */ 0xbf,
  87. /* CS4236_RIGHT_FM */ 0xbf,
  88. /* CS4236_LEFT_DSP */ 0xbf,
  89. /* CS4236_RIGHT_DSP */ 0xbf,
  90. /* CS4236_RIGHT_LOOPBACK */ 0xbf,
  91. /* CS4236_DAC_MUTE */ 0xe0,
  92. /* CS4236_ADC_RATE */ 0x01, /* 48kHz */
  93. /* CS4236_DAC_RATE */ 0x01, /* 48kHz */
  94. /* CS4236_LEFT_MASTER */ 0xbf,
  95. /* CS4236_RIGHT_MASTER */ 0xbf,
  96. /* CS4236_LEFT_WAVE */ 0xbf,
  97. /* CS4236_RIGHT_WAVE */ 0xbf
  98. };
  99. /*
  100. *
  101. */
  102. static void snd_cs4236_ctrl_out(struct snd_wss *chip,
  103. unsigned char reg, unsigned char val)
  104. {
  105. outb(reg, chip->cport + 3);
  106. outb(chip->cimage[reg] = val, chip->cport + 4);
  107. }
  108. static unsigned char snd_cs4236_ctrl_in(struct snd_wss *chip, unsigned char reg)
  109. {
  110. outb(reg, chip->cport + 3);
  111. return inb(chip->cport + 4);
  112. }
  113. /*
  114. * PCM
  115. */
  116. #define CLOCKS 8
  117. static const struct snd_ratnum clocks[CLOCKS] = {
  118. { .num = 16934400, .den_min = 353, .den_max = 353, .den_step = 1 },
  119. { .num = 16934400, .den_min = 529, .den_max = 529, .den_step = 1 },
  120. { .num = 16934400, .den_min = 617, .den_max = 617, .den_step = 1 },
  121. { .num = 16934400, .den_min = 1058, .den_max = 1058, .den_step = 1 },
  122. { .num = 16934400, .den_min = 1764, .den_max = 1764, .den_step = 1 },
  123. { .num = 16934400, .den_min = 2117, .den_max = 2117, .den_step = 1 },
  124. { .num = 16934400, .den_min = 2558, .den_max = 2558, .den_step = 1 },
  125. { .num = 16934400/16, .den_min = 21, .den_max = 192, .den_step = 1 }
  126. };
  127. static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
  128. .nrats = CLOCKS,
  129. .rats = clocks,
  130. };
  131. static int snd_cs4236_xrate(struct snd_pcm_runtime *runtime)
  132. {
  133. return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  134. &hw_constraints_clocks);
  135. }
  136. static unsigned char divisor_to_rate_register(unsigned int divisor)
  137. {
  138. switch (divisor) {
  139. case 353: return 1;
  140. case 529: return 2;
  141. case 617: return 3;
  142. case 1058: return 4;
  143. case 1764: return 5;
  144. case 2117: return 6;
  145. case 2558: return 7;
  146. default:
  147. if (divisor < 21 || divisor > 192) {
  148. snd_BUG();
  149. return 192;
  150. }
  151. return divisor;
  152. }
  153. }
  154. static void snd_cs4236_playback_format(struct snd_wss *chip,
  155. struct snd_pcm_hw_params *params,
  156. unsigned char pdfr)
  157. {
  158. unsigned long flags;
  159. unsigned char rate = divisor_to_rate_register(params->rate_den);
  160. spin_lock_irqsave(&chip->reg_lock, flags);
  161. /* set fast playback format change and clean playback FIFO */
  162. snd_wss_out(chip, CS4231_ALT_FEATURE_1,
  163. chip->image[CS4231_ALT_FEATURE_1] | 0x10);
  164. snd_wss_out(chip, CS4231_PLAYBK_FORMAT, pdfr & 0xf0);
  165. snd_wss_out(chip, CS4231_ALT_FEATURE_1,
  166. chip->image[CS4231_ALT_FEATURE_1] & ~0x10);
  167. snd_cs4236_ext_out(chip, CS4236_DAC_RATE, rate);
  168. spin_unlock_irqrestore(&chip->reg_lock, flags);
  169. }
  170. static void snd_cs4236_capture_format(struct snd_wss *chip,
  171. struct snd_pcm_hw_params *params,
  172. unsigned char cdfr)
  173. {
  174. unsigned long flags;
  175. unsigned char rate = divisor_to_rate_register(params->rate_den);
  176. spin_lock_irqsave(&chip->reg_lock, flags);
  177. /* set fast capture format change and clean capture FIFO */
  178. snd_wss_out(chip, CS4231_ALT_FEATURE_1,
  179. chip->image[CS4231_ALT_FEATURE_1] | 0x20);
  180. snd_wss_out(chip, CS4231_REC_FORMAT, cdfr & 0xf0);
  181. snd_wss_out(chip, CS4231_ALT_FEATURE_1,
  182. chip->image[CS4231_ALT_FEATURE_1] & ~0x20);
  183. snd_cs4236_ext_out(chip, CS4236_ADC_RATE, rate);
  184. spin_unlock_irqrestore(&chip->reg_lock, flags);
  185. }
  186. #ifdef CONFIG_PM
  187. static void snd_cs4236_suspend(struct snd_wss *chip)
  188. {
  189. int reg;
  190. unsigned long flags;
  191. spin_lock_irqsave(&chip->reg_lock, flags);
  192. for (reg = 0; reg < 32; reg++)
  193. chip->image[reg] = snd_wss_in(chip, reg);
  194. for (reg = 0; reg < 18; reg++)
  195. chip->eimage[reg] = snd_cs4236_ext_in(chip, CS4236_I23VAL(reg));
  196. for (reg = 2; reg < 9; reg++)
  197. chip->cimage[reg] = snd_cs4236_ctrl_in(chip, reg);
  198. spin_unlock_irqrestore(&chip->reg_lock, flags);
  199. }
  200. static void snd_cs4236_resume(struct snd_wss *chip)
  201. {
  202. int reg;
  203. unsigned long flags;
  204. snd_wss_mce_up(chip);
  205. spin_lock_irqsave(&chip->reg_lock, flags);
  206. for (reg = 0; reg < 32; reg++) {
  207. switch (reg) {
  208. case CS4236_EXT_REG:
  209. case CS4231_VERSION:
  210. case 27: /* why? CS4235 - master left */
  211. case 29: /* why? CS4235 - master right */
  212. break;
  213. default:
  214. snd_wss_out(chip, reg, chip->image[reg]);
  215. break;
  216. }
  217. }
  218. for (reg = 0; reg < 18; reg++)
  219. snd_cs4236_ext_out(chip, CS4236_I23VAL(reg), chip->eimage[reg]);
  220. for (reg = 2; reg < 9; reg++) {
  221. switch (reg) {
  222. case 7:
  223. break;
  224. default:
  225. snd_cs4236_ctrl_out(chip, reg, chip->cimage[reg]);
  226. }
  227. }
  228. spin_unlock_irqrestore(&chip->reg_lock, flags);
  229. snd_wss_mce_down(chip);
  230. }
  231. #endif /* CONFIG_PM */
  232. /*
  233. * This function does no fail if the chip is not CS4236B or compatible.
  234. * It just an equivalent to the snd_wss_create() then.
  235. */
  236. int snd_cs4236_create(struct snd_card *card,
  237. unsigned long port,
  238. unsigned long cport,
  239. int irq, int dma1, int dma2,
  240. unsigned short hardware,
  241. unsigned short hwshare,
  242. struct snd_wss **rchip)
  243. {
  244. struct snd_wss *chip;
  245. unsigned char ver1, ver2;
  246. unsigned int reg;
  247. int err;
  248. *rchip = NULL;
  249. if (hardware == WSS_HW_DETECT)
  250. hardware = WSS_HW_DETECT3;
  251. err = snd_wss_create(card, port, cport,
  252. irq, dma1, dma2, hardware, hwshare, &chip);
  253. if (err < 0)
  254. return err;
  255. if ((chip->hardware & WSS_HW_CS4236B_MASK) == 0) {
  256. snd_printd("chip is not CS4236+, hardware=0x%x\n",
  257. chip->hardware);
  258. *rchip = chip;
  259. return 0;
  260. }
  261. #if 0
  262. {
  263. int idx;
  264. for (idx = 0; idx < 8; idx++)
  265. snd_printk(KERN_DEBUG "CD%i = 0x%x\n",
  266. idx, inb(chip->cport + idx));
  267. for (idx = 0; idx < 9; idx++)
  268. snd_printk(KERN_DEBUG "C%i = 0x%x\n",
  269. idx, snd_cs4236_ctrl_in(chip, idx));
  270. }
  271. #endif
  272. if (cport < 0x100 || cport == SNDRV_AUTO_PORT) {
  273. snd_printk(KERN_ERR "please, specify control port "
  274. "for CS4236+ chips\n");
  275. return -ENODEV;
  276. }
  277. ver1 = snd_cs4236_ctrl_in(chip, 1);
  278. ver2 = snd_cs4236_ext_in(chip, CS4236_VERSION);
  279. snd_printdd("CS4236: [0x%lx] C1 (version) = 0x%x, ext = 0x%x\n",
  280. cport, ver1, ver2);
  281. if (ver1 != ver2) {
  282. snd_printk(KERN_ERR "CS4236+ chip detected, but "
  283. "control port 0x%lx is not valid\n", cport);
  284. return -ENODEV;
  285. }
  286. snd_cs4236_ctrl_out(chip, 0, 0x00);
  287. snd_cs4236_ctrl_out(chip, 2, 0xff);
  288. snd_cs4236_ctrl_out(chip, 3, 0x00);
  289. snd_cs4236_ctrl_out(chip, 4, 0x80);
  290. reg = ((IEC958_AES1_CON_PCM_CODER & 3) << 6) |
  291. IEC958_AES0_CON_EMPHASIS_NONE;
  292. snd_cs4236_ctrl_out(chip, 5, reg);
  293. snd_cs4236_ctrl_out(chip, 6, IEC958_AES1_CON_PCM_CODER >> 2);
  294. snd_cs4236_ctrl_out(chip, 7, 0x00);
  295. /*
  296. * 0x8c for C8 is valid for Turtle Beach Malibu - the IEC-958
  297. * output is working with this setup, other hardware should
  298. * have different signal paths and this value should be
  299. * selectable in the future
  300. */
  301. snd_cs4236_ctrl_out(chip, 8, 0x8c);
  302. chip->rate_constraint = snd_cs4236_xrate;
  303. chip->set_playback_format = snd_cs4236_playback_format;
  304. chip->set_capture_format = snd_cs4236_capture_format;
  305. #ifdef CONFIG_PM
  306. chip->suspend = snd_cs4236_suspend;
  307. chip->resume = snd_cs4236_resume;
  308. #endif
  309. /* initialize extended registers */
  310. for (reg = 0; reg < sizeof(snd_cs4236_ext_map); reg++)
  311. snd_cs4236_ext_out(chip, CS4236_I23VAL(reg),
  312. snd_cs4236_ext_map[reg]);
  313. /* initialize compatible but more featured registers */
  314. snd_wss_out(chip, CS4231_LEFT_INPUT, 0x40);
  315. snd_wss_out(chip, CS4231_RIGHT_INPUT, 0x40);
  316. snd_wss_out(chip, CS4231_AUX1_LEFT_INPUT, 0xff);
  317. snd_wss_out(chip, CS4231_AUX1_RIGHT_INPUT, 0xff);
  318. snd_wss_out(chip, CS4231_AUX2_LEFT_INPUT, 0xdf);
  319. snd_wss_out(chip, CS4231_AUX2_RIGHT_INPUT, 0xdf);
  320. snd_wss_out(chip, CS4231_RIGHT_LINE_IN, 0xff);
  321. snd_wss_out(chip, CS4231_LEFT_LINE_IN, 0xff);
  322. snd_wss_out(chip, CS4231_RIGHT_LINE_IN, 0xff);
  323. switch (chip->hardware) {
  324. case WSS_HW_CS4235:
  325. case WSS_HW_CS4239:
  326. snd_wss_out(chip, CS4235_LEFT_MASTER, 0xff);
  327. snd_wss_out(chip, CS4235_RIGHT_MASTER, 0xff);
  328. break;
  329. }
  330. *rchip = chip;
  331. return 0;
  332. }
  333. int snd_cs4236_pcm(struct snd_wss *chip, int device)
  334. {
  335. int err;
  336. err = snd_wss_pcm(chip, device);
  337. if (err < 0)
  338. return err;
  339. chip->pcm->info_flags &= ~SNDRV_PCM_INFO_JOINT_DUPLEX;
  340. return 0;
  341. }
  342. /*
  343. * MIXER
  344. */
  345. #define CS4236_SINGLE(xname, xindex, reg, shift, mask, invert) \
  346. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  347. .info = snd_cs4236_info_single, \
  348. .get = snd_cs4236_get_single, .put = snd_cs4236_put_single, \
  349. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  350. #define CS4236_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
  351. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  352. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  353. .info = snd_cs4236_info_single, \
  354. .get = snd_cs4236_get_single, .put = snd_cs4236_put_single, \
  355. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  356. .tlv = { .p = (xtlv) } }
  357. static int snd_cs4236_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  358. {
  359. int mask = (kcontrol->private_value >> 16) & 0xff;
  360. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  361. uinfo->count = 1;
  362. uinfo->value.integer.min = 0;
  363. uinfo->value.integer.max = mask;
  364. return 0;
  365. }
  366. static int snd_cs4236_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  367. {
  368. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  369. unsigned long flags;
  370. int reg = kcontrol->private_value & 0xff;
  371. int shift = (kcontrol->private_value >> 8) & 0xff;
  372. int mask = (kcontrol->private_value >> 16) & 0xff;
  373. int invert = (kcontrol->private_value >> 24) & 0xff;
  374. spin_lock_irqsave(&chip->reg_lock, flags);
  375. ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(reg)] >> shift) & mask;
  376. spin_unlock_irqrestore(&chip->reg_lock, flags);
  377. if (invert)
  378. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  379. return 0;
  380. }
  381. static int snd_cs4236_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  382. {
  383. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  384. unsigned long flags;
  385. int reg = kcontrol->private_value & 0xff;
  386. int shift = (kcontrol->private_value >> 8) & 0xff;
  387. int mask = (kcontrol->private_value >> 16) & 0xff;
  388. int invert = (kcontrol->private_value >> 24) & 0xff;
  389. int change;
  390. unsigned short val;
  391. val = (ucontrol->value.integer.value[0] & mask);
  392. if (invert)
  393. val = mask - val;
  394. val <<= shift;
  395. spin_lock_irqsave(&chip->reg_lock, flags);
  396. val = (chip->eimage[CS4236_REG(reg)] & ~(mask << shift)) | val;
  397. change = val != chip->eimage[CS4236_REG(reg)];
  398. snd_cs4236_ext_out(chip, reg, val);
  399. spin_unlock_irqrestore(&chip->reg_lock, flags);
  400. return change;
  401. }
  402. #define CS4236_SINGLEC(xname, xindex, reg, shift, mask, invert) \
  403. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  404. .info = snd_cs4236_info_single, \
  405. .get = snd_cs4236_get_singlec, .put = snd_cs4236_put_singlec, \
  406. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  407. static int snd_cs4236_get_singlec(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  408. {
  409. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  410. unsigned long flags;
  411. int reg = kcontrol->private_value & 0xff;
  412. int shift = (kcontrol->private_value >> 8) & 0xff;
  413. int mask = (kcontrol->private_value >> 16) & 0xff;
  414. int invert = (kcontrol->private_value >> 24) & 0xff;
  415. spin_lock_irqsave(&chip->reg_lock, flags);
  416. ucontrol->value.integer.value[0] = (chip->cimage[reg] >> shift) & mask;
  417. spin_unlock_irqrestore(&chip->reg_lock, flags);
  418. if (invert)
  419. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  420. return 0;
  421. }
  422. static int snd_cs4236_put_singlec(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  423. {
  424. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  425. unsigned long flags;
  426. int reg = kcontrol->private_value & 0xff;
  427. int shift = (kcontrol->private_value >> 8) & 0xff;
  428. int mask = (kcontrol->private_value >> 16) & 0xff;
  429. int invert = (kcontrol->private_value >> 24) & 0xff;
  430. int change;
  431. unsigned short val;
  432. val = (ucontrol->value.integer.value[0] & mask);
  433. if (invert)
  434. val = mask - val;
  435. val <<= shift;
  436. spin_lock_irqsave(&chip->reg_lock, flags);
  437. val = (chip->cimage[reg] & ~(mask << shift)) | val;
  438. change = val != chip->cimage[reg];
  439. snd_cs4236_ctrl_out(chip, reg, val);
  440. spin_unlock_irqrestore(&chip->reg_lock, flags);
  441. return change;
  442. }
  443. #define CS4236_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
  444. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  445. .info = snd_cs4236_info_double, \
  446. .get = snd_cs4236_get_double, .put = snd_cs4236_put_double, \
  447. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
  448. #define CS4236_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, \
  449. shift_right, mask, invert, xtlv) \
  450. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  451. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  452. .info = snd_cs4236_info_double, \
  453. .get = snd_cs4236_get_double, .put = snd_cs4236_put_double, \
  454. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
  455. (shift_right << 19) | (mask << 24) | (invert << 22), \
  456. .tlv = { .p = (xtlv) } }
  457. static int snd_cs4236_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  458. {
  459. int mask = (kcontrol->private_value >> 24) & 0xff;
  460. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  461. uinfo->count = 2;
  462. uinfo->value.integer.min = 0;
  463. uinfo->value.integer.max = mask;
  464. return 0;
  465. }
  466. static int snd_cs4236_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  467. {
  468. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  469. unsigned long flags;
  470. int left_reg = kcontrol->private_value & 0xff;
  471. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  472. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  473. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  474. int mask = (kcontrol->private_value >> 24) & 0xff;
  475. int invert = (kcontrol->private_value >> 22) & 1;
  476. spin_lock_irqsave(&chip->reg_lock, flags);
  477. ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(left_reg)] >> shift_left) & mask;
  478. ucontrol->value.integer.value[1] = (chip->eimage[CS4236_REG(right_reg)] >> shift_right) & mask;
  479. spin_unlock_irqrestore(&chip->reg_lock, flags);
  480. if (invert) {
  481. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  482. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  483. }
  484. return 0;
  485. }
  486. static int snd_cs4236_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  487. {
  488. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  489. unsigned long flags;
  490. int left_reg = kcontrol->private_value & 0xff;
  491. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  492. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  493. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  494. int mask = (kcontrol->private_value >> 24) & 0xff;
  495. int invert = (kcontrol->private_value >> 22) & 1;
  496. int change;
  497. unsigned short val1, val2;
  498. val1 = ucontrol->value.integer.value[0] & mask;
  499. val2 = ucontrol->value.integer.value[1] & mask;
  500. if (invert) {
  501. val1 = mask - val1;
  502. val2 = mask - val2;
  503. }
  504. val1 <<= shift_left;
  505. val2 <<= shift_right;
  506. spin_lock_irqsave(&chip->reg_lock, flags);
  507. if (left_reg != right_reg) {
  508. val1 = (chip->eimage[CS4236_REG(left_reg)] & ~(mask << shift_left)) | val1;
  509. val2 = (chip->eimage[CS4236_REG(right_reg)] & ~(mask << shift_right)) | val2;
  510. change = val1 != chip->eimage[CS4236_REG(left_reg)] || val2 != chip->eimage[CS4236_REG(right_reg)];
  511. snd_cs4236_ext_out(chip, left_reg, val1);
  512. snd_cs4236_ext_out(chip, right_reg, val2);
  513. } else {
  514. val1 = (chip->eimage[CS4236_REG(left_reg)] & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  515. change = val1 != chip->eimage[CS4236_REG(left_reg)];
  516. snd_cs4236_ext_out(chip, left_reg, val1);
  517. }
  518. spin_unlock_irqrestore(&chip->reg_lock, flags);
  519. return change;
  520. }
  521. #define CS4236_DOUBLE1(xname, xindex, left_reg, right_reg, shift_left, \
  522. shift_right, mask, invert) \
  523. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  524. .info = snd_cs4236_info_double, \
  525. .get = snd_cs4236_get_double1, .put = snd_cs4236_put_double1, \
  526. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
  527. #define CS4236_DOUBLE1_TLV(xname, xindex, left_reg, right_reg, shift_left, \
  528. shift_right, mask, invert, xtlv) \
  529. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  530. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  531. .info = snd_cs4236_info_double, \
  532. .get = snd_cs4236_get_double1, .put = snd_cs4236_put_double1, \
  533. .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | \
  534. (shift_right << 19) | (mask << 24) | (invert << 22), \
  535. .tlv = { .p = (xtlv) } }
  536. static int snd_cs4236_get_double1(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  537. {
  538. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  539. unsigned long flags;
  540. int left_reg = kcontrol->private_value & 0xff;
  541. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  542. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  543. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  544. int mask = (kcontrol->private_value >> 24) & 0xff;
  545. int invert = (kcontrol->private_value >> 22) & 1;
  546. spin_lock_irqsave(&chip->reg_lock, flags);
  547. ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
  548. ucontrol->value.integer.value[1] = (chip->eimage[CS4236_REG(right_reg)] >> shift_right) & mask;
  549. spin_unlock_irqrestore(&chip->reg_lock, flags);
  550. if (invert) {
  551. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  552. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  553. }
  554. return 0;
  555. }
  556. static int snd_cs4236_put_double1(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  557. {
  558. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  559. unsigned long flags;
  560. int left_reg = kcontrol->private_value & 0xff;
  561. int right_reg = (kcontrol->private_value >> 8) & 0xff;
  562. int shift_left = (kcontrol->private_value >> 16) & 0x07;
  563. int shift_right = (kcontrol->private_value >> 19) & 0x07;
  564. int mask = (kcontrol->private_value >> 24) & 0xff;
  565. int invert = (kcontrol->private_value >> 22) & 1;
  566. int change;
  567. unsigned short val1, val2;
  568. val1 = ucontrol->value.integer.value[0] & mask;
  569. val2 = ucontrol->value.integer.value[1] & mask;
  570. if (invert) {
  571. val1 = mask - val1;
  572. val2 = mask - val2;
  573. }
  574. val1 <<= shift_left;
  575. val2 <<= shift_right;
  576. spin_lock_irqsave(&chip->reg_lock, flags);
  577. val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
  578. val2 = (chip->eimage[CS4236_REG(right_reg)] & ~(mask << shift_right)) | val2;
  579. change = val1 != chip->image[left_reg] || val2 != chip->eimage[CS4236_REG(right_reg)];
  580. snd_wss_out(chip, left_reg, val1);
  581. snd_cs4236_ext_out(chip, right_reg, val2);
  582. spin_unlock_irqrestore(&chip->reg_lock, flags);
  583. return change;
  584. }
  585. #define CS4236_MASTER_DIGITAL(xname, xindex, xtlv) \
  586. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  587. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  588. .info = snd_cs4236_info_double, \
  589. .get = snd_cs4236_get_master_digital, .put = snd_cs4236_put_master_digital, \
  590. .private_value = 71 << 24, \
  591. .tlv = { .p = (xtlv) } }
  592. static inline int snd_cs4236_mixer_master_digital_invert_volume(int vol)
  593. {
  594. return (vol < 64) ? 63 - vol : 64 + (71 - vol);
  595. }
  596. static int snd_cs4236_get_master_digital(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  597. {
  598. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  599. unsigned long flags;
  600. spin_lock_irqsave(&chip->reg_lock, flags);
  601. ucontrol->value.integer.value[0] = snd_cs4236_mixer_master_digital_invert_volume(chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] & 0x7f);
  602. ucontrol->value.integer.value[1] = snd_cs4236_mixer_master_digital_invert_volume(chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)] & 0x7f);
  603. spin_unlock_irqrestore(&chip->reg_lock, flags);
  604. return 0;
  605. }
  606. static int snd_cs4236_put_master_digital(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  607. {
  608. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  609. unsigned long flags;
  610. int change;
  611. unsigned short val1, val2;
  612. val1 = snd_cs4236_mixer_master_digital_invert_volume(ucontrol->value.integer.value[0] & 0x7f);
  613. val2 = snd_cs4236_mixer_master_digital_invert_volume(ucontrol->value.integer.value[1] & 0x7f);
  614. spin_lock_irqsave(&chip->reg_lock, flags);
  615. val1 = (chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] & ~0x7f) | val1;
  616. val2 = (chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)] & ~0x7f) | val2;
  617. change = val1 != chip->eimage[CS4236_REG(CS4236_LEFT_MASTER)] || val2 != chip->eimage[CS4236_REG(CS4236_RIGHT_MASTER)];
  618. snd_cs4236_ext_out(chip, CS4236_LEFT_MASTER, val1);
  619. snd_cs4236_ext_out(chip, CS4236_RIGHT_MASTER, val2);
  620. spin_unlock_irqrestore(&chip->reg_lock, flags);
  621. return change;
  622. }
  623. #define CS4235_OUTPUT_ACCU(xname, xindex, xtlv) \
  624. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  625. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  626. .info = snd_cs4236_info_double, \
  627. .get = snd_cs4235_get_output_accu, .put = snd_cs4235_put_output_accu, \
  628. .private_value = 3 << 24, \
  629. .tlv = { .p = (xtlv) } }
  630. static inline int snd_cs4235_mixer_output_accu_get_volume(int vol)
  631. {
  632. switch ((vol >> 5) & 3) {
  633. case 0: return 1;
  634. case 1: return 3;
  635. case 2: return 2;
  636. case 3: return 0;
  637. }
  638. return 3;
  639. }
  640. static inline int snd_cs4235_mixer_output_accu_set_volume(int vol)
  641. {
  642. switch (vol & 3) {
  643. case 0: return 3 << 5;
  644. case 1: return 0 << 5;
  645. case 2: return 2 << 5;
  646. case 3: return 1 << 5;
  647. }
  648. return 1 << 5;
  649. }
  650. static int snd_cs4235_get_output_accu(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  651. {
  652. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  653. unsigned long flags;
  654. spin_lock_irqsave(&chip->reg_lock, flags);
  655. ucontrol->value.integer.value[0] = snd_cs4235_mixer_output_accu_get_volume(chip->image[CS4235_LEFT_MASTER]);
  656. ucontrol->value.integer.value[1] = snd_cs4235_mixer_output_accu_get_volume(chip->image[CS4235_RIGHT_MASTER]);
  657. spin_unlock_irqrestore(&chip->reg_lock, flags);
  658. return 0;
  659. }
  660. static int snd_cs4235_put_output_accu(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  661. {
  662. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  663. unsigned long flags;
  664. int change;
  665. unsigned short val1, val2;
  666. val1 = snd_cs4235_mixer_output_accu_set_volume(ucontrol->value.integer.value[0]);
  667. val2 = snd_cs4235_mixer_output_accu_set_volume(ucontrol->value.integer.value[1]);
  668. spin_lock_irqsave(&chip->reg_lock, flags);
  669. val1 = (chip->image[CS4235_LEFT_MASTER] & ~(3 << 5)) | val1;
  670. val2 = (chip->image[CS4235_RIGHT_MASTER] & ~(3 << 5)) | val2;
  671. change = val1 != chip->image[CS4235_LEFT_MASTER] || val2 != chip->image[CS4235_RIGHT_MASTER];
  672. snd_wss_out(chip, CS4235_LEFT_MASTER, val1);
  673. snd_wss_out(chip, CS4235_RIGHT_MASTER, val2);
  674. spin_unlock_irqrestore(&chip->reg_lock, flags);
  675. return change;
  676. }
  677. static const DECLARE_TLV_DB_SCALE(db_scale_7bit, -9450, 150, 0);
  678. static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
  679. static const DECLARE_TLV_DB_SCALE(db_scale_6bit_12db_max, -8250, 150, 0);
  680. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
  681. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_22db_max, -2400, 150, 0);
  682. static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
  683. static const DECLARE_TLV_DB_SCALE(db_scale_2bit, -1800, 600, 0);
  684. static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
  685. static const struct snd_kcontrol_new snd_cs4236_controls[] = {
  686. CS4236_DOUBLE("Master Digital Playback Switch", 0,
  687. CS4236_LEFT_MASTER, CS4236_RIGHT_MASTER, 7, 7, 1, 1),
  688. CS4236_DOUBLE("Master Digital Capture Switch", 0,
  689. CS4236_DAC_MUTE, CS4236_DAC_MUTE, 7, 6, 1, 1),
  690. CS4236_MASTER_DIGITAL("Master Digital Volume", 0, db_scale_7bit),
  691. CS4236_DOUBLE_TLV("Capture Boost Volume", 0,
  692. CS4236_LEFT_MIX_CTRL, CS4236_RIGHT_MIX_CTRL, 5, 5, 3, 1,
  693. db_scale_2bit),
  694. WSS_DOUBLE("PCM Playback Switch", 0,
  695. CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
  696. WSS_DOUBLE_TLV("PCM Playback Volume", 0,
  697. CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1,
  698. db_scale_6bit),
  699. CS4236_DOUBLE("DSP Playback Switch", 0,
  700. CS4236_LEFT_DSP, CS4236_RIGHT_DSP, 7, 7, 1, 1),
  701. CS4236_DOUBLE_TLV("DSP Playback Volume", 0,
  702. CS4236_LEFT_DSP, CS4236_RIGHT_DSP, 0, 0, 63, 1,
  703. db_scale_6bit),
  704. CS4236_DOUBLE("FM Playback Switch", 0,
  705. CS4236_LEFT_FM, CS4236_RIGHT_FM, 7, 7, 1, 1),
  706. CS4236_DOUBLE_TLV("FM Playback Volume", 0,
  707. CS4236_LEFT_FM, CS4236_RIGHT_FM, 0, 0, 63, 1,
  708. db_scale_6bit),
  709. CS4236_DOUBLE("Wavetable Playback Switch", 0,
  710. CS4236_LEFT_WAVE, CS4236_RIGHT_WAVE, 7, 7, 1, 1),
  711. CS4236_DOUBLE_TLV("Wavetable Playback Volume", 0,
  712. CS4236_LEFT_WAVE, CS4236_RIGHT_WAVE, 0, 0, 63, 1,
  713. db_scale_6bit_12db_max),
  714. WSS_DOUBLE("Synth Playback Switch", 0,
  715. CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
  716. WSS_DOUBLE_TLV("Synth Volume", 0,
  717. CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1,
  718. db_scale_5bit_12db_max),
  719. WSS_DOUBLE("Synth Capture Switch", 0,
  720. CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 6, 6, 1, 1),
  721. WSS_DOUBLE("Synth Capture Bypass", 0,
  722. CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 5, 5, 1, 1),
  723. CS4236_DOUBLE("Mic Playback Switch", 0,
  724. CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 6, 6, 1, 1),
  725. CS4236_DOUBLE("Mic Capture Switch", 0,
  726. CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 7, 7, 1, 1),
  727. CS4236_DOUBLE_TLV("Mic Volume", 0, CS4236_LEFT_MIC, CS4236_RIGHT_MIC,
  728. 0, 0, 31, 1, db_scale_5bit_22db_max),
  729. CS4236_DOUBLE("Mic Playback Boost (+20dB)", 0,
  730. CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 5, 5, 1, 0),
  731. WSS_DOUBLE("Line Playback Switch", 0,
  732. CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  733. WSS_DOUBLE_TLV("Line Volume", 0,
  734. CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
  735. db_scale_5bit_12db_max),
  736. WSS_DOUBLE("Line Capture Switch", 0,
  737. CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 6, 6, 1, 1),
  738. WSS_DOUBLE("Line Capture Bypass", 0,
  739. CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 5, 5, 1, 1),
  740. WSS_DOUBLE("CD Playback Switch", 0,
  741. CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  742. WSS_DOUBLE_TLV("CD Volume", 0,
  743. CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
  744. db_scale_5bit_12db_max),
  745. WSS_DOUBLE("CD Capture Switch", 0,
  746. CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 6, 6, 1, 1),
  747. CS4236_DOUBLE1("Mono Output Playback Switch", 0,
  748. CS4231_MONO_CTRL, CS4236_RIGHT_MIX_CTRL, 6, 7, 1, 1),
  749. CS4236_DOUBLE1("Beep Playback Switch", 0,
  750. CS4231_MONO_CTRL, CS4236_LEFT_MIX_CTRL, 7, 7, 1, 1),
  751. WSS_SINGLE_TLV("Beep Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1,
  752. db_scale_4bit),
  753. WSS_SINGLE("Beep Bypass Playback Switch", 0, CS4231_MONO_CTRL, 5, 1, 0),
  754. WSS_DOUBLE_TLV("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT,
  755. 0, 0, 15, 0, db_scale_rec_gain),
  756. WSS_DOUBLE("Analog Loopback Capture Switch", 0,
  757. CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 7, 7, 1, 0),
  758. WSS_SINGLE("Loopback Digital Playback Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
  759. CS4236_DOUBLE1_TLV("Loopback Digital Playback Volume", 0,
  760. CS4231_LOOPBACK, CS4236_RIGHT_LOOPBACK, 2, 0, 63, 1,
  761. db_scale_6bit),
  762. };
  763. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_6db_max, -5600, 200, 0);
  764. static const DECLARE_TLV_DB_SCALE(db_scale_2bit_16db_max, -2400, 800, 0);
  765. static const struct snd_kcontrol_new snd_cs4235_controls[] = {
  766. WSS_DOUBLE("Master Playback Switch", 0,
  767. CS4235_LEFT_MASTER, CS4235_RIGHT_MASTER, 7, 7, 1, 1),
  768. WSS_DOUBLE_TLV("Master Playback Volume", 0,
  769. CS4235_LEFT_MASTER, CS4235_RIGHT_MASTER, 0, 0, 31, 1,
  770. db_scale_5bit_6db_max),
  771. CS4235_OUTPUT_ACCU("Playback Volume", 0, db_scale_2bit_16db_max),
  772. WSS_DOUBLE("Synth Playback Switch", 1,
  773. CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
  774. WSS_DOUBLE("Synth Capture Switch", 1,
  775. CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 6, 6, 1, 1),
  776. WSS_DOUBLE_TLV("Synth Volume", 1,
  777. CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1,
  778. db_scale_5bit_12db_max),
  779. CS4236_DOUBLE_TLV("Capture Volume", 0,
  780. CS4236_LEFT_MIX_CTRL, CS4236_RIGHT_MIX_CTRL, 5, 5, 3, 1,
  781. db_scale_2bit),
  782. WSS_DOUBLE("PCM Playback Switch", 0,
  783. CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
  784. WSS_DOUBLE("PCM Capture Switch", 0,
  785. CS4236_DAC_MUTE, CS4236_DAC_MUTE, 7, 6, 1, 1),
  786. WSS_DOUBLE_TLV("PCM Volume", 0,
  787. CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1,
  788. db_scale_6bit),
  789. CS4236_DOUBLE("DSP Switch", 0, CS4236_LEFT_DSP, CS4236_RIGHT_DSP, 7, 7, 1, 1),
  790. CS4236_DOUBLE("FM Switch", 0, CS4236_LEFT_FM, CS4236_RIGHT_FM, 7, 7, 1, 1),
  791. CS4236_DOUBLE("Wavetable Switch", 0,
  792. CS4236_LEFT_WAVE, CS4236_RIGHT_WAVE, 7, 7, 1, 1),
  793. CS4236_DOUBLE("Mic Capture Switch", 0,
  794. CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 7, 7, 1, 1),
  795. CS4236_DOUBLE("Mic Playback Switch", 0,
  796. CS4236_LEFT_MIC, CS4236_RIGHT_MIC, 6, 6, 1, 1),
  797. CS4236_SINGLE_TLV("Mic Volume", 0, CS4236_LEFT_MIC, 0, 31, 1,
  798. db_scale_5bit_22db_max),
  799. CS4236_SINGLE("Mic Boost (+20dB)", 0, CS4236_LEFT_MIC, 5, 1, 0),
  800. WSS_DOUBLE("Line Playback Switch", 0,
  801. CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
  802. WSS_DOUBLE("Line Capture Switch", 0,
  803. CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 6, 6, 1, 1),
  804. WSS_DOUBLE_TLV("Line Volume", 0,
  805. CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1,
  806. db_scale_5bit_12db_max),
  807. WSS_DOUBLE("CD Playback Switch", 1,
  808. CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
  809. WSS_DOUBLE("CD Capture Switch", 1,
  810. CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 6, 6, 1, 1),
  811. WSS_DOUBLE_TLV("CD Volume", 1,
  812. CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1,
  813. db_scale_5bit_12db_max),
  814. CS4236_DOUBLE1("Beep Playback Switch", 0,
  815. CS4231_MONO_CTRL, CS4236_LEFT_MIX_CTRL, 7, 7, 1, 1),
  816. WSS_SINGLE("Beep Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
  817. WSS_DOUBLE("Analog Loopback Switch", 0,
  818. CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 7, 7, 1, 0),
  819. };
  820. #define CS4236_IEC958_ENABLE(xname, xindex) \
  821. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  822. .info = snd_cs4236_info_single, \
  823. .get = snd_cs4236_get_iec958_switch, .put = snd_cs4236_put_iec958_switch, \
  824. .private_value = 1 << 16 }
  825. static int snd_cs4236_get_iec958_switch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  826. {
  827. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  828. unsigned long flags;
  829. spin_lock_irqsave(&chip->reg_lock, flags);
  830. ucontrol->value.integer.value[0] = chip->image[CS4231_ALT_FEATURE_1] & 0x02 ? 1 : 0;
  831. #if 0
  832. printk(KERN_DEBUG "get valid: ALT = 0x%x, C3 = 0x%x, C4 = 0x%x, "
  833. "C5 = 0x%x, C6 = 0x%x, C8 = 0x%x\n",
  834. snd_wss_in(chip, CS4231_ALT_FEATURE_1),
  835. snd_cs4236_ctrl_in(chip, 3),
  836. snd_cs4236_ctrl_in(chip, 4),
  837. snd_cs4236_ctrl_in(chip, 5),
  838. snd_cs4236_ctrl_in(chip, 6),
  839. snd_cs4236_ctrl_in(chip, 8));
  840. #endif
  841. spin_unlock_irqrestore(&chip->reg_lock, flags);
  842. return 0;
  843. }
  844. static int snd_cs4236_put_iec958_switch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  845. {
  846. struct snd_wss *chip = snd_kcontrol_chip(kcontrol);
  847. unsigned long flags;
  848. int change;
  849. unsigned short enable, val;
  850. enable = ucontrol->value.integer.value[0] & 1;
  851. mutex_lock(&chip->mce_mutex);
  852. snd_wss_mce_up(chip);
  853. spin_lock_irqsave(&chip->reg_lock, flags);
  854. val = (chip->image[CS4231_ALT_FEATURE_1] & ~0x0e) | (0<<2) | (enable << 1);
  855. change = val != chip->image[CS4231_ALT_FEATURE_1];
  856. snd_wss_out(chip, CS4231_ALT_FEATURE_1, val);
  857. val = snd_cs4236_ctrl_in(chip, 4) | 0xc0;
  858. snd_cs4236_ctrl_out(chip, 4, val);
  859. udelay(100);
  860. val &= ~0x40;
  861. snd_cs4236_ctrl_out(chip, 4, val);
  862. spin_unlock_irqrestore(&chip->reg_lock, flags);
  863. snd_wss_mce_down(chip);
  864. mutex_unlock(&chip->mce_mutex);
  865. #if 0
  866. printk(KERN_DEBUG "set valid: ALT = 0x%x, C3 = 0x%x, C4 = 0x%x, "
  867. "C5 = 0x%x, C6 = 0x%x, C8 = 0x%x\n",
  868. snd_wss_in(chip, CS4231_ALT_FEATURE_1),
  869. snd_cs4236_ctrl_in(chip, 3),
  870. snd_cs4236_ctrl_in(chip, 4),
  871. snd_cs4236_ctrl_in(chip, 5),
  872. snd_cs4236_ctrl_in(chip, 6),
  873. snd_cs4236_ctrl_in(chip, 8));
  874. #endif
  875. return change;
  876. }
  877. static const struct snd_kcontrol_new snd_cs4236_iec958_controls[] = {
  878. CS4236_IEC958_ENABLE("IEC958 Output Enable", 0),
  879. CS4236_SINGLEC("IEC958 Output Validity", 0, 4, 4, 1, 0),
  880. CS4236_SINGLEC("IEC958 Output User", 0, 4, 5, 1, 0),
  881. CS4236_SINGLEC("IEC958 Output CSBR", 0, 4, 6, 1, 0),
  882. CS4236_SINGLEC("IEC958 Output Channel Status Low", 0, 5, 1, 127, 0),
  883. CS4236_SINGLEC("IEC958 Output Channel Status High", 0, 6, 0, 255, 0)
  884. };
  885. static const struct snd_kcontrol_new snd_cs4236_3d_controls_cs4235[] = {
  886. CS4236_SINGLEC("3D Control - Switch", 0, 3, 4, 1, 0),
  887. CS4236_SINGLEC("3D Control - Space", 0, 2, 4, 15, 1)
  888. };
  889. static const struct snd_kcontrol_new snd_cs4236_3d_controls_cs4237[] = {
  890. CS4236_SINGLEC("3D Control - Switch", 0, 3, 7, 1, 0),
  891. CS4236_SINGLEC("3D Control - Space", 0, 2, 4, 15, 1),
  892. CS4236_SINGLEC("3D Control - Center", 0, 2, 0, 15, 1),
  893. CS4236_SINGLEC("3D Control - Mono", 0, 3, 6, 1, 0),
  894. CS4236_SINGLEC("3D Control - IEC958", 0, 3, 5, 1, 0)
  895. };
  896. static const struct snd_kcontrol_new snd_cs4236_3d_controls_cs4238[] = {
  897. CS4236_SINGLEC("3D Control - Switch", 0, 3, 4, 1, 0),
  898. CS4236_SINGLEC("3D Control - Space", 0, 2, 4, 15, 1),
  899. CS4236_SINGLEC("3D Control - Volume", 0, 2, 0, 15, 1),
  900. CS4236_SINGLEC("3D Control - IEC958", 0, 3, 5, 1, 0)
  901. };
  902. int snd_cs4236_mixer(struct snd_wss *chip)
  903. {
  904. struct snd_card *card;
  905. unsigned int idx, count;
  906. int err;
  907. const struct snd_kcontrol_new *kcontrol;
  908. if (snd_BUG_ON(!chip || !chip->card))
  909. return -EINVAL;
  910. card = chip->card;
  911. strcpy(card->mixername, snd_wss_chip_id(chip));
  912. if (chip->hardware == WSS_HW_CS4235 ||
  913. chip->hardware == WSS_HW_CS4239) {
  914. for (idx = 0; idx < ARRAY_SIZE(snd_cs4235_controls); idx++) {
  915. err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4235_controls[idx], chip));
  916. if (err < 0)
  917. return err;
  918. }
  919. } else {
  920. for (idx = 0; idx < ARRAY_SIZE(snd_cs4236_controls); idx++) {
  921. err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4236_controls[idx], chip));
  922. if (err < 0)
  923. return err;
  924. }
  925. }
  926. switch (chip->hardware) {
  927. case WSS_HW_CS4235:
  928. case WSS_HW_CS4239:
  929. count = ARRAY_SIZE(snd_cs4236_3d_controls_cs4235);
  930. kcontrol = snd_cs4236_3d_controls_cs4235;
  931. break;
  932. case WSS_HW_CS4237B:
  933. count = ARRAY_SIZE(snd_cs4236_3d_controls_cs4237);
  934. kcontrol = snd_cs4236_3d_controls_cs4237;
  935. break;
  936. case WSS_HW_CS4238B:
  937. count = ARRAY_SIZE(snd_cs4236_3d_controls_cs4238);
  938. kcontrol = snd_cs4236_3d_controls_cs4238;
  939. break;
  940. default:
  941. count = 0;
  942. kcontrol = NULL;
  943. }
  944. for (idx = 0; idx < count; idx++, kcontrol++) {
  945. err = snd_ctl_add(card, snd_ctl_new1(kcontrol, chip));
  946. if (err < 0)
  947. return err;
  948. }
  949. if (chip->hardware == WSS_HW_CS4237B ||
  950. chip->hardware == WSS_HW_CS4238B) {
  951. for (idx = 0; idx < ARRAY_SIZE(snd_cs4236_iec958_controls); idx++) {
  952. err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4236_iec958_controls[idx], chip));
  953. if (err < 0)
  954. return err;
  955. }
  956. }
  957. return 0;
  958. }