ad1816a_lib.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
  4. Copyright (C) 1999-2000 by Massimo Piccioni <[email protected]>
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/init.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/slab.h>
  10. #include <linux/ioport.h>
  11. #include <linux/io.h>
  12. #include <sound/core.h>
  13. #include <sound/tlv.h>
  14. #include <sound/ad1816a.h>
  15. #include <asm/dma.h>
  16. static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
  17. {
  18. int timeout;
  19. for (timeout = 1000; timeout-- > 0; udelay(10))
  20. if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
  21. return 0;
  22. snd_printk(KERN_WARNING "chip busy.\n");
  23. return -EBUSY;
  24. }
  25. static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
  26. {
  27. snd_ad1816a_busy_wait(chip);
  28. return inb(AD1816A_REG(reg));
  29. }
  30. static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
  31. unsigned char value)
  32. {
  33. snd_ad1816a_busy_wait(chip);
  34. outb(value, AD1816A_REG(reg));
  35. }
  36. static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
  37. unsigned char mask, unsigned char value)
  38. {
  39. snd_ad1816a_out(chip, reg,
  40. (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
  41. }
  42. static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
  43. {
  44. snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  45. return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
  46. (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
  47. }
  48. static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
  49. unsigned short value)
  50. {
  51. snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  52. snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
  53. snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
  54. }
  55. static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
  56. unsigned short mask, unsigned short value)
  57. {
  58. snd_ad1816a_write(chip, reg,
  59. (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
  60. }
  61. static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
  62. snd_pcm_format_t format,
  63. int channels)
  64. {
  65. unsigned char retval = AD1816A_FMT_LINEAR_8;
  66. switch (format) {
  67. case SNDRV_PCM_FORMAT_MU_LAW:
  68. retval = AD1816A_FMT_ULAW_8;
  69. break;
  70. case SNDRV_PCM_FORMAT_A_LAW:
  71. retval = AD1816A_FMT_ALAW_8;
  72. break;
  73. case SNDRV_PCM_FORMAT_S16_LE:
  74. retval = AD1816A_FMT_LINEAR_16_LIT;
  75. break;
  76. case SNDRV_PCM_FORMAT_S16_BE:
  77. retval = AD1816A_FMT_LINEAR_16_BIG;
  78. }
  79. return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
  80. }
  81. static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
  82. {
  83. unsigned long flags;
  84. spin_lock_irqsave(&chip->lock, flags);
  85. if (chip->mode & mode) {
  86. spin_unlock_irqrestore(&chip->lock, flags);
  87. return -EAGAIN;
  88. }
  89. switch ((mode &= AD1816A_MODE_OPEN)) {
  90. case AD1816A_MODE_PLAYBACK:
  91. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  92. AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
  93. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  94. AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
  95. break;
  96. case AD1816A_MODE_CAPTURE:
  97. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  98. AD1816A_CAPTURE_IRQ_PENDING, 0x00);
  99. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  100. AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
  101. break;
  102. case AD1816A_MODE_TIMER:
  103. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  104. AD1816A_TIMER_IRQ_PENDING, 0x00);
  105. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  106. AD1816A_TIMER_IRQ_ENABLE, 0xffff);
  107. }
  108. chip->mode |= mode;
  109. spin_unlock_irqrestore(&chip->lock, flags);
  110. return 0;
  111. }
  112. static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
  113. {
  114. unsigned long flags;
  115. spin_lock_irqsave(&chip->lock, flags);
  116. switch ((mode &= AD1816A_MODE_OPEN)) {
  117. case AD1816A_MODE_PLAYBACK:
  118. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  119. AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
  120. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  121. AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
  122. break;
  123. case AD1816A_MODE_CAPTURE:
  124. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  125. AD1816A_CAPTURE_IRQ_PENDING, 0x00);
  126. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  127. AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
  128. break;
  129. case AD1816A_MODE_TIMER:
  130. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  131. AD1816A_TIMER_IRQ_PENDING, 0x00);
  132. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  133. AD1816A_TIMER_IRQ_ENABLE, 0x0000);
  134. }
  135. chip->mode &= ~mode;
  136. if (!(chip->mode & AD1816A_MODE_OPEN))
  137. chip->mode = 0;
  138. spin_unlock_irqrestore(&chip->lock, flags);
  139. }
  140. static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
  141. int channel, int cmd, int iscapture)
  142. {
  143. int error = 0;
  144. switch (cmd) {
  145. case SNDRV_PCM_TRIGGER_START:
  146. case SNDRV_PCM_TRIGGER_STOP:
  147. spin_lock(&chip->lock);
  148. cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
  149. /* if (what & AD1816A_PLAYBACK_ENABLE) */
  150. /* That is not valid, because playback and capture enable
  151. * are the same bit pattern, just to different addresses
  152. */
  153. if (! iscapture)
  154. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  155. AD1816A_PLAYBACK_ENABLE, cmd);
  156. else
  157. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  158. AD1816A_CAPTURE_ENABLE, cmd);
  159. spin_unlock(&chip->lock);
  160. break;
  161. default:
  162. snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what);
  163. error = -EINVAL;
  164. }
  165. return error;
  166. }
  167. static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  168. {
  169. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  170. return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
  171. SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
  172. }
  173. static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  174. {
  175. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  176. return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
  177. SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
  178. }
  179. static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
  180. {
  181. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  182. unsigned long flags;
  183. struct snd_pcm_runtime *runtime = substream->runtime;
  184. unsigned int size, rate;
  185. spin_lock_irqsave(&chip->lock, flags);
  186. chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
  187. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  188. AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
  189. snd_dma_program(chip->dma1, runtime->dma_addr, size,
  190. DMA_MODE_WRITE | DMA_AUTOINIT);
  191. rate = runtime->rate;
  192. if (chip->clock_freq)
  193. rate = (rate * 33000) / chip->clock_freq;
  194. snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
  195. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  196. AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
  197. snd_ad1816a_get_format(chip, runtime->format,
  198. runtime->channels));
  199. snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
  200. snd_pcm_lib_period_bytes(substream) / 4 - 1);
  201. spin_unlock_irqrestore(&chip->lock, flags);
  202. return 0;
  203. }
  204. static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
  205. {
  206. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  207. unsigned long flags;
  208. struct snd_pcm_runtime *runtime = substream->runtime;
  209. unsigned int size, rate;
  210. spin_lock_irqsave(&chip->lock, flags);
  211. chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
  212. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  213. AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
  214. snd_dma_program(chip->dma2, runtime->dma_addr, size,
  215. DMA_MODE_READ | DMA_AUTOINIT);
  216. rate = runtime->rate;
  217. if (chip->clock_freq)
  218. rate = (rate * 33000) / chip->clock_freq;
  219. snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
  220. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  221. AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
  222. snd_ad1816a_get_format(chip, runtime->format,
  223. runtime->channels));
  224. snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
  225. snd_pcm_lib_period_bytes(substream) / 4 - 1);
  226. spin_unlock_irqrestore(&chip->lock, flags);
  227. return 0;
  228. }
  229. static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
  230. {
  231. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  232. size_t ptr;
  233. if (!(chip->mode & AD1816A_MODE_PLAYBACK))
  234. return 0;
  235. ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
  236. return bytes_to_frames(substream->runtime, ptr);
  237. }
  238. static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
  239. {
  240. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  241. size_t ptr;
  242. if (!(chip->mode & AD1816A_MODE_CAPTURE))
  243. return 0;
  244. ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
  245. return bytes_to_frames(substream->runtime, ptr);
  246. }
  247. static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
  248. {
  249. struct snd_ad1816a *chip = dev_id;
  250. unsigned char status;
  251. spin_lock(&chip->lock);
  252. status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
  253. spin_unlock(&chip->lock);
  254. if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
  255. snd_pcm_period_elapsed(chip->playback_substream);
  256. if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
  257. snd_pcm_period_elapsed(chip->capture_substream);
  258. if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
  259. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  260. spin_lock(&chip->lock);
  261. snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
  262. spin_unlock(&chip->lock);
  263. return IRQ_HANDLED;
  264. }
  265. static const struct snd_pcm_hardware snd_ad1816a_playback = {
  266. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  267. SNDRV_PCM_INFO_MMAP_VALID),
  268. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  269. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  270. SNDRV_PCM_FMTBIT_S16_BE),
  271. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  272. .rate_min = 4000,
  273. .rate_max = 55200,
  274. .channels_min = 1,
  275. .channels_max = 2,
  276. .buffer_bytes_max = (128*1024),
  277. .period_bytes_min = 64,
  278. .period_bytes_max = (128*1024),
  279. .periods_min = 1,
  280. .periods_max = 1024,
  281. .fifo_size = 0,
  282. };
  283. static const struct snd_pcm_hardware snd_ad1816a_capture = {
  284. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  285. SNDRV_PCM_INFO_MMAP_VALID),
  286. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  287. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  288. SNDRV_PCM_FMTBIT_S16_BE),
  289. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  290. .rate_min = 4000,
  291. .rate_max = 55200,
  292. .channels_min = 1,
  293. .channels_max = 2,
  294. .buffer_bytes_max = (128*1024),
  295. .period_bytes_min = 64,
  296. .period_bytes_max = (128*1024),
  297. .periods_min = 1,
  298. .periods_max = 1024,
  299. .fifo_size = 0,
  300. };
  301. static int snd_ad1816a_timer_close(struct snd_timer *timer)
  302. {
  303. struct snd_ad1816a *chip = snd_timer_chip(timer);
  304. snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
  305. return 0;
  306. }
  307. static int snd_ad1816a_timer_open(struct snd_timer *timer)
  308. {
  309. struct snd_ad1816a *chip = snd_timer_chip(timer);
  310. snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
  311. return 0;
  312. }
  313. static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
  314. {
  315. if (snd_BUG_ON(!timer))
  316. return 0;
  317. return 10000;
  318. }
  319. static int snd_ad1816a_timer_start(struct snd_timer *timer)
  320. {
  321. unsigned short bits;
  322. unsigned long flags;
  323. struct snd_ad1816a *chip = snd_timer_chip(timer);
  324. spin_lock_irqsave(&chip->lock, flags);
  325. bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
  326. if (!(bits & AD1816A_TIMER_ENABLE)) {
  327. snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
  328. timer->sticks & 0xffff);
  329. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  330. AD1816A_TIMER_ENABLE, 0xffff);
  331. }
  332. spin_unlock_irqrestore(&chip->lock, flags);
  333. return 0;
  334. }
  335. static int snd_ad1816a_timer_stop(struct snd_timer *timer)
  336. {
  337. unsigned long flags;
  338. struct snd_ad1816a *chip = snd_timer_chip(timer);
  339. spin_lock_irqsave(&chip->lock, flags);
  340. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  341. AD1816A_TIMER_ENABLE, 0x0000);
  342. spin_unlock_irqrestore(&chip->lock, flags);
  343. return 0;
  344. }
  345. static const struct snd_timer_hardware snd_ad1816a_timer_table = {
  346. .flags = SNDRV_TIMER_HW_AUTO,
  347. .resolution = 10000,
  348. .ticks = 65535,
  349. .open = snd_ad1816a_timer_open,
  350. .close = snd_ad1816a_timer_close,
  351. .c_resolution = snd_ad1816a_timer_resolution,
  352. .start = snd_ad1816a_timer_start,
  353. .stop = snd_ad1816a_timer_stop,
  354. };
  355. static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
  356. {
  357. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  358. struct snd_pcm_runtime *runtime = substream->runtime;
  359. int error;
  360. error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK);
  361. if (error < 0)
  362. return error;
  363. runtime->hw = snd_ad1816a_playback;
  364. snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
  365. snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
  366. chip->playback_substream = substream;
  367. return 0;
  368. }
  369. static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
  370. {
  371. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  372. struct snd_pcm_runtime *runtime = substream->runtime;
  373. int error;
  374. error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE);
  375. if (error < 0)
  376. return error;
  377. runtime->hw = snd_ad1816a_capture;
  378. snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
  379. snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
  380. chip->capture_substream = substream;
  381. return 0;
  382. }
  383. static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
  384. {
  385. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  386. chip->playback_substream = NULL;
  387. snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
  388. return 0;
  389. }
  390. static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
  391. {
  392. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  393. chip->capture_substream = NULL;
  394. snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
  395. return 0;
  396. }
  397. static void snd_ad1816a_init(struct snd_ad1816a *chip)
  398. {
  399. unsigned long flags;
  400. spin_lock_irqsave(&chip->lock, flags);
  401. snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
  402. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  403. AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
  404. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  405. AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
  406. snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
  407. snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
  408. AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
  409. snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
  410. snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
  411. spin_unlock_irqrestore(&chip->lock, flags);
  412. }
  413. #ifdef CONFIG_PM
  414. void snd_ad1816a_suspend(struct snd_ad1816a *chip)
  415. {
  416. int reg;
  417. unsigned long flags;
  418. spin_lock_irqsave(&chip->lock, flags);
  419. for (reg = 0; reg < 48; reg++)
  420. chip->image[reg] = snd_ad1816a_read(chip, reg);
  421. spin_unlock_irqrestore(&chip->lock, flags);
  422. }
  423. void snd_ad1816a_resume(struct snd_ad1816a *chip)
  424. {
  425. int reg;
  426. unsigned long flags;
  427. snd_ad1816a_init(chip);
  428. spin_lock_irqsave(&chip->lock, flags);
  429. for (reg = 0; reg < 48; reg++)
  430. snd_ad1816a_write(chip, reg, chip->image[reg]);
  431. spin_unlock_irqrestore(&chip->lock, flags);
  432. }
  433. #endif
  434. static int snd_ad1816a_probe(struct snd_ad1816a *chip)
  435. {
  436. unsigned long flags;
  437. spin_lock_irqsave(&chip->lock, flags);
  438. switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
  439. case 0:
  440. chip->hardware = AD1816A_HW_AD1815;
  441. break;
  442. case 1:
  443. chip->hardware = AD1816A_HW_AD18MAX10;
  444. break;
  445. case 3:
  446. chip->hardware = AD1816A_HW_AD1816A;
  447. break;
  448. default:
  449. chip->hardware = AD1816A_HW_AUTO;
  450. }
  451. spin_unlock_irqrestore(&chip->lock, flags);
  452. return 0;
  453. }
  454. static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
  455. {
  456. switch (chip->hardware) {
  457. case AD1816A_HW_AD1816A: return "AD1816A";
  458. case AD1816A_HW_AD1815: return "AD1815";
  459. case AD1816A_HW_AD18MAX10: return "AD18max10";
  460. default:
  461. snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n",
  462. chip->version, chip->hardware);
  463. return "AD1816A - unknown";
  464. }
  465. }
  466. int snd_ad1816a_create(struct snd_card *card,
  467. unsigned long port, int irq, int dma1, int dma2,
  468. struct snd_ad1816a *chip)
  469. {
  470. int error;
  471. chip->irq = -1;
  472. chip->dma1 = -1;
  473. chip->dma2 = -1;
  474. chip->res_port = devm_request_region(card->dev, port, 16, "AD1816A");
  475. if (!chip->res_port) {
  476. snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
  477. return -EBUSY;
  478. }
  479. if (devm_request_irq(card->dev, irq, snd_ad1816a_interrupt, 0,
  480. "AD1816A", (void *) chip)) {
  481. snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
  482. return -EBUSY;
  483. }
  484. chip->irq = irq;
  485. card->sync_irq = chip->irq;
  486. if (snd_devm_request_dma(card->dev, dma1, "AD1816A - 1")) {
  487. snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
  488. return -EBUSY;
  489. }
  490. chip->dma1 = dma1;
  491. if (snd_devm_request_dma(card->dev, dma2, "AD1816A - 2")) {
  492. snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
  493. return -EBUSY;
  494. }
  495. chip->dma2 = dma2;
  496. chip->card = card;
  497. chip->port = port;
  498. spin_lock_init(&chip->lock);
  499. error = snd_ad1816a_probe(chip);
  500. if (error)
  501. return error;
  502. snd_ad1816a_init(chip);
  503. return 0;
  504. }
  505. static const struct snd_pcm_ops snd_ad1816a_playback_ops = {
  506. .open = snd_ad1816a_playback_open,
  507. .close = snd_ad1816a_playback_close,
  508. .prepare = snd_ad1816a_playback_prepare,
  509. .trigger = snd_ad1816a_playback_trigger,
  510. .pointer = snd_ad1816a_playback_pointer,
  511. };
  512. static const struct snd_pcm_ops snd_ad1816a_capture_ops = {
  513. .open = snd_ad1816a_capture_open,
  514. .close = snd_ad1816a_capture_close,
  515. .prepare = snd_ad1816a_capture_prepare,
  516. .trigger = snd_ad1816a_capture_trigger,
  517. .pointer = snd_ad1816a_capture_pointer,
  518. };
  519. int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device)
  520. {
  521. int error;
  522. struct snd_pcm *pcm;
  523. error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm);
  524. if (error)
  525. return error;
  526. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
  527. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
  528. pcm->private_data = chip;
  529. pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
  530. strcpy(pcm->name, snd_ad1816a_chip_id(chip));
  531. snd_ad1816a_init(chip);
  532. snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, chip->card->dev,
  533. 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
  534. chip->pcm = pcm;
  535. return 0;
  536. }
  537. int snd_ad1816a_timer(struct snd_ad1816a *chip, int device)
  538. {
  539. struct snd_timer *timer;
  540. struct snd_timer_id tid;
  541. int error;
  542. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  543. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  544. tid.card = chip->card->number;
  545. tid.device = device;
  546. tid.subdevice = 0;
  547. error = snd_timer_new(chip->card, "AD1816A", &tid, &timer);
  548. if (error < 0)
  549. return error;
  550. strcpy(timer->name, snd_ad1816a_chip_id(chip));
  551. timer->private_data = chip;
  552. chip->timer = timer;
  553. timer->hw = snd_ad1816a_timer_table;
  554. return 0;
  555. }
  556. /*
  557. *
  558. */
  559. static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  560. {
  561. static const char * const texts[8] = {
  562. "Line", "Mix", "CD", "Synth", "Video",
  563. "Mic", "Phone",
  564. };
  565. return snd_ctl_enum_info(uinfo, 2, 7, texts);
  566. }
  567. static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  568. {
  569. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  570. unsigned long flags;
  571. unsigned short val;
  572. spin_lock_irqsave(&chip->lock, flags);
  573. val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
  574. spin_unlock_irqrestore(&chip->lock, flags);
  575. ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
  576. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  577. return 0;
  578. }
  579. static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  580. {
  581. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  582. unsigned long flags;
  583. unsigned short val;
  584. int change;
  585. if (ucontrol->value.enumerated.item[0] > 6 ||
  586. ucontrol->value.enumerated.item[1] > 6)
  587. return -EINVAL;
  588. val = (ucontrol->value.enumerated.item[0] << 12) |
  589. (ucontrol->value.enumerated.item[1] << 4);
  590. spin_lock_irqsave(&chip->lock, flags);
  591. change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
  592. snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
  593. spin_unlock_irqrestore(&chip->lock, flags);
  594. return change;
  595. }
  596. #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \
  597. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  598. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  599. .name = xname, .info = snd_ad1816a_info_single, \
  600. .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
  601. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  602. .tlv = { .p = (xtlv) } }
  603. #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
  604. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
  605. .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
  606. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  607. static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  608. {
  609. int mask = (kcontrol->private_value >> 16) & 0xff;
  610. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  611. uinfo->count = 1;
  612. uinfo->value.integer.min = 0;
  613. uinfo->value.integer.max = mask;
  614. return 0;
  615. }
  616. static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  617. {
  618. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  619. unsigned long flags;
  620. int reg = kcontrol->private_value & 0xff;
  621. int shift = (kcontrol->private_value >> 8) & 0xff;
  622. int mask = (kcontrol->private_value >> 16) & 0xff;
  623. int invert = (kcontrol->private_value >> 24) & 0xff;
  624. spin_lock_irqsave(&chip->lock, flags);
  625. ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
  626. spin_unlock_irqrestore(&chip->lock, flags);
  627. if (invert)
  628. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  629. return 0;
  630. }
  631. static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  632. {
  633. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  634. unsigned long flags;
  635. int reg = kcontrol->private_value & 0xff;
  636. int shift = (kcontrol->private_value >> 8) & 0xff;
  637. int mask = (kcontrol->private_value >> 16) & 0xff;
  638. int invert = (kcontrol->private_value >> 24) & 0xff;
  639. int change;
  640. unsigned short old_val, val;
  641. val = (ucontrol->value.integer.value[0] & mask);
  642. if (invert)
  643. val = mask - val;
  644. val <<= shift;
  645. spin_lock_irqsave(&chip->lock, flags);
  646. old_val = snd_ad1816a_read(chip, reg);
  647. val = (old_val & ~(mask << shift)) | val;
  648. change = val != old_val;
  649. snd_ad1816a_write(chip, reg, val);
  650. spin_unlock_irqrestore(&chip->lock, flags);
  651. return change;
  652. }
  653. #define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
  654. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  655. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  656. .name = xname, .info = snd_ad1816a_info_double, \
  657. .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
  658. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
  659. .tlv = { .p = (xtlv) } }
  660. #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
  661. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
  662. .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
  663. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
  664. static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  665. {
  666. int mask = (kcontrol->private_value >> 16) & 0xff;
  667. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  668. uinfo->count = 2;
  669. uinfo->value.integer.min = 0;
  670. uinfo->value.integer.max = mask;
  671. return 0;
  672. }
  673. static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  674. {
  675. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  676. unsigned long flags;
  677. int reg = kcontrol->private_value & 0xff;
  678. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  679. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  680. int mask = (kcontrol->private_value >> 16) & 0xff;
  681. int invert = (kcontrol->private_value >> 24) & 0xff;
  682. unsigned short val;
  683. spin_lock_irqsave(&chip->lock, flags);
  684. val = snd_ad1816a_read(chip, reg);
  685. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  686. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  687. spin_unlock_irqrestore(&chip->lock, flags);
  688. if (invert) {
  689. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  690. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  691. }
  692. return 0;
  693. }
  694. static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  695. {
  696. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  697. unsigned long flags;
  698. int reg = kcontrol->private_value & 0xff;
  699. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  700. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  701. int mask = (kcontrol->private_value >> 16) & 0xff;
  702. int invert = (kcontrol->private_value >> 24) & 0xff;
  703. int change;
  704. unsigned short old_val, val1, val2;
  705. val1 = ucontrol->value.integer.value[0] & mask;
  706. val2 = ucontrol->value.integer.value[1] & mask;
  707. if (invert) {
  708. val1 = mask - val1;
  709. val2 = mask - val2;
  710. }
  711. val1 <<= shift_left;
  712. val2 <<= shift_right;
  713. spin_lock_irqsave(&chip->lock, flags);
  714. old_val = snd_ad1816a_read(chip, reg);
  715. val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  716. change = val1 != old_val;
  717. snd_ad1816a_write(chip, reg, val1);
  718. spin_unlock_irqrestore(&chip->lock, flags);
  719. return change;
  720. }
  721. static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
  722. static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
  723. static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
  724. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
  725. static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
  726. static const struct snd_kcontrol_new snd_ad1816a_controls[] = {
  727. AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
  728. AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
  729. db_scale_5bit),
  730. AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
  731. AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
  732. db_scale_6bit),
  733. AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
  734. AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
  735. db_scale_5bit_12db_max),
  736. AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
  737. AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
  738. db_scale_5bit_12db_max),
  739. AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
  740. AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
  741. db_scale_5bit_12db_max),
  742. AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
  743. AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
  744. db_scale_6bit),
  745. AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
  746. AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
  747. db_scale_5bit_12db_max),
  748. AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
  749. AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
  750. AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
  751. db_scale_5bit_12db_max),
  752. AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
  753. AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
  754. db_scale_4bit),
  755. AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
  756. AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
  757. db_scale_5bit),
  758. {
  759. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  760. .name = "Capture Source",
  761. .info = snd_ad1816a_info_mux,
  762. .get = snd_ad1816a_get_mux,
  763. .put = snd_ad1816a_put_mux,
  764. },
  765. AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
  766. AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
  767. db_scale_rec_gain),
  768. AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
  769. AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
  770. };
  771. int snd_ad1816a_mixer(struct snd_ad1816a *chip)
  772. {
  773. struct snd_card *card;
  774. unsigned int idx;
  775. int err;
  776. if (snd_BUG_ON(!chip || !chip->card))
  777. return -EINVAL;
  778. card = chip->card;
  779. strcpy(card->mixername, snd_ad1816a_chip_id(chip));
  780. for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
  781. err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip));
  782. if (err < 0)
  783. return err;
  784. }
  785. return 0;
  786. }