mmconfig_64.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
  4. *
  5. * This is an 64bit optimized version that always keeps the full mmconfig
  6. * space mapped. This allows lockless config space operation.
  7. */
  8. #include <linux/pci.h>
  9. #include <linux/init.h>
  10. #include <linux/acpi.h>
  11. #include <linux/bitmap.h>
  12. #include <linux/rcupdate.h>
  13. #include <asm/e820/api.h>
  14. #include <asm/pci_x86.h>
  15. #define PREFIX "PCI: "
  16. static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
  17. {
  18. struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus);
  19. if (cfg && cfg->virt)
  20. return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12));
  21. return NULL;
  22. }
  23. static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
  24. unsigned int devfn, int reg, int len, u32 *value)
  25. {
  26. char __iomem *addr;
  27. /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
  28. if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {
  29. err: *value = -1;
  30. return -EINVAL;
  31. }
  32. rcu_read_lock();
  33. addr = pci_dev_base(seg, bus, devfn);
  34. if (!addr) {
  35. rcu_read_unlock();
  36. goto err;
  37. }
  38. switch (len) {
  39. case 1:
  40. *value = mmio_config_readb(addr + reg);
  41. break;
  42. case 2:
  43. *value = mmio_config_readw(addr + reg);
  44. break;
  45. case 4:
  46. *value = mmio_config_readl(addr + reg);
  47. break;
  48. }
  49. rcu_read_unlock();
  50. return 0;
  51. }
  52. static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
  53. unsigned int devfn, int reg, int len, u32 value)
  54. {
  55. char __iomem *addr;
  56. /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
  57. if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
  58. return -EINVAL;
  59. rcu_read_lock();
  60. addr = pci_dev_base(seg, bus, devfn);
  61. if (!addr) {
  62. rcu_read_unlock();
  63. return -EINVAL;
  64. }
  65. switch (len) {
  66. case 1:
  67. mmio_config_writeb(addr + reg, value);
  68. break;
  69. case 2:
  70. mmio_config_writew(addr + reg, value);
  71. break;
  72. case 4:
  73. mmio_config_writel(addr + reg, value);
  74. break;
  75. }
  76. rcu_read_unlock();
  77. return 0;
  78. }
  79. const struct pci_raw_ops pci_mmcfg = {
  80. .read = pci_mmcfg_read,
  81. .write = pci_mmcfg_write,
  82. };
  83. static void __iomem *mcfg_ioremap(struct pci_mmcfg_region *cfg)
  84. {
  85. void __iomem *addr;
  86. u64 start, size;
  87. int num_buses;
  88. start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus);
  89. num_buses = cfg->end_bus - cfg->start_bus + 1;
  90. size = PCI_MMCFG_BUS_OFFSET(num_buses);
  91. addr = ioremap(start, size);
  92. if (addr)
  93. addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus);
  94. return addr;
  95. }
  96. int __init pci_mmcfg_arch_init(void)
  97. {
  98. struct pci_mmcfg_region *cfg;
  99. list_for_each_entry(cfg, &pci_mmcfg_list, list)
  100. if (pci_mmcfg_arch_map(cfg)) {
  101. pci_mmcfg_arch_free();
  102. return 0;
  103. }
  104. raw_pci_ext_ops = &pci_mmcfg;
  105. return 1;
  106. }
  107. void __init pci_mmcfg_arch_free(void)
  108. {
  109. struct pci_mmcfg_region *cfg;
  110. list_for_each_entry(cfg, &pci_mmcfg_list, list)
  111. pci_mmcfg_arch_unmap(cfg);
  112. }
  113. int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg)
  114. {
  115. cfg->virt = mcfg_ioremap(cfg);
  116. if (!cfg->virt) {
  117. pr_err(PREFIX "can't map MMCONFIG at %pR\n", &cfg->res);
  118. return -ENOMEM;
  119. }
  120. return 0;
  121. }
  122. void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg)
  123. {
  124. if (cfg && cfg->virt) {
  125. iounmap(cfg->virt + PCI_MMCFG_BUS_OFFSET(cfg->start_bus));
  126. cfg->virt = NULL;
  127. }
  128. }