mmconfig_32.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2004 Matthew Wilcox <[email protected]>
  4. * Copyright (C) 2004 Intel Corp.
  5. */
  6. /*
  7. * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
  8. */
  9. #include <linux/pci.h>
  10. #include <linux/init.h>
  11. #include <linux/rcupdate.h>
  12. #include <asm/e820/api.h>
  13. #include <asm/pci_x86.h>
  14. /* Assume systems with more busses have correct MCFG */
  15. #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
  16. /* The base address of the last MMCONFIG device accessed */
  17. static u32 mmcfg_last_accessed_device;
  18. static int mmcfg_last_accessed_cpu;
  19. /*
  20. * Functions for accessing PCI configuration space with MMCONFIG accesses
  21. */
  22. static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
  23. {
  24. struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus);
  25. if (cfg)
  26. return cfg->address;
  27. return 0;
  28. }
  29. /*
  30. * This is always called under pci_config_lock
  31. */
  32. static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
  33. {
  34. u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12);
  35. int cpu = smp_processor_id();
  36. if (dev_base != mmcfg_last_accessed_device ||
  37. cpu != mmcfg_last_accessed_cpu) {
  38. mmcfg_last_accessed_device = dev_base;
  39. mmcfg_last_accessed_cpu = cpu;
  40. set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
  41. }
  42. }
  43. static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
  44. unsigned int devfn, int reg, int len, u32 *value)
  45. {
  46. unsigned long flags;
  47. u32 base;
  48. if ((bus > 255) || (devfn > 255) || (reg > 4095)) {
  49. err: *value = -1;
  50. return -EINVAL;
  51. }
  52. rcu_read_lock();
  53. base = get_base_addr(seg, bus, devfn);
  54. if (!base) {
  55. rcu_read_unlock();
  56. goto err;
  57. }
  58. raw_spin_lock_irqsave(&pci_config_lock, flags);
  59. pci_exp_set_dev_base(base, bus, devfn);
  60. switch (len) {
  61. case 1:
  62. *value = mmio_config_readb(mmcfg_virt_addr + reg);
  63. break;
  64. case 2:
  65. *value = mmio_config_readw(mmcfg_virt_addr + reg);
  66. break;
  67. case 4:
  68. *value = mmio_config_readl(mmcfg_virt_addr + reg);
  69. break;
  70. }
  71. raw_spin_unlock_irqrestore(&pci_config_lock, flags);
  72. rcu_read_unlock();
  73. return 0;
  74. }
  75. static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
  76. unsigned int devfn, int reg, int len, u32 value)
  77. {
  78. unsigned long flags;
  79. u32 base;
  80. if ((bus > 255) || (devfn > 255) || (reg > 4095))
  81. return -EINVAL;
  82. rcu_read_lock();
  83. base = get_base_addr(seg, bus, devfn);
  84. if (!base) {
  85. rcu_read_unlock();
  86. return -EINVAL;
  87. }
  88. raw_spin_lock_irqsave(&pci_config_lock, flags);
  89. pci_exp_set_dev_base(base, bus, devfn);
  90. switch (len) {
  91. case 1:
  92. mmio_config_writeb(mmcfg_virt_addr + reg, value);
  93. break;
  94. case 2:
  95. mmio_config_writew(mmcfg_virt_addr + reg, value);
  96. break;
  97. case 4:
  98. mmio_config_writel(mmcfg_virt_addr + reg, value);
  99. break;
  100. }
  101. raw_spin_unlock_irqrestore(&pci_config_lock, flags);
  102. rcu_read_unlock();
  103. return 0;
  104. }
  105. const struct pci_raw_ops pci_mmcfg = {
  106. .read = pci_mmcfg_read,
  107. .write = pci_mmcfg_write,
  108. };
  109. int __init pci_mmcfg_arch_init(void)
  110. {
  111. printk(KERN_INFO "PCI: Using MMCONFIG for extended config space\n");
  112. raw_pci_ext_ops = &pci_mmcfg;
  113. return 1;
  114. }
  115. void __init pci_mmcfg_arch_free(void)
  116. {
  117. }
  118. int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg)
  119. {
  120. return 0;
  121. }
  122. void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg)
  123. {
  124. unsigned long flags;
  125. /* Invalidate the cached mmcfg map entry. */
  126. raw_spin_lock_irqsave(&pci_config_lock, flags);
  127. mmcfg_last_accessed_device = 0;
  128. raw_spin_unlock_irqrestore(&pci_config_lock, flags);
  129. }