posted_intr.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. #include <linux/kvm_host.h>
  3. #include <asm/irq_remapping.h>
  4. #include <asm/cpu.h>
  5. #include "lapic.h"
  6. #include "irq.h"
  7. #include "posted_intr.h"
  8. #include "trace.h"
  9. #include "vmx.h"
  10. /*
  11. * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler()
  12. * when a WAKEUP_VECTOR interrupted is posted. vCPUs are added to the list when
  13. * the vCPU is scheduled out and is blocking (e.g. in HLT) with IRQs enabled.
  14. * The vCPUs posted interrupt descriptor is updated at the same time to set its
  15. * notification vector to WAKEUP_VECTOR, so that posted interrupt from devices
  16. * wake the target vCPUs. vCPUs are removed from the list and the notification
  17. * vector is reset when the vCPU is scheduled in.
  18. */
  19. static DEFINE_PER_CPU(struct list_head, wakeup_vcpus_on_cpu);
  20. /*
  21. * Protect the per-CPU list with a per-CPU spinlock to handle task migration.
  22. * When a blocking vCPU is awakened _and_ migrated to a different pCPU, the
  23. * ->sched_in() path will need to take the vCPU off the list of the _previous_
  24. * CPU. IRQs must be disabled when taking this lock, otherwise deadlock will
  25. * occur if a wakeup IRQ arrives and attempts to acquire the lock.
  26. */
  27. static DEFINE_PER_CPU(raw_spinlock_t, wakeup_vcpus_on_cpu_lock);
  28. static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
  29. {
  30. return &(to_vmx(vcpu)->pi_desc);
  31. }
  32. static int pi_try_set_control(struct pi_desc *pi_desc, u64 *pold, u64 new)
  33. {
  34. /*
  35. * PID.ON can be set at any time by a different vCPU or by hardware,
  36. * e.g. a device. PID.control must be written atomically, and the
  37. * update must be retried with a fresh snapshot an ON change causes
  38. * the cmpxchg to fail.
  39. */
  40. if (!try_cmpxchg64(&pi_desc->control, pold, new))
  41. return -EBUSY;
  42. return 0;
  43. }
  44. void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
  45. {
  46. struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
  47. struct vcpu_vmx *vmx = to_vmx(vcpu);
  48. struct pi_desc old, new;
  49. unsigned long flags;
  50. unsigned int dest;
  51. /*
  52. * To simplify hot-plug and dynamic toggling of APICv, keep PI.NDST and
  53. * PI.SN up-to-date even if there is no assigned device or if APICv is
  54. * deactivated due to a dynamic inhibit bit, e.g. for Hyper-V's SyncIC.
  55. */
  56. if (!enable_apicv || !lapic_in_kernel(vcpu))
  57. return;
  58. /*
  59. * If the vCPU wasn't on the wakeup list and wasn't migrated, then the
  60. * full update can be skipped as neither the vector nor the destination
  61. * needs to be changed.
  62. */
  63. if (pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR && vcpu->cpu == cpu) {
  64. /*
  65. * Clear SN if it was set due to being preempted. Again, do
  66. * this even if there is no assigned device for simplicity.
  67. */
  68. if (pi_test_and_clear_sn(pi_desc))
  69. goto after_clear_sn;
  70. return;
  71. }
  72. local_irq_save(flags);
  73. /*
  74. * If the vCPU was waiting for wakeup, remove the vCPU from the wakeup
  75. * list of the _previous_ pCPU, which will not be the same as the
  76. * current pCPU if the task was migrated.
  77. */
  78. if (pi_desc->nv == POSTED_INTR_WAKEUP_VECTOR) {
  79. raw_spin_lock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
  80. list_del(&vmx->pi_wakeup_list);
  81. raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
  82. }
  83. dest = cpu_physical_id(cpu);
  84. if (!x2apic_mode)
  85. dest = (dest << 8) & 0xFF00;
  86. old.control = READ_ONCE(pi_desc->control);
  87. do {
  88. new.control = old.control;
  89. /*
  90. * Clear SN (as above) and refresh the destination APIC ID to
  91. * handle task migration (@cpu != vcpu->cpu).
  92. */
  93. new.ndst = dest;
  94. new.sn = 0;
  95. /*
  96. * Restore the notification vector; in the blocking case, the
  97. * descriptor was modified on "put" to use the wakeup vector.
  98. */
  99. new.nv = POSTED_INTR_VECTOR;
  100. } while (pi_try_set_control(pi_desc, &old.control, new.control));
  101. local_irq_restore(flags);
  102. after_clear_sn:
  103. /*
  104. * Clear SN before reading the bitmap. The VT-d firmware
  105. * writes the bitmap and reads SN atomically (5.2.3 in the
  106. * spec), so it doesn't really have a memory barrier that
  107. * pairs with this, but we cannot do that and we need one.
  108. */
  109. smp_mb__after_atomic();
  110. if (!pi_is_pir_empty(pi_desc))
  111. pi_set_on(pi_desc);
  112. }
  113. static bool vmx_can_use_vtd_pi(struct kvm *kvm)
  114. {
  115. return irqchip_in_kernel(kvm) && enable_apicv &&
  116. kvm_arch_has_assigned_device(kvm) &&
  117. irq_remapping_cap(IRQ_POSTING_CAP);
  118. }
  119. /*
  120. * Put the vCPU on this pCPU's list of vCPUs that needs to be awakened and set
  121. * WAKEUP as the notification vector in the PI descriptor.
  122. */
  123. static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)
  124. {
  125. struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
  126. struct vcpu_vmx *vmx = to_vmx(vcpu);
  127. struct pi_desc old, new;
  128. unsigned long flags;
  129. local_irq_save(flags);
  130. raw_spin_lock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
  131. list_add_tail(&vmx->pi_wakeup_list,
  132. &per_cpu(wakeup_vcpus_on_cpu, vcpu->cpu));
  133. raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
  134. WARN(pi_desc->sn, "PI descriptor SN field set before blocking");
  135. old.control = READ_ONCE(pi_desc->control);
  136. do {
  137. /* set 'NV' to 'wakeup vector' */
  138. new.control = old.control;
  139. new.nv = POSTED_INTR_WAKEUP_VECTOR;
  140. } while (pi_try_set_control(pi_desc, &old.control, new.control));
  141. /*
  142. * Send a wakeup IPI to this CPU if an interrupt may have been posted
  143. * before the notification vector was updated, in which case the IRQ
  144. * will arrive on the non-wakeup vector. An IPI is needed as calling
  145. * try_to_wake_up() from ->sched_out() isn't allowed (IRQs are not
  146. * enabled until it is safe to call try_to_wake_up() on the task being
  147. * scheduled out).
  148. */
  149. if (pi_test_on(&new))
  150. apic->send_IPI_self(POSTED_INTR_WAKEUP_VECTOR);
  151. local_irq_restore(flags);
  152. }
  153. static bool vmx_needs_pi_wakeup(struct kvm_vcpu *vcpu)
  154. {
  155. /*
  156. * The default posted interrupt vector does nothing when
  157. * invoked outside guest mode. Return whether a blocked vCPU
  158. * can be the target of posted interrupts, as is the case when
  159. * using either IPI virtualization or VT-d PI, so that the
  160. * notification vector is switched to the one that calls
  161. * back to the pi_wakeup_handler() function.
  162. */
  163. return vmx_can_use_ipiv(vcpu) || vmx_can_use_vtd_pi(vcpu->kvm);
  164. }
  165. void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu)
  166. {
  167. struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
  168. if (!vmx_needs_pi_wakeup(vcpu))
  169. return;
  170. if (kvm_vcpu_is_blocking(vcpu) && !vmx_interrupt_blocked(vcpu))
  171. pi_enable_wakeup_handler(vcpu);
  172. /*
  173. * Set SN when the vCPU is preempted. Note, the vCPU can both be seen
  174. * as blocking and preempted, e.g. if it's preempted between setting
  175. * its wait state and manually scheduling out.
  176. */
  177. if (vcpu->preempted)
  178. pi_set_sn(pi_desc);
  179. }
  180. /*
  181. * Handler for POSTED_INTERRUPT_WAKEUP_VECTOR.
  182. */
  183. void pi_wakeup_handler(void)
  184. {
  185. int cpu = smp_processor_id();
  186. struct list_head *wakeup_list = &per_cpu(wakeup_vcpus_on_cpu, cpu);
  187. raw_spinlock_t *spinlock = &per_cpu(wakeup_vcpus_on_cpu_lock, cpu);
  188. struct vcpu_vmx *vmx;
  189. raw_spin_lock(spinlock);
  190. list_for_each_entry(vmx, wakeup_list, pi_wakeup_list) {
  191. if (pi_test_on(&vmx->pi_desc))
  192. kvm_vcpu_wake_up(&vmx->vcpu);
  193. }
  194. raw_spin_unlock(spinlock);
  195. }
  196. void __init pi_init_cpu(int cpu)
  197. {
  198. INIT_LIST_HEAD(&per_cpu(wakeup_vcpus_on_cpu, cpu));
  199. raw_spin_lock_init(&per_cpu(wakeup_vcpus_on_cpu_lock, cpu));
  200. }
  201. bool pi_has_pending_interrupt(struct kvm_vcpu *vcpu)
  202. {
  203. struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
  204. return pi_test_on(pi_desc) ||
  205. (pi_test_sn(pi_desc) && !pi_is_pir_empty(pi_desc));
  206. }
  207. /*
  208. * Bail out of the block loop if the VM has an assigned
  209. * device, but the blocking vCPU didn't reconfigure the
  210. * PI.NV to the wakeup vector, i.e. the assigned device
  211. * came along after the initial check in vmx_vcpu_pi_put().
  212. */
  213. void vmx_pi_start_assignment(struct kvm *kvm)
  214. {
  215. if (!irq_remapping_cap(IRQ_POSTING_CAP))
  216. return;
  217. kvm_make_all_cpus_request(kvm, KVM_REQ_UNBLOCK);
  218. }
  219. /*
  220. * vmx_pi_update_irte - set IRTE for Posted-Interrupts
  221. *
  222. * @kvm: kvm
  223. * @host_irq: host irq of the interrupt
  224. * @guest_irq: gsi of the interrupt
  225. * @set: set or unset PI
  226. * returns 0 on success, < 0 on failure
  227. */
  228. int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq,
  229. uint32_t guest_irq, bool set)
  230. {
  231. struct kvm_kernel_irq_routing_entry *e;
  232. struct kvm_irq_routing_table *irq_rt;
  233. struct kvm_lapic_irq irq;
  234. struct kvm_vcpu *vcpu;
  235. struct vcpu_data vcpu_info;
  236. int idx, ret = 0;
  237. if (!vmx_can_use_vtd_pi(kvm))
  238. return 0;
  239. idx = srcu_read_lock(&kvm->irq_srcu);
  240. irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
  241. if (guest_irq >= irq_rt->nr_rt_entries ||
  242. hlist_empty(&irq_rt->map[guest_irq])) {
  243. pr_warn_once("no route for guest_irq %u/%u (broken user space?)\n",
  244. guest_irq, irq_rt->nr_rt_entries);
  245. goto out;
  246. }
  247. hlist_for_each_entry(e, &irq_rt->map[guest_irq], link) {
  248. if (e->type != KVM_IRQ_ROUTING_MSI)
  249. continue;
  250. /*
  251. * VT-d PI cannot support posting multicast/broadcast
  252. * interrupts to a vCPU, we still use interrupt remapping
  253. * for these kind of interrupts.
  254. *
  255. * For lowest-priority interrupts, we only support
  256. * those with single CPU as the destination, e.g. user
  257. * configures the interrupts via /proc/irq or uses
  258. * irqbalance to make the interrupts single-CPU.
  259. *
  260. * We will support full lowest-priority interrupt later.
  261. *
  262. * In addition, we can only inject generic interrupts using
  263. * the PI mechanism, refuse to route others through it.
  264. */
  265. kvm_set_msi_irq(kvm, e, &irq);
  266. if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
  267. !kvm_irq_is_postable(&irq)) {
  268. /*
  269. * Make sure the IRTE is in remapped mode if
  270. * we don't handle it in posted mode.
  271. */
  272. ret = irq_set_vcpu_affinity(host_irq, NULL);
  273. if (ret < 0) {
  274. printk(KERN_INFO
  275. "failed to back to remapped mode, irq: %u\n",
  276. host_irq);
  277. goto out;
  278. }
  279. continue;
  280. }
  281. vcpu_info.pi_desc_addr = __pa(vcpu_to_pi_desc(vcpu));
  282. vcpu_info.vector = irq.vector;
  283. trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, e->gsi,
  284. vcpu_info.vector, vcpu_info.pi_desc_addr, set);
  285. if (set)
  286. ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
  287. else
  288. ret = irq_set_vcpu_affinity(host_irq, NULL);
  289. if (ret < 0) {
  290. printk(KERN_INFO "%s: failed to update PI IRTE\n",
  291. __func__);
  292. goto out;
  293. }
  294. }
  295. ret = 0;
  296. out:
  297. srcu_read_unlock(&kvm->irq_srcu, idx);
  298. return ret;
  299. }