kvm_emulate.h 18 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /******************************************************************************
  3. * x86_emulate.h
  4. *
  5. * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
  6. *
  7. * Copyright (c) 2005 Keir Fraser
  8. *
  9. * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
  10. */
  11. #ifndef _ASM_X86_KVM_X86_EMULATE_H
  12. #define _ASM_X86_KVM_X86_EMULATE_H
  13. #include <asm/desc_defs.h>
  14. #include "fpu.h"
  15. struct x86_emulate_ctxt;
  16. enum x86_intercept;
  17. enum x86_intercept_stage;
  18. struct x86_exception {
  19. u8 vector;
  20. bool error_code_valid;
  21. u16 error_code;
  22. bool nested_page_fault;
  23. u64 address; /* cr2 or nested page fault gpa */
  24. u8 async_page_fault;
  25. };
  26. /*
  27. * This struct is used to carry enough information from the instruction
  28. * decoder to main KVM so that a decision can be made whether the
  29. * instruction needs to be intercepted or not.
  30. */
  31. struct x86_instruction_info {
  32. u8 intercept; /* which intercept */
  33. u8 rep_prefix; /* rep prefix? */
  34. u8 modrm_mod; /* mod part of modrm */
  35. u8 modrm_reg; /* index of register used */
  36. u8 modrm_rm; /* rm part of modrm */
  37. u64 src_val; /* value of source operand */
  38. u64 dst_val; /* value of destination operand */
  39. u8 src_bytes; /* size of source operand */
  40. u8 dst_bytes; /* size of destination operand */
  41. u8 ad_bytes; /* size of src/dst address */
  42. u64 next_rip; /* rip following the instruction */
  43. };
  44. /*
  45. * x86_emulate_ops:
  46. *
  47. * These operations represent the instruction emulator's interface to memory.
  48. * There are two categories of operation: those that act on ordinary memory
  49. * regions (*_std), and those that act on memory regions known to require
  50. * special treatment or emulation (*_emulated).
  51. *
  52. * The emulator assumes that an instruction accesses only one 'emulated memory'
  53. * location, that this location is the given linear faulting address (cr2), and
  54. * that this is one of the instruction's data operands. Instruction fetches and
  55. * stack operations are assumed never to access emulated memory. The emulator
  56. * automatically deduces which operand of a string-move operation is accessing
  57. * emulated memory, and assumes that the other operand accesses normal memory.
  58. *
  59. * NOTES:
  60. * 1. The emulator isn't very smart about emulated vs. standard memory.
  61. * 'Emulated memory' access addresses should be checked for sanity.
  62. * 'Normal memory' accesses may fault, and the caller must arrange to
  63. * detect and handle reentrancy into the emulator via recursive faults.
  64. * Accesses may be unaligned and may cross page boundaries.
  65. * 2. If the access fails (cannot emulate, or a standard access faults) then
  66. * it is up to the memop to propagate the fault to the guest VM via
  67. * some out-of-band mechanism, unknown to the emulator. The memop signals
  68. * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
  69. * then immediately bail.
  70. * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
  71. * cmpxchg8b_emulated need support 8-byte accesses.
  72. * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
  73. */
  74. /* Access completed successfully: continue emulation as normal. */
  75. #define X86EMUL_CONTINUE 0
  76. /* Access is unhandleable: bail from emulation and return error to caller. */
  77. #define X86EMUL_UNHANDLEABLE 1
  78. /* Terminate emulation but return success to the caller. */
  79. #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
  80. #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
  81. #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
  82. #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
  83. #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
  84. struct x86_emulate_ops {
  85. void (*vm_bugged)(struct x86_emulate_ctxt *ctxt);
  86. /*
  87. * read_gpr: read a general purpose register (rax - r15)
  88. *
  89. * @reg: gpr number.
  90. */
  91. ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
  92. /*
  93. * write_gpr: write a general purpose register (rax - r15)
  94. *
  95. * @reg: gpr number.
  96. * @val: value to write.
  97. */
  98. void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
  99. /*
  100. * read_std: Read bytes of standard (non-emulated/special) memory.
  101. * Used for descriptor reading.
  102. * @addr: [IN ] Linear address from which to read.
  103. * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
  104. * @bytes: [IN ] Number of bytes to read from memory.
  105. * @system:[IN ] Whether the access is forced to be at CPL0.
  106. */
  107. int (*read_std)(struct x86_emulate_ctxt *ctxt,
  108. unsigned long addr, void *val,
  109. unsigned int bytes,
  110. struct x86_exception *fault, bool system);
  111. /*
  112. * read_phys: Read bytes of standard (non-emulated/special) memory.
  113. * Used for descriptor reading.
  114. * @addr: [IN ] Physical address from which to read.
  115. * @val: [OUT] Value read from memory.
  116. * @bytes: [IN ] Number of bytes to read from memory.
  117. */
  118. int (*read_phys)(struct x86_emulate_ctxt *ctxt, unsigned long addr,
  119. void *val, unsigned int bytes);
  120. /*
  121. * write_std: Write bytes of standard (non-emulated/special) memory.
  122. * Used for descriptor writing.
  123. * @addr: [IN ] Linear address to which to write.
  124. * @val: [OUT] Value write to memory, zero-extended to 'u_long'.
  125. * @bytes: [IN ] Number of bytes to write to memory.
  126. * @system:[IN ] Whether the access is forced to be at CPL0.
  127. */
  128. int (*write_std)(struct x86_emulate_ctxt *ctxt,
  129. unsigned long addr, void *val, unsigned int bytes,
  130. struct x86_exception *fault, bool system);
  131. /*
  132. * fetch: Read bytes of standard (non-emulated/special) memory.
  133. * Used for instruction fetch.
  134. * @addr: [IN ] Linear address from which to read.
  135. * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
  136. * @bytes: [IN ] Number of bytes to read from memory.
  137. */
  138. int (*fetch)(struct x86_emulate_ctxt *ctxt,
  139. unsigned long addr, void *val, unsigned int bytes,
  140. struct x86_exception *fault);
  141. /*
  142. * read_emulated: Read bytes from emulated/special memory area.
  143. * @addr: [IN ] Linear address from which to read.
  144. * @val: [OUT] Value read from memory, zero-extended to 'u_long'.
  145. * @bytes: [IN ] Number of bytes to read from memory.
  146. */
  147. int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
  148. unsigned long addr, void *val, unsigned int bytes,
  149. struct x86_exception *fault);
  150. /*
  151. * write_emulated: Write bytes to emulated/special memory area.
  152. * @addr: [IN ] Linear address to which to write.
  153. * @val: [IN ] Value to write to memory (low-order bytes used as
  154. * required).
  155. * @bytes: [IN ] Number of bytes to write to memory.
  156. */
  157. int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
  158. unsigned long addr, const void *val,
  159. unsigned int bytes,
  160. struct x86_exception *fault);
  161. /*
  162. * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
  163. * emulated/special memory area.
  164. * @addr: [IN ] Linear address to access.
  165. * @old: [IN ] Value expected to be current at @addr.
  166. * @new: [IN ] Value to write to @addr.
  167. * @bytes: [IN ] Number of bytes to access using CMPXCHG.
  168. */
  169. int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
  170. unsigned long addr,
  171. const void *old,
  172. const void *new,
  173. unsigned int bytes,
  174. struct x86_exception *fault);
  175. void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
  176. int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
  177. int size, unsigned short port, void *val,
  178. unsigned int count);
  179. int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
  180. int size, unsigned short port, const void *val,
  181. unsigned int count);
  182. bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
  183. struct desc_struct *desc, u32 *base3, int seg);
  184. void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
  185. struct desc_struct *desc, u32 base3, int seg);
  186. unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
  187. int seg);
  188. void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
  189. void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
  190. void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
  191. void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
  192. ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
  193. int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
  194. int (*cpl)(struct x86_emulate_ctxt *ctxt);
  195. void (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
  196. int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
  197. u64 (*get_smbase)(struct x86_emulate_ctxt *ctxt);
  198. void (*set_smbase)(struct x86_emulate_ctxt *ctxt, u64 smbase);
  199. int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
  200. int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
  201. int (*set_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
  202. int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
  203. int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
  204. int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
  205. void (*halt)(struct x86_emulate_ctxt *ctxt);
  206. void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
  207. int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
  208. int (*intercept)(struct x86_emulate_ctxt *ctxt,
  209. struct x86_instruction_info *info,
  210. enum x86_intercept_stage stage);
  211. bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
  212. u32 *ecx, u32 *edx, bool exact_only);
  213. bool (*guest_has_long_mode)(struct x86_emulate_ctxt *ctxt);
  214. bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt);
  215. bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt);
  216. bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt);
  217. void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
  218. unsigned (*get_hflags)(struct x86_emulate_ctxt *ctxt);
  219. void (*exiting_smm)(struct x86_emulate_ctxt *ctxt);
  220. int (*leave_smm)(struct x86_emulate_ctxt *ctxt, const char *smstate);
  221. void (*triple_fault)(struct x86_emulate_ctxt *ctxt);
  222. int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr);
  223. };
  224. /* Type, address-of, and value of an instruction's operand. */
  225. struct operand {
  226. enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
  227. unsigned int bytes;
  228. unsigned int count;
  229. union {
  230. unsigned long orig_val;
  231. u64 orig_val64;
  232. };
  233. union {
  234. unsigned long *reg;
  235. struct segmented_address {
  236. ulong ea;
  237. unsigned seg;
  238. } mem;
  239. unsigned xmm;
  240. unsigned mm;
  241. } addr;
  242. union {
  243. unsigned long val;
  244. u64 val64;
  245. char valptr[sizeof(sse128_t)];
  246. sse128_t vec_val;
  247. u64 mm_val;
  248. void *data;
  249. };
  250. };
  251. struct fetch_cache {
  252. u8 data[15];
  253. u8 *ptr;
  254. u8 *end;
  255. };
  256. struct read_cache {
  257. u8 data[1024];
  258. unsigned long pos;
  259. unsigned long end;
  260. };
  261. /* Execution mode, passed to the emulator. */
  262. enum x86emul_mode {
  263. X86EMUL_MODE_REAL, /* Real mode. */
  264. X86EMUL_MODE_VM86, /* Virtual 8086 mode. */
  265. X86EMUL_MODE_PROT16, /* 16-bit protected mode. */
  266. X86EMUL_MODE_PROT32, /* 32-bit protected mode. */
  267. X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */
  268. };
  269. /* These match some of the HF_* flags defined in kvm_host.h */
  270. #define X86EMUL_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
  271. #define X86EMUL_SMM_MASK (1 << 6)
  272. #define X86EMUL_SMM_INSIDE_NMI_MASK (1 << 7)
  273. /*
  274. * fastop functions are declared as taking a never-defined fastop parameter,
  275. * so they can't be called from C directly.
  276. */
  277. struct fastop;
  278. typedef void (*fastop_t)(struct fastop *);
  279. /*
  280. * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is
  281. * tracked/accessed via _eip, and except for RIP relative addressing, which
  282. * also uses _eip, RIP cannot be a register operand nor can it be an operand in
  283. * a ModRM or SIB byte.
  284. */
  285. #ifdef CONFIG_X86_64
  286. #define NR_EMULATOR_GPRS 16
  287. #else
  288. #define NR_EMULATOR_GPRS 8
  289. #endif
  290. struct x86_emulate_ctxt {
  291. void *vcpu;
  292. const struct x86_emulate_ops *ops;
  293. /* Register state before/after emulation. */
  294. unsigned long eflags;
  295. unsigned long eip; /* eip before instruction emulation */
  296. /* Emulated execution mode, represented by an X86EMUL_MODE value. */
  297. enum x86emul_mode mode;
  298. /* interruptibility state, as a result of execution of STI or MOV SS */
  299. int interruptibility;
  300. bool perm_ok; /* do not check permissions if true */
  301. bool tf; /* TF value before instruction (after for syscall/sysret) */
  302. bool have_exception;
  303. struct x86_exception exception;
  304. /* GPA available */
  305. bool gpa_available;
  306. gpa_t gpa_val;
  307. /*
  308. * decode cache
  309. */
  310. /* current opcode length in bytes */
  311. u8 opcode_len;
  312. u8 b;
  313. u8 intercept;
  314. u8 op_bytes;
  315. u8 ad_bytes;
  316. union {
  317. int (*execute)(struct x86_emulate_ctxt *ctxt);
  318. fastop_t fop;
  319. };
  320. int (*check_perm)(struct x86_emulate_ctxt *ctxt);
  321. bool rip_relative;
  322. u8 rex_prefix;
  323. u8 lock_prefix;
  324. u8 rep_prefix;
  325. /* bitmaps of registers in _regs[] that can be read */
  326. u16 regs_valid;
  327. /* bitmaps of registers in _regs[] that have been written */
  328. u16 regs_dirty;
  329. /* modrm */
  330. u8 modrm;
  331. u8 modrm_mod;
  332. u8 modrm_reg;
  333. u8 modrm_rm;
  334. u8 modrm_seg;
  335. u8 seg_override;
  336. u64 d;
  337. unsigned long _eip;
  338. /* Here begins the usercopy section. */
  339. struct operand src;
  340. struct operand src2;
  341. struct operand dst;
  342. struct operand memop;
  343. unsigned long _regs[NR_EMULATOR_GPRS];
  344. struct operand *memopp;
  345. struct fetch_cache fetch;
  346. struct read_cache io_read;
  347. struct read_cache mem_read;
  348. bool is_branch;
  349. };
  350. #define KVM_EMULATOR_BUG_ON(cond, ctxt) \
  351. ({ \
  352. int __ret = (cond); \
  353. \
  354. if (WARN_ON_ONCE(__ret)) \
  355. ctxt->ops->vm_bugged(ctxt); \
  356. unlikely(__ret); \
  357. })
  358. /* Repeat String Operation Prefix */
  359. #define REPE_PREFIX 0xf3
  360. #define REPNE_PREFIX 0xf2
  361. /* CPUID vendors */
  362. #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
  363. #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
  364. #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
  365. #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
  366. #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
  367. #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
  368. #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
  369. #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
  370. #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
  371. #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
  372. #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
  373. #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
  374. #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543
  375. #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561
  376. #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561
  377. static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx)
  378. {
  379. return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx &&
  380. ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx &&
  381. edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx;
  382. }
  383. static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx)
  384. {
  385. return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx &&
  386. ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx &&
  387. edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) ||
  388. (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx &&
  389. ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx &&
  390. edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx);
  391. }
  392. static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx)
  393. {
  394. return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
  395. ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
  396. edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx;
  397. }
  398. enum x86_intercept_stage {
  399. X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
  400. X86_ICPT_PRE_EXCEPT,
  401. X86_ICPT_POST_EXCEPT,
  402. X86_ICPT_POST_MEMACCESS,
  403. };
  404. enum x86_intercept {
  405. x86_intercept_none,
  406. x86_intercept_cr_read,
  407. x86_intercept_cr_write,
  408. x86_intercept_clts,
  409. x86_intercept_lmsw,
  410. x86_intercept_smsw,
  411. x86_intercept_dr_read,
  412. x86_intercept_dr_write,
  413. x86_intercept_lidt,
  414. x86_intercept_sidt,
  415. x86_intercept_lgdt,
  416. x86_intercept_sgdt,
  417. x86_intercept_lldt,
  418. x86_intercept_sldt,
  419. x86_intercept_ltr,
  420. x86_intercept_str,
  421. x86_intercept_rdtsc,
  422. x86_intercept_rdpmc,
  423. x86_intercept_pushf,
  424. x86_intercept_popf,
  425. x86_intercept_cpuid,
  426. x86_intercept_rsm,
  427. x86_intercept_iret,
  428. x86_intercept_intn,
  429. x86_intercept_invd,
  430. x86_intercept_pause,
  431. x86_intercept_hlt,
  432. x86_intercept_invlpg,
  433. x86_intercept_invlpga,
  434. x86_intercept_vmrun,
  435. x86_intercept_vmload,
  436. x86_intercept_vmsave,
  437. x86_intercept_vmmcall,
  438. x86_intercept_stgi,
  439. x86_intercept_clgi,
  440. x86_intercept_skinit,
  441. x86_intercept_rdtscp,
  442. x86_intercept_rdpid,
  443. x86_intercept_icebp,
  444. x86_intercept_wbinvd,
  445. x86_intercept_monitor,
  446. x86_intercept_mwait,
  447. x86_intercept_rdmsr,
  448. x86_intercept_wrmsr,
  449. x86_intercept_in,
  450. x86_intercept_ins,
  451. x86_intercept_out,
  452. x86_intercept_outs,
  453. x86_intercept_xsetbv,
  454. nr_x86_intercepts
  455. };
  456. /* Host execution mode. */
  457. #if defined(CONFIG_X86_32)
  458. #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
  459. #elif defined(CONFIG_X86_64)
  460. #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
  461. #endif
  462. int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type);
  463. bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
  464. #define EMULATION_FAILED -1
  465. #define EMULATION_OK 0
  466. #define EMULATION_RESTART 1
  467. #define EMULATION_INTERCEPTED 2
  468. void init_decode_cache(struct x86_emulate_ctxt *ctxt);
  469. int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
  470. int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
  471. u16 tss_selector, int idt_index, int reason,
  472. bool has_error_code, u32 error_code);
  473. int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
  474. void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
  475. void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
  476. bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
  477. #endif /* _ASM_X86_KVM_X86_EMULATE_H */