vsmp_64.c 3.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * vSMPowered(tm) systems specific initialization
  4. * Copyright (C) 2005 ScaleMP Inc.
  5. *
  6. * Ravikiran Thirumalai <[email protected]>,
  7. * Shai Fultheim <[email protected]>
  8. * Paravirt ops integration: Glauber de Oliveira Costa <[email protected]>,
  9. * Ravikiran Thirumalai <[email protected]>
  10. */
  11. #include <linux/init.h>
  12. #include <linux/pci_ids.h>
  13. #include <linux/pci_regs.h>
  14. #include <linux/smp.h>
  15. #include <linux/irq.h>
  16. #include <asm/apic.h>
  17. #include <asm/pci-direct.h>
  18. #include <asm/io.h>
  19. #include <asm/paravirt.h>
  20. #include <asm/setup.h>
  21. #define TOPOLOGY_REGISTER_OFFSET 0x10
  22. #ifdef CONFIG_PCI
  23. static void __init set_vsmp_ctl(void)
  24. {
  25. void __iomem *address;
  26. unsigned int cap, ctl, cfg;
  27. /* set vSMP magic bits to indicate vSMP capable kernel */
  28. cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
  29. address = early_ioremap(cfg, 8);
  30. cap = readl(address);
  31. ctl = readl(address + 4);
  32. printk(KERN_INFO "vSMP CTL: capabilities:0x%08x control:0x%08x\n",
  33. cap, ctl);
  34. /* If possible, let the vSMP foundation route the interrupt optimally */
  35. #ifdef CONFIG_SMP
  36. if (cap & ctl & BIT(8)) {
  37. ctl &= ~BIT(8);
  38. #ifdef CONFIG_PROC_FS
  39. /* Don't let users change irq affinity via procfs */
  40. no_irq_affinity = 1;
  41. #endif
  42. }
  43. #endif
  44. writel(ctl, address + 4);
  45. ctl = readl(address + 4);
  46. pr_info("vSMP CTL: control set to:0x%08x\n", ctl);
  47. early_iounmap(address, 8);
  48. }
  49. static int is_vsmp = -1;
  50. static void __init detect_vsmp_box(void)
  51. {
  52. is_vsmp = 0;
  53. if (!early_pci_allowed())
  54. return;
  55. /* Check if we are running on a ScaleMP vSMPowered box */
  56. if (read_pci_config(0, 0x1f, 0, PCI_VENDOR_ID) ==
  57. (PCI_VENDOR_ID_SCALEMP | (PCI_DEVICE_ID_SCALEMP_VSMP_CTL << 16)))
  58. is_vsmp = 1;
  59. }
  60. static int is_vsmp_box(void)
  61. {
  62. if (is_vsmp != -1)
  63. return is_vsmp;
  64. else {
  65. WARN_ON_ONCE(1);
  66. return 0;
  67. }
  68. }
  69. #else
  70. static void __init detect_vsmp_box(void)
  71. {
  72. }
  73. static int is_vsmp_box(void)
  74. {
  75. return 0;
  76. }
  77. static void __init set_vsmp_ctl(void)
  78. {
  79. }
  80. #endif
  81. static void __init vsmp_cap_cpus(void)
  82. {
  83. #if !defined(CONFIG_X86_VSMP) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
  84. void __iomem *address;
  85. unsigned int cfg, topology, node_shift, maxcpus;
  86. /*
  87. * CONFIG_X86_VSMP is not configured, so limit the number CPUs to the
  88. * ones present in the first board, unless explicitly overridden by
  89. * setup_max_cpus
  90. */
  91. if (setup_max_cpus != NR_CPUS)
  92. return;
  93. /* Read the vSMP Foundation topology register */
  94. cfg = read_pci_config(0, 0x1f, 0, PCI_BASE_ADDRESS_0);
  95. address = early_ioremap(cfg + TOPOLOGY_REGISTER_OFFSET, 4);
  96. if (WARN_ON(!address))
  97. return;
  98. topology = readl(address);
  99. node_shift = (topology >> 16) & 0x7;
  100. if (!node_shift)
  101. /* The value 0 should be decoded as 8 */
  102. node_shift = 8;
  103. maxcpus = (topology & ((1 << node_shift) - 1)) + 1;
  104. pr_info("vSMP CTL: Capping CPUs to %d (CONFIG_X86_VSMP is unset)\n",
  105. maxcpus);
  106. setup_max_cpus = maxcpus;
  107. early_iounmap(address, 4);
  108. #endif
  109. }
  110. static int apicid_phys_pkg_id(int initial_apic_id, int index_msb)
  111. {
  112. return hard_smp_processor_id() >> index_msb;
  113. }
  114. static void vsmp_apic_post_init(void)
  115. {
  116. /* need to update phys_pkg_id */
  117. apic->phys_pkg_id = apicid_phys_pkg_id;
  118. }
  119. void __init vsmp_init(void)
  120. {
  121. detect_vsmp_box();
  122. if (!is_vsmp_box())
  123. return;
  124. x86_platform.apic_post_init = vsmp_apic_post_init;
  125. vsmp_cap_cpus();
  126. set_vsmp_ctl();
  127. return;
  128. }