head64.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * prepare to run common code
  4. *
  5. * Copyright (C) 2000 Andrea Arcangeli <[email protected]> SuSE
  6. */
  7. #define DISABLE_BRANCH_PROFILING
  8. /* cpu_feature_enabled() cannot be used this early */
  9. #define USE_EARLY_PGTABLE_L5
  10. #include <linux/init.h>
  11. #include <linux/linkage.h>
  12. #include <linux/types.h>
  13. #include <linux/kernel.h>
  14. #include <linux/string.h>
  15. #include <linux/percpu.h>
  16. #include <linux/start_kernel.h>
  17. #include <linux/io.h>
  18. #include <linux/memblock.h>
  19. #include <linux/cc_platform.h>
  20. #include <linux/pgtable.h>
  21. #include <asm/processor.h>
  22. #include <asm/proto.h>
  23. #include <asm/smp.h>
  24. #include <asm/setup.h>
  25. #include <asm/desc.h>
  26. #include <asm/tlbflush.h>
  27. #include <asm/sections.h>
  28. #include <asm/kdebug.h>
  29. #include <asm/e820/api.h>
  30. #include <asm/bios_ebda.h>
  31. #include <asm/bootparam_utils.h>
  32. #include <asm/microcode.h>
  33. #include <asm/kasan.h>
  34. #include <asm/fixmap.h>
  35. #include <asm/realmode.h>
  36. #include <asm/extable.h>
  37. #include <asm/trapnr.h>
  38. #include <asm/sev.h>
  39. #include <asm/tdx.h>
  40. /*
  41. * Manage page tables very early on.
  42. */
  43. extern pmd_t early_dynamic_pgts[EARLY_DYNAMIC_PAGE_TABLES][PTRS_PER_PMD];
  44. static unsigned int __initdata next_early_pgt;
  45. pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL | _PAGE_NX);
  46. #ifdef CONFIG_X86_5LEVEL
  47. unsigned int __pgtable_l5_enabled __ro_after_init;
  48. unsigned int pgdir_shift __ro_after_init = 39;
  49. EXPORT_SYMBOL(pgdir_shift);
  50. unsigned int ptrs_per_p4d __ro_after_init = 1;
  51. EXPORT_SYMBOL(ptrs_per_p4d);
  52. #endif
  53. #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
  54. unsigned long page_offset_base __ro_after_init = __PAGE_OFFSET_BASE_L4;
  55. EXPORT_SYMBOL(page_offset_base);
  56. unsigned long vmalloc_base __ro_after_init = __VMALLOC_BASE_L4;
  57. EXPORT_SYMBOL(vmalloc_base);
  58. unsigned long vmemmap_base __ro_after_init = __VMEMMAP_BASE_L4;
  59. EXPORT_SYMBOL(vmemmap_base);
  60. #endif
  61. /*
  62. * GDT used on the boot CPU before switching to virtual addresses.
  63. */
  64. static struct desc_struct startup_gdt[GDT_ENTRIES] = {
  65. [GDT_ENTRY_KERNEL32_CS] = GDT_ENTRY_INIT(0xc09b, 0, 0xfffff),
  66. [GDT_ENTRY_KERNEL_CS] = GDT_ENTRY_INIT(0xa09b, 0, 0xfffff),
  67. [GDT_ENTRY_KERNEL_DS] = GDT_ENTRY_INIT(0xc093, 0, 0xfffff),
  68. };
  69. /*
  70. * Address needs to be set at runtime because it references the startup_gdt
  71. * while the kernel still uses a direct mapping.
  72. */
  73. static struct desc_ptr startup_gdt_descr = {
  74. .size = sizeof(startup_gdt)-1,
  75. .address = 0,
  76. };
  77. #define __head __section(".head.text")
  78. static void __head *fixup_pointer(void *ptr, unsigned long physaddr)
  79. {
  80. return ptr - (void *)_text + (void *)physaddr;
  81. }
  82. static unsigned long __head *fixup_long(void *ptr, unsigned long physaddr)
  83. {
  84. return fixup_pointer(ptr, physaddr);
  85. }
  86. #ifdef CONFIG_X86_5LEVEL
  87. static unsigned int __head *fixup_int(void *ptr, unsigned long physaddr)
  88. {
  89. return fixup_pointer(ptr, physaddr);
  90. }
  91. static bool __head check_la57_support(unsigned long physaddr)
  92. {
  93. /*
  94. * 5-level paging is detected and enabled at kernel decompression
  95. * stage. Only check if it has been enabled there.
  96. */
  97. if (!(native_read_cr4() & X86_CR4_LA57))
  98. return false;
  99. *fixup_int(&__pgtable_l5_enabled, physaddr) = 1;
  100. *fixup_int(&pgdir_shift, physaddr) = 48;
  101. *fixup_int(&ptrs_per_p4d, physaddr) = 512;
  102. *fixup_long(&page_offset_base, physaddr) = __PAGE_OFFSET_BASE_L5;
  103. *fixup_long(&vmalloc_base, physaddr) = __VMALLOC_BASE_L5;
  104. *fixup_long(&vmemmap_base, physaddr) = __VMEMMAP_BASE_L5;
  105. return true;
  106. }
  107. #else
  108. static bool __head check_la57_support(unsigned long physaddr)
  109. {
  110. return false;
  111. }
  112. #endif
  113. static unsigned long __head sme_postprocess_startup(struct boot_params *bp, pmdval_t *pmd)
  114. {
  115. unsigned long vaddr, vaddr_end;
  116. int i;
  117. /* Encrypt the kernel and related (if SME is active) */
  118. sme_encrypt_kernel(bp);
  119. /*
  120. * Clear the memory encryption mask from the .bss..decrypted section.
  121. * The bss section will be memset to zero later in the initialization so
  122. * there is no need to zero it after changing the memory encryption
  123. * attribute.
  124. */
  125. if (sme_get_me_mask()) {
  126. vaddr = (unsigned long)__start_bss_decrypted;
  127. vaddr_end = (unsigned long)__end_bss_decrypted;
  128. for (; vaddr < vaddr_end; vaddr += PMD_SIZE) {
  129. /*
  130. * On SNP, transition the page to shared in the RMP table so that
  131. * it is consistent with the page table attribute change.
  132. *
  133. * __start_bss_decrypted has a virtual address in the high range
  134. * mapping (kernel .text). PVALIDATE, by way of
  135. * early_snp_set_memory_shared(), requires a valid virtual
  136. * address but the kernel is currently running off of the identity
  137. * mapping so use __pa() to get a *currently* valid virtual address.
  138. */
  139. early_snp_set_memory_shared(__pa(vaddr), __pa(vaddr), PTRS_PER_PMD);
  140. i = pmd_index(vaddr);
  141. pmd[i] -= sme_get_me_mask();
  142. }
  143. }
  144. /*
  145. * Return the SME encryption mask (if SME is active) to be used as a
  146. * modifier for the initial pgdir entry programmed into CR3.
  147. */
  148. return sme_get_me_mask();
  149. }
  150. /* Code in __startup_64() can be relocated during execution, but the compiler
  151. * doesn't have to generate PC-relative relocations when accessing globals from
  152. * that function. Clang actually does not generate them, which leads to
  153. * boot-time crashes. To work around this problem, every global pointer must
  154. * be adjusted using fixup_pointer().
  155. */
  156. unsigned long __head __startup_64(unsigned long physaddr,
  157. struct boot_params *bp)
  158. {
  159. unsigned long load_delta, *p;
  160. unsigned long pgtable_flags;
  161. pgdval_t *pgd;
  162. p4dval_t *p4d;
  163. pudval_t *pud;
  164. pmdval_t *pmd, pmd_entry;
  165. pteval_t *mask_ptr;
  166. bool la57;
  167. int i;
  168. unsigned int *next_pgt_ptr;
  169. la57 = check_la57_support(physaddr);
  170. /* Is the address too large? */
  171. if (physaddr >> MAX_PHYSMEM_BITS)
  172. for (;;);
  173. /*
  174. * Compute the delta between the address I am compiled to run at
  175. * and the address I am actually running at.
  176. */
  177. load_delta = physaddr - (unsigned long)(_text - __START_KERNEL_map);
  178. /* Is the address not 2M aligned? */
  179. if (load_delta & ~PMD_PAGE_MASK)
  180. for (;;);
  181. /* Include the SME encryption mask in the fixup value */
  182. load_delta += sme_get_me_mask();
  183. /* Fixup the physical addresses in the page table */
  184. pgd = fixup_pointer(&early_top_pgt, physaddr);
  185. p = pgd + pgd_index(__START_KERNEL_map);
  186. if (la57)
  187. *p = (unsigned long)level4_kernel_pgt;
  188. else
  189. *p = (unsigned long)level3_kernel_pgt;
  190. *p += _PAGE_TABLE_NOENC - __START_KERNEL_map + load_delta;
  191. if (la57) {
  192. p4d = fixup_pointer(&level4_kernel_pgt, physaddr);
  193. p4d[511] += load_delta;
  194. }
  195. pud = fixup_pointer(&level3_kernel_pgt, physaddr);
  196. pud[510] += load_delta;
  197. pud[511] += load_delta;
  198. pmd = fixup_pointer(level2_fixmap_pgt, physaddr);
  199. for (i = FIXMAP_PMD_TOP; i > FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--)
  200. pmd[i] += load_delta;
  201. /*
  202. * Set up the identity mapping for the switchover. These
  203. * entries should *NOT* have the global bit set! This also
  204. * creates a bunch of nonsense entries but that is fine --
  205. * it avoids problems around wraparound.
  206. */
  207. next_pgt_ptr = fixup_pointer(&next_early_pgt, physaddr);
  208. pud = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
  209. pmd = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++], physaddr);
  210. pgtable_flags = _KERNPG_TABLE_NOENC + sme_get_me_mask();
  211. if (la57) {
  212. p4d = fixup_pointer(early_dynamic_pgts[(*next_pgt_ptr)++],
  213. physaddr);
  214. i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
  215. pgd[i + 0] = (pgdval_t)p4d + pgtable_flags;
  216. pgd[i + 1] = (pgdval_t)p4d + pgtable_flags;
  217. i = physaddr >> P4D_SHIFT;
  218. p4d[(i + 0) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
  219. p4d[(i + 1) % PTRS_PER_P4D] = (pgdval_t)pud + pgtable_flags;
  220. } else {
  221. i = (physaddr >> PGDIR_SHIFT) % PTRS_PER_PGD;
  222. pgd[i + 0] = (pgdval_t)pud + pgtable_flags;
  223. pgd[i + 1] = (pgdval_t)pud + pgtable_flags;
  224. }
  225. i = physaddr >> PUD_SHIFT;
  226. pud[(i + 0) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
  227. pud[(i + 1) % PTRS_PER_PUD] = (pudval_t)pmd + pgtable_flags;
  228. pmd_entry = __PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL;
  229. /* Filter out unsupported __PAGE_KERNEL_* bits: */
  230. mask_ptr = fixup_pointer(&__supported_pte_mask, physaddr);
  231. pmd_entry &= *mask_ptr;
  232. pmd_entry += sme_get_me_mask();
  233. pmd_entry += physaddr;
  234. for (i = 0; i < DIV_ROUND_UP(_end - _text, PMD_SIZE); i++) {
  235. int idx = i + (physaddr >> PMD_SHIFT);
  236. pmd[idx % PTRS_PER_PMD] = pmd_entry + i * PMD_SIZE;
  237. }
  238. /*
  239. * Fixup the kernel text+data virtual addresses. Note that
  240. * we might write invalid pmds, when the kernel is relocated
  241. * cleanup_highmap() fixes this up along with the mappings
  242. * beyond _end.
  243. *
  244. * Only the region occupied by the kernel image has so far
  245. * been checked against the table of usable memory regions
  246. * provided by the firmware, so invalidate pages outside that
  247. * region. A page table entry that maps to a reserved area of
  248. * memory would allow processor speculation into that area,
  249. * and on some hardware (particularly the UV platform) even
  250. * speculative access to some reserved areas is caught as an
  251. * error, causing the BIOS to halt the system.
  252. */
  253. pmd = fixup_pointer(level2_kernel_pgt, physaddr);
  254. /* invalidate pages before the kernel image */
  255. for (i = 0; i < pmd_index((unsigned long)_text); i++)
  256. pmd[i] &= ~_PAGE_PRESENT;
  257. /* fixup pages that are part of the kernel image */
  258. for (; i <= pmd_index((unsigned long)_end); i++)
  259. if (pmd[i] & _PAGE_PRESENT)
  260. pmd[i] += load_delta;
  261. /* invalidate pages after the kernel image */
  262. for (; i < PTRS_PER_PMD; i++)
  263. pmd[i] &= ~_PAGE_PRESENT;
  264. /*
  265. * Fixup phys_base - remove the memory encryption mask to obtain
  266. * the true physical address.
  267. */
  268. *fixup_long(&phys_base, physaddr) += load_delta - sme_get_me_mask();
  269. return sme_postprocess_startup(bp, pmd);
  270. }
  271. /* Wipe all early page tables except for the kernel symbol map */
  272. static void __init reset_early_page_tables(void)
  273. {
  274. memset(early_top_pgt, 0, sizeof(pgd_t)*(PTRS_PER_PGD-1));
  275. next_early_pgt = 0;
  276. write_cr3(__sme_pa_nodebug(early_top_pgt));
  277. }
  278. /* Create a new PMD entry */
  279. bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd)
  280. {
  281. unsigned long physaddr = address - __PAGE_OFFSET;
  282. pgdval_t pgd, *pgd_p;
  283. p4dval_t p4d, *p4d_p;
  284. pudval_t pud, *pud_p;
  285. pmdval_t *pmd_p;
  286. /* Invalid address or early pgt is done ? */
  287. if (physaddr >= MAXMEM || read_cr3_pa() != __pa_nodebug(early_top_pgt))
  288. return false;
  289. again:
  290. pgd_p = &early_top_pgt[pgd_index(address)].pgd;
  291. pgd = *pgd_p;
  292. /*
  293. * The use of __START_KERNEL_map rather than __PAGE_OFFSET here is
  294. * critical -- __PAGE_OFFSET would point us back into the dynamic
  295. * range and we might end up looping forever...
  296. */
  297. if (!pgtable_l5_enabled())
  298. p4d_p = pgd_p;
  299. else if (pgd)
  300. p4d_p = (p4dval_t *)((pgd & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
  301. else {
  302. if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
  303. reset_early_page_tables();
  304. goto again;
  305. }
  306. p4d_p = (p4dval_t *)early_dynamic_pgts[next_early_pgt++];
  307. memset(p4d_p, 0, sizeof(*p4d_p) * PTRS_PER_P4D);
  308. *pgd_p = (pgdval_t)p4d_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
  309. }
  310. p4d_p += p4d_index(address);
  311. p4d = *p4d_p;
  312. if (p4d)
  313. pud_p = (pudval_t *)((p4d & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
  314. else {
  315. if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
  316. reset_early_page_tables();
  317. goto again;
  318. }
  319. pud_p = (pudval_t *)early_dynamic_pgts[next_early_pgt++];
  320. memset(pud_p, 0, sizeof(*pud_p) * PTRS_PER_PUD);
  321. *p4d_p = (p4dval_t)pud_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
  322. }
  323. pud_p += pud_index(address);
  324. pud = *pud_p;
  325. if (pud)
  326. pmd_p = (pmdval_t *)((pud & PTE_PFN_MASK) + __START_KERNEL_map - phys_base);
  327. else {
  328. if (next_early_pgt >= EARLY_DYNAMIC_PAGE_TABLES) {
  329. reset_early_page_tables();
  330. goto again;
  331. }
  332. pmd_p = (pmdval_t *)early_dynamic_pgts[next_early_pgt++];
  333. memset(pmd_p, 0, sizeof(*pmd_p) * PTRS_PER_PMD);
  334. *pud_p = (pudval_t)pmd_p - __START_KERNEL_map + phys_base + _KERNPG_TABLE;
  335. }
  336. pmd_p[pmd_index(address)] = pmd;
  337. return true;
  338. }
  339. static bool __init early_make_pgtable(unsigned long address)
  340. {
  341. unsigned long physaddr = address - __PAGE_OFFSET;
  342. pmdval_t pmd;
  343. pmd = (physaddr & PMD_MASK) + early_pmd_flags;
  344. return __early_make_pgtable(address, pmd);
  345. }
  346. void __init do_early_exception(struct pt_regs *regs, int trapnr)
  347. {
  348. if (trapnr == X86_TRAP_PF &&
  349. early_make_pgtable(native_read_cr2()))
  350. return;
  351. if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT) &&
  352. trapnr == X86_TRAP_VC && handle_vc_boot_ghcb(regs))
  353. return;
  354. if (trapnr == X86_TRAP_VE && tdx_early_handle_ve(regs))
  355. return;
  356. early_fixup_exception(regs, trapnr);
  357. }
  358. /* Don't add a printk in there. printk relies on the PDA which is not initialized
  359. yet. */
  360. void __init clear_bss(void)
  361. {
  362. memset(__bss_start, 0,
  363. (unsigned long) __bss_stop - (unsigned long) __bss_start);
  364. memset(__brk_base, 0,
  365. (unsigned long) __brk_limit - (unsigned long) __brk_base);
  366. }
  367. static unsigned long get_cmd_line_ptr(void)
  368. {
  369. unsigned long cmd_line_ptr = boot_params.hdr.cmd_line_ptr;
  370. cmd_line_ptr |= (u64)boot_params.ext_cmd_line_ptr << 32;
  371. return cmd_line_ptr;
  372. }
  373. static void __init copy_bootdata(char *real_mode_data)
  374. {
  375. char * command_line;
  376. unsigned long cmd_line_ptr;
  377. /*
  378. * If SME is active, this will create decrypted mappings of the
  379. * boot data in advance of the copy operations.
  380. */
  381. sme_map_bootdata(real_mode_data);
  382. memcpy(&boot_params, real_mode_data, sizeof(boot_params));
  383. sanitize_boot_params(&boot_params);
  384. cmd_line_ptr = get_cmd_line_ptr();
  385. if (cmd_line_ptr) {
  386. command_line = __va(cmd_line_ptr);
  387. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  388. }
  389. /*
  390. * The old boot data is no longer needed and won't be reserved,
  391. * freeing up that memory for use by the system. If SME is active,
  392. * we need to remove the mappings that were created so that the
  393. * memory doesn't remain mapped as decrypted.
  394. */
  395. sme_unmap_bootdata(real_mode_data);
  396. }
  397. asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data)
  398. {
  399. /*
  400. * Build-time sanity checks on the kernel image and module
  401. * area mappings. (these are purely build-time and produce no code)
  402. */
  403. BUILD_BUG_ON(MODULES_VADDR < __START_KERNEL_map);
  404. BUILD_BUG_ON(MODULES_VADDR - __START_KERNEL_map < KERNEL_IMAGE_SIZE);
  405. BUILD_BUG_ON(MODULES_LEN + KERNEL_IMAGE_SIZE > 2*PUD_SIZE);
  406. BUILD_BUG_ON((__START_KERNEL_map & ~PMD_MASK) != 0);
  407. BUILD_BUG_ON((MODULES_VADDR & ~PMD_MASK) != 0);
  408. BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL));
  409. MAYBE_BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) ==
  410. (__START_KERNEL & PGDIR_MASK)));
  411. BUILD_BUG_ON(__fix_to_virt(__end_of_fixed_addresses) <= MODULES_END);
  412. cr4_init_shadow();
  413. /* Kill off the identity-map trampoline */
  414. reset_early_page_tables();
  415. clear_bss();
  416. /*
  417. * This needs to happen *before* kasan_early_init() because latter maps stuff
  418. * into that page.
  419. */
  420. clear_page(init_top_pgt);
  421. /*
  422. * SME support may update early_pmd_flags to include the memory
  423. * encryption mask, so it needs to be called before anything
  424. * that may generate a page fault.
  425. */
  426. sme_early_init();
  427. kasan_early_init();
  428. /*
  429. * Flush global TLB entries which could be left over from the trampoline page
  430. * table.
  431. *
  432. * This needs to happen *after* kasan_early_init() as KASAN-enabled .configs
  433. * instrument native_write_cr4() so KASAN must be initialized for that
  434. * instrumentation to work.
  435. */
  436. __native_tlb_flush_global(this_cpu_read(cpu_tlbstate.cr4));
  437. idt_setup_early_handler();
  438. /* Needed before cc_platform_has() can be used for TDX */
  439. tdx_early_init();
  440. copy_bootdata(__va(real_mode_data));
  441. /*
  442. * Load microcode early on BSP.
  443. */
  444. load_ucode_bsp();
  445. /* set init_top_pgt kernel high mapping*/
  446. init_top_pgt[511] = early_top_pgt[511];
  447. x86_64_start_reservations(real_mode_data);
  448. }
  449. void __init x86_64_start_reservations(char *real_mode_data)
  450. {
  451. /* version is always not zero if it is copied */
  452. if (!boot_params.hdr.version)
  453. copy_bootdata(__va(real_mode_data));
  454. x86_early_init_platform_quirks();
  455. switch (boot_params.hdr.hardware_subarch) {
  456. case X86_SUBARCH_INTEL_MID:
  457. x86_intel_mid_early_setup();
  458. break;
  459. default:
  460. break;
  461. }
  462. start_kernel();
  463. }
  464. /*
  465. * Data structures and code used for IDT setup in head_64.S. The bringup-IDT is
  466. * used until the idt_table takes over. On the boot CPU this happens in
  467. * x86_64_start_kernel(), on secondary CPUs in start_secondary(). In both cases
  468. * this happens in the functions called from head_64.S.
  469. *
  470. * The idt_table can't be used that early because all the code modifying it is
  471. * in idt.c and can be instrumented by tracing or KASAN, which both don't work
  472. * during early CPU bringup. Also the idt_table has the runtime vectors
  473. * configured which require certain CPU state to be setup already (like TSS),
  474. * which also hasn't happened yet in early CPU bringup.
  475. */
  476. static gate_desc bringup_idt_table[NUM_EXCEPTION_VECTORS] __page_aligned_data;
  477. static struct desc_ptr bringup_idt_descr = {
  478. .size = (NUM_EXCEPTION_VECTORS * sizeof(gate_desc)) - 1,
  479. .address = 0, /* Set at runtime */
  480. };
  481. static void set_bringup_idt_handler(gate_desc *idt, int n, void *handler)
  482. {
  483. #ifdef CONFIG_AMD_MEM_ENCRYPT
  484. struct idt_data data;
  485. gate_desc desc;
  486. init_idt_data(&data, n, handler);
  487. idt_init_desc(&desc, &data);
  488. native_write_idt_entry(idt, n, &desc);
  489. #endif
  490. }
  491. /* This runs while still in the direct mapping */
  492. static void startup_64_load_idt(unsigned long physbase)
  493. {
  494. struct desc_ptr *desc = fixup_pointer(&bringup_idt_descr, physbase);
  495. gate_desc *idt = fixup_pointer(bringup_idt_table, physbase);
  496. if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) {
  497. void *handler;
  498. /* VMM Communication Exception */
  499. handler = fixup_pointer(vc_no_ghcb, physbase);
  500. set_bringup_idt_handler(idt, X86_TRAP_VC, handler);
  501. }
  502. desc->address = (unsigned long)idt;
  503. native_load_idt(desc);
  504. }
  505. /* This is used when running on kernel addresses */
  506. void early_setup_idt(void)
  507. {
  508. /* VMM Communication Exception */
  509. if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT)) {
  510. setup_ghcb();
  511. set_bringup_idt_handler(bringup_idt_table, X86_TRAP_VC, vc_boot_ghcb);
  512. }
  513. bringup_idt_descr.address = (unsigned long)bringup_idt_table;
  514. native_load_idt(&bringup_idt_descr);
  515. }
  516. /*
  517. * Setup boot CPU state needed before kernel switches to virtual addresses.
  518. */
  519. void __head startup_64_setup_env(unsigned long physbase)
  520. {
  521. /* Load GDT */
  522. startup_gdt_descr.address = (unsigned long)fixup_pointer(startup_gdt, physbase);
  523. native_load_gdt(&startup_gdt_descr);
  524. /* New GDT is live - reload data segment registers */
  525. asm volatile("movl %%eax, %%ds\n"
  526. "movl %%eax, %%ss\n"
  527. "movl %%eax, %%es\n" : : "a"(__KERNEL_DS) : "memory");
  528. startup_64_load_idt(physbase);
  529. }