x86_init.h 11 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _ASM_X86_PLATFORM_H
  3. #define _ASM_X86_PLATFORM_H
  4. #include <asm/bootparam.h>
  5. struct ghcb;
  6. struct mpc_bus;
  7. struct mpc_cpu;
  8. struct pt_regs;
  9. struct mpc_table;
  10. struct cpuinfo_x86;
  11. struct irq_domain;
  12. /**
  13. * struct x86_init_mpparse - platform specific mpparse ops
  14. * @setup_ioapic_ids: platform specific ioapic id override
  15. * @find_smp_config: find the smp configuration
  16. * @get_smp_config: get the smp configuration
  17. */
  18. struct x86_init_mpparse {
  19. void (*setup_ioapic_ids)(void);
  20. void (*find_smp_config)(void);
  21. void (*get_smp_config)(unsigned int early);
  22. };
  23. /**
  24. * struct x86_init_resources - platform specific resource related ops
  25. * @probe_roms: probe BIOS roms
  26. * @reserve_resources: reserve the standard resources for the
  27. * platform
  28. * @memory_setup: platform specific memory setup
  29. *
  30. */
  31. struct x86_init_resources {
  32. void (*probe_roms)(void);
  33. void (*reserve_resources)(void);
  34. char *(*memory_setup)(void);
  35. };
  36. /**
  37. * struct x86_init_irqs - platform specific interrupt setup
  38. * @pre_vector_init: init code to run before interrupt vectors
  39. * are set up.
  40. * @intr_init: interrupt init code
  41. * @intr_mode_select: interrupt delivery mode selection
  42. * @intr_mode_init: interrupt delivery mode setup
  43. * @create_pci_msi_domain: Create the PCI/MSI interrupt domain
  44. */
  45. struct x86_init_irqs {
  46. void (*pre_vector_init)(void);
  47. void (*intr_init)(void);
  48. void (*intr_mode_select)(void);
  49. void (*intr_mode_init)(void);
  50. struct irq_domain *(*create_pci_msi_domain)(void);
  51. };
  52. /**
  53. * struct x86_init_oem - oem platform specific customizing functions
  54. * @arch_setup: platform specific architecture setup
  55. * @banner: print a platform specific banner
  56. */
  57. struct x86_init_oem {
  58. void (*arch_setup)(void);
  59. void (*banner)(void);
  60. };
  61. /**
  62. * struct x86_init_paging - platform specific paging functions
  63. * @pagetable_init: platform specific paging initialization call to setup
  64. * the kernel pagetables and prepare accessors functions.
  65. * Callback must call paging_init(). Called once after the
  66. * direct mapping for phys memory is available.
  67. */
  68. struct x86_init_paging {
  69. void (*pagetable_init)(void);
  70. };
  71. /**
  72. * struct x86_init_timers - platform specific timer setup
  73. * @setup_perpcu_clockev: set up the per cpu clock event device for the
  74. * boot cpu
  75. * @timer_init: initialize the platform timer (default PIT/HPET)
  76. * @wallclock_init: init the wallclock device
  77. */
  78. struct x86_init_timers {
  79. void (*setup_percpu_clockev)(void);
  80. void (*timer_init)(void);
  81. void (*wallclock_init)(void);
  82. };
  83. /**
  84. * struct x86_init_iommu - platform specific iommu setup
  85. * @iommu_init: platform specific iommu setup
  86. */
  87. struct x86_init_iommu {
  88. int (*iommu_init)(void);
  89. };
  90. /**
  91. * struct x86_init_pci - platform specific pci init functions
  92. * @arch_init: platform specific pci arch init call
  93. * @init: platform specific pci subsystem init
  94. * @init_irq: platform specific pci irq init
  95. * @fixup_irqs: platform specific pci irq fixup
  96. */
  97. struct x86_init_pci {
  98. int (*arch_init)(void);
  99. int (*init)(void);
  100. void (*init_irq)(void);
  101. void (*fixup_irqs)(void);
  102. };
  103. /**
  104. * struct x86_hyper_init - x86 hypervisor init functions
  105. * @init_platform: platform setup
  106. * @guest_late_init: guest late init
  107. * @x2apic_available: X2APIC detection
  108. * @msi_ext_dest_id: MSI supports 15-bit APIC IDs
  109. * @init_mem_mapping: setup early mappings during init_mem_mapping()
  110. * @init_after_bootmem: guest init after boot allocator is finished
  111. */
  112. struct x86_hyper_init {
  113. void (*init_platform)(void);
  114. void (*guest_late_init)(void);
  115. bool (*x2apic_available)(void);
  116. bool (*msi_ext_dest_id)(void);
  117. void (*init_mem_mapping)(void);
  118. void (*init_after_bootmem)(void);
  119. };
  120. /**
  121. * struct x86_init_acpi - x86 ACPI init functions
  122. * @set_root_poitner: set RSDP address
  123. * @get_root_pointer: get RSDP address
  124. * @reduced_hw_early_init: hardware reduced platform early init
  125. */
  126. struct x86_init_acpi {
  127. void (*set_root_pointer)(u64 addr);
  128. u64 (*get_root_pointer)(void);
  129. void (*reduced_hw_early_init)(void);
  130. };
  131. /**
  132. * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc.
  133. *
  134. * @enc_status_change_prepare Notify HV before the encryption status of a range is changed
  135. * @enc_status_change_finish Notify HV after the encryption status of a range is changed
  136. * @enc_tlb_flush_required Returns true if a TLB flush is needed before changing page encryption status
  137. * @enc_cache_flush_required Returns true if a cache flush is needed before changing page encryption status
  138. */
  139. struct x86_guest {
  140. bool (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc);
  141. bool (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc);
  142. bool (*enc_tlb_flush_required)(bool enc);
  143. bool (*enc_cache_flush_required)(void);
  144. };
  145. /**
  146. * struct x86_init_ops - functions for platform specific setup
  147. *
  148. */
  149. struct x86_init_ops {
  150. struct x86_init_resources resources;
  151. struct x86_init_mpparse mpparse;
  152. struct x86_init_irqs irqs;
  153. struct x86_init_oem oem;
  154. struct x86_init_paging paging;
  155. struct x86_init_timers timers;
  156. struct x86_init_iommu iommu;
  157. struct x86_init_pci pci;
  158. struct x86_hyper_init hyper;
  159. struct x86_init_acpi acpi;
  160. };
  161. /**
  162. * struct x86_cpuinit_ops - platform specific cpu hotplug setups
  163. * @setup_percpu_clockev: set up the per cpu clock event device
  164. * @early_percpu_clock_init: early init of the per cpu clock event device
  165. */
  166. struct x86_cpuinit_ops {
  167. void (*setup_percpu_clockev)(void);
  168. void (*early_percpu_clock_init)(void);
  169. void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
  170. };
  171. struct timespec64;
  172. /**
  173. * struct x86_legacy_devices - legacy x86 devices
  174. *
  175. * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
  176. * is known to never have a PNPBIOS.
  177. *
  178. * These are devices known to require LPC or ISA bus. The definition of legacy
  179. * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
  180. * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
  181. * the LPC or ISA bus. User visible devices are devices that have end-user
  182. * accessible connectors (for example, LPT parallel port). Legacy devices on
  183. * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
  184. * / mouse, and the floppy disk controller. A system that lacks all known
  185. * legacy devices can assume all devices can be detected exclusively via
  186. * standard device enumeration mechanisms including the ACPI namespace.
  187. *
  188. * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
  189. * have any of the legacy devices enumerated below present.
  190. */
  191. struct x86_legacy_devices {
  192. int pnpbios;
  193. };
  194. /**
  195. * enum x86_legacy_i8042_state - i8042 keyboard controller state
  196. * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
  197. * given platform/subarch.
  198. * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
  199. * is absent.
  200. * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
  201. * present, the i8042 driver should probe for controller existence.
  202. */
  203. enum x86_legacy_i8042_state {
  204. X86_LEGACY_I8042_PLATFORM_ABSENT,
  205. X86_LEGACY_I8042_FIRMWARE_ABSENT,
  206. X86_LEGACY_I8042_EXPECTED_PRESENT,
  207. };
  208. /**
  209. * struct x86_legacy_features - legacy x86 features
  210. *
  211. * @i8042: indicated if we expect the device to have i8042 controller
  212. * present.
  213. * @rtc: this device has a CMOS real-time clock present
  214. * @reserve_bios_regions: boot code will search for the EBDA address and the
  215. * start of the 640k - 1M BIOS region. If false, the platform must
  216. * ensure that its memory map correctly reserves sub-1MB regions as needed.
  217. * @devices: legacy x86 devices, refer to struct x86_legacy_devices
  218. * documentation for further details.
  219. */
  220. struct x86_legacy_features {
  221. enum x86_legacy_i8042_state i8042;
  222. int rtc;
  223. int warm_reset;
  224. int no_vga;
  225. int reserve_bios_regions;
  226. struct x86_legacy_devices devices;
  227. };
  228. /**
  229. * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
  230. *
  231. * @pin_vcpu: pin current vcpu to specified physical
  232. * cpu (run rarely)
  233. * @sev_es_hcall_prepare: Load additional hypervisor-specific
  234. * state into the GHCB when doing a VMMCALL under
  235. * SEV-ES. Called from the #VC exception handler.
  236. * @sev_es_hcall_finish: Copies state from the GHCB back into the
  237. * processor (or pt_regs). Also runs checks on the
  238. * state returned from the hypervisor after a
  239. * VMMCALL under SEV-ES. Needs to return 'false'
  240. * if the checks fail. Called from the #VC
  241. * exception handler.
  242. */
  243. struct x86_hyper_runtime {
  244. void (*pin_vcpu)(int cpu);
  245. void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs);
  246. bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs);
  247. };
  248. /**
  249. * struct x86_platform_ops - platform specific runtime functions
  250. * @calibrate_cpu: calibrate CPU
  251. * @calibrate_tsc: calibrate TSC, if different from CPU
  252. * @get_wallclock: get time from HW clock like RTC etc.
  253. * @set_wallclock: set time back to HW clock
  254. * @is_untracked_pat_range exclude from PAT logic
  255. * @nmi_init enable NMI on cpus
  256. * @save_sched_clock_state: save state for sched_clock() on suspend
  257. * @restore_sched_clock_state: restore state for sched_clock() on resume
  258. * @apic_post_init: adjust apic if needed
  259. * @legacy: legacy features
  260. * @set_legacy_features: override legacy features. Use of this callback
  261. * is highly discouraged. You should only need
  262. * this if your hardware platform requires further
  263. * custom fine tuning far beyond what may be
  264. * possible in x86_early_init_platform_quirks() by
  265. * only using the current x86_hardware_subarch
  266. * semantics.
  267. * @realmode_reserve: reserve memory for realmode trampoline
  268. * @realmode_init: initialize realmode trampoline
  269. * @hyper: x86 hypervisor specific runtime callbacks
  270. */
  271. struct x86_platform_ops {
  272. unsigned long (*calibrate_cpu)(void);
  273. unsigned long (*calibrate_tsc)(void);
  274. void (*get_wallclock)(struct timespec64 *ts);
  275. int (*set_wallclock)(const struct timespec64 *ts);
  276. void (*iommu_shutdown)(void);
  277. bool (*is_untracked_pat_range)(u64 start, u64 end);
  278. void (*nmi_init)(void);
  279. unsigned char (*get_nmi_reason)(void);
  280. void (*save_sched_clock_state)(void);
  281. void (*restore_sched_clock_state)(void);
  282. void (*apic_post_init)(void);
  283. struct x86_legacy_features legacy;
  284. void (*set_legacy_features)(void);
  285. void (*realmode_reserve)(void);
  286. void (*realmode_init)(void);
  287. struct x86_hyper_runtime hyper;
  288. struct x86_guest guest;
  289. };
  290. struct x86_apic_ops {
  291. unsigned int (*io_apic_read) (unsigned int apic, unsigned int reg);
  292. void (*restore)(void);
  293. };
  294. extern struct x86_init_ops x86_init;
  295. extern struct x86_cpuinit_ops x86_cpuinit;
  296. extern struct x86_platform_ops x86_platform;
  297. extern struct x86_msi_ops x86_msi;
  298. extern struct x86_apic_ops x86_apic_ops;
  299. extern void x86_early_init_platform_quirks(void);
  300. extern void x86_init_noop(void);
  301. extern void x86_init_uint_noop(unsigned int unused);
  302. extern bool bool_x86_init_noop(void);
  303. extern void x86_op_int_noop(int cpu);
  304. extern bool x86_pnpbios_disabled(void);
  305. #endif