intel_pt.h 1.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _ASM_X86_INTEL_PT_H
  3. #define _ASM_X86_INTEL_PT_H
  4. #define PT_CPUID_LEAVES 2
  5. #define PT_CPUID_REGS_NUM 4 /* number of registers (eax, ebx, ecx, edx) */
  6. enum pt_capabilities {
  7. PT_CAP_max_subleaf = 0,
  8. PT_CAP_cr3_filtering,
  9. PT_CAP_psb_cyc,
  10. PT_CAP_ip_filtering,
  11. PT_CAP_mtc,
  12. PT_CAP_ptwrite,
  13. PT_CAP_power_event_trace,
  14. PT_CAP_event_trace,
  15. PT_CAP_tnt_disable,
  16. PT_CAP_topa_output,
  17. PT_CAP_topa_multiple_entries,
  18. PT_CAP_single_range_output,
  19. PT_CAP_output_subsys,
  20. PT_CAP_payloads_lip,
  21. PT_CAP_num_address_ranges,
  22. PT_CAP_mtc_periods,
  23. PT_CAP_cycle_thresholds,
  24. PT_CAP_psb_periods,
  25. };
  26. #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_INTEL)
  27. void cpu_emergency_stop_pt(void);
  28. extern u32 intel_pt_validate_hw_cap(enum pt_capabilities cap);
  29. extern u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities cap);
  30. extern int is_intel_pt_event(struct perf_event *event);
  31. #else
  32. static inline void cpu_emergency_stop_pt(void) {}
  33. static inline u32 intel_pt_validate_hw_cap(enum pt_capabilities cap) { return 0; }
  34. static inline u32 intel_pt_validate_cap(u32 *caps, enum pt_capabilities capability) { return 0; }
  35. static inline int is_intel_pt_event(struct perf_event *event) { return 0; }
  36. #endif
  37. #endif /* _ASM_X86_INTEL_PT_H */