intel-mid.h 1.1 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Intel MID specific setup code
  4. *
  5. * (C) Copyright 2009, 2021 Intel Corporation
  6. */
  7. #ifndef _ASM_X86_INTEL_MID_H
  8. #define _ASM_X86_INTEL_MID_H
  9. #include <linux/pci.h>
  10. extern int intel_mid_pci_init(void);
  11. extern int intel_mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state);
  12. extern pci_power_t intel_mid_pci_get_power_state(struct pci_dev *pdev);
  13. extern void intel_mid_pwr_power_off(void);
  14. #define INTEL_MID_PWR_LSS_OFFSET 4
  15. #define INTEL_MID_PWR_LSS_TYPE (1 << 7)
  16. extern int intel_mid_pwr_get_lss_id(struct pci_dev *pdev);
  17. #ifdef CONFIG_X86_INTEL_MID
  18. extern void intel_scu_devices_create(void);
  19. extern void intel_scu_devices_destroy(void);
  20. #else /* !CONFIG_X86_INTEL_MID */
  21. static inline void intel_scu_devices_create(void) { }
  22. static inline void intel_scu_devices_destroy(void) { }
  23. #endif /* !CONFIG_X86_INTEL_MID */
  24. /* Bus Select SoC Fuse value */
  25. #define BSEL_SOC_FUSE_MASK 0x7
  26. /* FSB 133MHz */
  27. #define BSEL_SOC_FUSE_001 0x1
  28. /* FSB 100MHz */
  29. #define BSEL_SOC_FUSE_101 0x5
  30. /* FSB 83MHz */
  31. #define BSEL_SOC_FUSE_111 0x7
  32. #endif /* _ASM_X86_INTEL_MID_H */