insn.h 7.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. #ifndef _ASM_X86_INSN_H
  3. #define _ASM_X86_INSN_H
  4. /*
  5. * x86 instruction analysis
  6. *
  7. * Copyright (C) IBM Corporation, 2009
  8. */
  9. #include <asm/byteorder.h>
  10. /* insn_attr_t is defined in inat.h */
  11. #include <asm/inat.h> /* __ignore_sync_check__ */
  12. #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)
  13. struct insn_field {
  14. union {
  15. insn_value_t value;
  16. insn_byte_t bytes[4];
  17. };
  18. /* !0 if we've run insn_get_xxx() for this field */
  19. unsigned char got;
  20. unsigned char nbytes;
  21. };
  22. static inline void insn_field_set(struct insn_field *p, insn_value_t v,
  23. unsigned char n)
  24. {
  25. p->value = v;
  26. p->nbytes = n;
  27. }
  28. static inline void insn_set_byte(struct insn_field *p, unsigned char n,
  29. insn_byte_t v)
  30. {
  31. p->bytes[n] = v;
  32. }
  33. #else
  34. struct insn_field {
  35. insn_value_t value;
  36. union {
  37. insn_value_t little;
  38. insn_byte_t bytes[4];
  39. };
  40. /* !0 if we've run insn_get_xxx() for this field */
  41. unsigned char got;
  42. unsigned char nbytes;
  43. };
  44. static inline void insn_field_set(struct insn_field *p, insn_value_t v,
  45. unsigned char n)
  46. {
  47. p->value = v;
  48. p->little = __cpu_to_le32(v);
  49. p->nbytes = n;
  50. }
  51. static inline void insn_set_byte(struct insn_field *p, unsigned char n,
  52. insn_byte_t v)
  53. {
  54. p->bytes[n] = v;
  55. p->value = __le32_to_cpu(p->little);
  56. }
  57. #endif
  58. struct insn {
  59. struct insn_field prefixes; /*
  60. * Prefixes
  61. * prefixes.bytes[3]: last prefix
  62. */
  63. struct insn_field rex_prefix; /* REX prefix */
  64. struct insn_field vex_prefix; /* VEX prefix */
  65. struct insn_field opcode; /*
  66. * opcode.bytes[0]: opcode1
  67. * opcode.bytes[1]: opcode2
  68. * opcode.bytes[2]: opcode3
  69. */
  70. struct insn_field modrm;
  71. struct insn_field sib;
  72. struct insn_field displacement;
  73. union {
  74. struct insn_field immediate;
  75. struct insn_field moffset1; /* for 64bit MOV */
  76. struct insn_field immediate1; /* for 64bit imm or off16/32 */
  77. };
  78. union {
  79. struct insn_field moffset2; /* for 64bit MOV */
  80. struct insn_field immediate2; /* for 64bit imm or seg16 */
  81. };
  82. int emulate_prefix_size;
  83. insn_attr_t attr;
  84. unsigned char opnd_bytes;
  85. unsigned char addr_bytes;
  86. unsigned char length;
  87. unsigned char x86_64;
  88. const insn_byte_t *kaddr; /* kernel address of insn to analyze */
  89. const insn_byte_t *end_kaddr; /* kernel address of last insn in buffer */
  90. const insn_byte_t *next_byte;
  91. };
  92. #define MAX_INSN_SIZE 15
  93. #define X86_MODRM_MOD(modrm) (((modrm) & 0xc0) >> 6)
  94. #define X86_MODRM_REG(modrm) (((modrm) & 0x38) >> 3)
  95. #define X86_MODRM_RM(modrm) ((modrm) & 0x07)
  96. #define X86_SIB_SCALE(sib) (((sib) & 0xc0) >> 6)
  97. #define X86_SIB_INDEX(sib) (((sib) & 0x38) >> 3)
  98. #define X86_SIB_BASE(sib) ((sib) & 0x07)
  99. #define X86_REX_W(rex) ((rex) & 8)
  100. #define X86_REX_R(rex) ((rex) & 4)
  101. #define X86_REX_X(rex) ((rex) & 2)
  102. #define X86_REX_B(rex) ((rex) & 1)
  103. /* VEX bit flags */
  104. #define X86_VEX_W(vex) ((vex) & 0x80) /* VEX3 Byte2 */
  105. #define X86_VEX_R(vex) ((vex) & 0x80) /* VEX2/3 Byte1 */
  106. #define X86_VEX_X(vex) ((vex) & 0x40) /* VEX3 Byte1 */
  107. #define X86_VEX_B(vex) ((vex) & 0x20) /* VEX3 Byte1 */
  108. #define X86_VEX_L(vex) ((vex) & 0x04) /* VEX3 Byte2, VEX2 Byte1 */
  109. /* VEX bit fields */
  110. #define X86_EVEX_M(vex) ((vex) & 0x07) /* EVEX Byte1 */
  111. #define X86_VEX3_M(vex) ((vex) & 0x1f) /* VEX3 Byte1 */
  112. #define X86_VEX2_M 1 /* VEX2.M always 1 */
  113. #define X86_VEX_V(vex) (((vex) & 0x78) >> 3) /* VEX3 Byte2, VEX2 Byte1 */
  114. #define X86_VEX_P(vex) ((vex) & 0x03) /* VEX3 Byte2, VEX2 Byte1 */
  115. #define X86_VEX_M_MAX 0x1f /* VEX3.M Maximum value */
  116. extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);
  117. extern int insn_get_prefixes(struct insn *insn);
  118. extern int insn_get_opcode(struct insn *insn);
  119. extern int insn_get_modrm(struct insn *insn);
  120. extern int insn_get_sib(struct insn *insn);
  121. extern int insn_get_displacement(struct insn *insn);
  122. extern int insn_get_immediate(struct insn *insn);
  123. extern int insn_get_length(struct insn *insn);
  124. enum insn_mode {
  125. INSN_MODE_32,
  126. INSN_MODE_64,
  127. /* Mode is determined by the current kernel build. */
  128. INSN_MODE_KERN,
  129. INSN_NUM_MODES,
  130. };
  131. extern int insn_decode(struct insn *insn, const void *kaddr, int buf_len, enum insn_mode m);
  132. #define insn_decode_kernel(_insn, _ptr) insn_decode((_insn), (_ptr), MAX_INSN_SIZE, INSN_MODE_KERN)
  133. /* Attribute will be determined after getting ModRM (for opcode groups) */
  134. static inline void insn_get_attribute(struct insn *insn)
  135. {
  136. insn_get_modrm(insn);
  137. }
  138. /* Instruction uses RIP-relative addressing */
  139. extern int insn_rip_relative(struct insn *insn);
  140. static inline int insn_is_avx(struct insn *insn)
  141. {
  142. if (!insn->prefixes.got)
  143. insn_get_prefixes(insn);
  144. return (insn->vex_prefix.value != 0);
  145. }
  146. static inline int insn_is_evex(struct insn *insn)
  147. {
  148. if (!insn->prefixes.got)
  149. insn_get_prefixes(insn);
  150. return (insn->vex_prefix.nbytes == 4);
  151. }
  152. static inline int insn_has_emulate_prefix(struct insn *insn)
  153. {
  154. return !!insn->emulate_prefix_size;
  155. }
  156. static inline insn_byte_t insn_vex_m_bits(struct insn *insn)
  157. {
  158. if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */
  159. return X86_VEX2_M;
  160. else if (insn->vex_prefix.nbytes == 3) /* 3 bytes VEX */
  161. return X86_VEX3_M(insn->vex_prefix.bytes[1]);
  162. else /* EVEX */
  163. return X86_EVEX_M(insn->vex_prefix.bytes[1]);
  164. }
  165. static inline insn_byte_t insn_vex_p_bits(struct insn *insn)
  166. {
  167. if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */
  168. return X86_VEX_P(insn->vex_prefix.bytes[1]);
  169. else
  170. return X86_VEX_P(insn->vex_prefix.bytes[2]);
  171. }
  172. /* Get the last prefix id from last prefix or VEX prefix */
  173. static inline int insn_last_prefix_id(struct insn *insn)
  174. {
  175. if (insn_is_avx(insn))
  176. return insn_vex_p_bits(insn); /* VEX_p is a SIMD prefix id */
  177. if (insn->prefixes.bytes[3])
  178. return inat_get_last_prefix_id(insn->prefixes.bytes[3]);
  179. return 0;
  180. }
  181. /* Offset of each field from kaddr */
  182. static inline int insn_offset_rex_prefix(struct insn *insn)
  183. {
  184. return insn->prefixes.nbytes;
  185. }
  186. static inline int insn_offset_vex_prefix(struct insn *insn)
  187. {
  188. return insn_offset_rex_prefix(insn) + insn->rex_prefix.nbytes;
  189. }
  190. static inline int insn_offset_opcode(struct insn *insn)
  191. {
  192. return insn_offset_vex_prefix(insn) + insn->vex_prefix.nbytes;
  193. }
  194. static inline int insn_offset_modrm(struct insn *insn)
  195. {
  196. return insn_offset_opcode(insn) + insn->opcode.nbytes;
  197. }
  198. static inline int insn_offset_sib(struct insn *insn)
  199. {
  200. return insn_offset_modrm(insn) + insn->modrm.nbytes;
  201. }
  202. static inline int insn_offset_displacement(struct insn *insn)
  203. {
  204. return insn_offset_sib(insn) + insn->sib.nbytes;
  205. }
  206. static inline int insn_offset_immediate(struct insn *insn)
  207. {
  208. return insn_offset_displacement(insn) + insn->displacement.nbytes;
  209. }
  210. /**
  211. * for_each_insn_prefix() -- Iterate prefixes in the instruction
  212. * @insn: Pointer to struct insn.
  213. * @idx: Index storage.
  214. * @prefix: Prefix byte.
  215. *
  216. * Iterate prefix bytes of given @insn. Each prefix byte is stored in @prefix
  217. * and the index is stored in @idx (note that this @idx is just for a cursor,
  218. * do not change it.)
  219. * Since prefixes.nbytes can be bigger than 4 if some prefixes
  220. * are repeated, it cannot be used for looping over the prefixes.
  221. */
  222. #define for_each_insn_prefix(insn, idx, prefix) \
  223. for (idx = 0; idx < ARRAY_SIZE(insn->prefixes.bytes) && (prefix = insn->prefixes.bytes[idx]) != 0; idx++)
  224. #define POP_SS_OPCODE 0x1f
  225. #define MOV_SREG_OPCODE 0x8e
  226. /*
  227. * Intel SDM Vol.3A 6.8.3 states;
  228. * "Any single-step trap that would be delivered following the MOV to SS
  229. * instruction or POP to SS instruction (because EFLAGS.TF is 1) is
  230. * suppressed."
  231. * This function returns true if @insn is MOV SS or POP SS. On these
  232. * instructions, single stepping is suppressed.
  233. */
  234. static inline int insn_masking_exception(struct insn *insn)
  235. {
  236. return insn->opcode.bytes[0] == POP_SS_OPCODE ||
  237. (insn->opcode.bytes[0] == MOV_SREG_OPCODE &&
  238. X86_MODRM_REG(insn->modrm.bytes[0]) == 2);
  239. }
  240. #endif /* _ASM_X86_INSN_H */