cpuflags.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/types.h>
  3. #include "bitops.h"
  4. #include <asm/processor-flags.h>
  5. #include <asm/required-features.h>
  6. #include <asm/msr-index.h>
  7. #include "cpuflags.h"
  8. struct cpu_features cpu;
  9. u32 cpu_vendor[3];
  10. static bool loaded_flags;
  11. static int has_fpu(void)
  12. {
  13. u16 fcw = -1, fsw = -1;
  14. unsigned long cr0;
  15. asm volatile("mov %%cr0,%0" : "=r" (cr0));
  16. if (cr0 & (X86_CR0_EM|X86_CR0_TS)) {
  17. cr0 &= ~(X86_CR0_EM|X86_CR0_TS);
  18. asm volatile("mov %0,%%cr0" : : "r" (cr0));
  19. }
  20. asm volatile("fninit ; fnstsw %0 ; fnstcw %1"
  21. : "+m" (fsw), "+m" (fcw));
  22. return fsw == 0 && (fcw & 0x103f) == 0x003f;
  23. }
  24. /*
  25. * For building the 16-bit code we want to explicitly specify 32-bit
  26. * push/pop operations, rather than just saying 'pushf' or 'popf' and
  27. * letting the compiler choose. But this is also included from the
  28. * compressed/ directory where it may be 64-bit code, and thus needs
  29. * to be 'pushfq' or 'popfq' in that case.
  30. */
  31. #ifdef __x86_64__
  32. #define PUSHF "pushfq"
  33. #define POPF "popfq"
  34. #else
  35. #define PUSHF "pushfl"
  36. #define POPF "popfl"
  37. #endif
  38. int has_eflag(unsigned long mask)
  39. {
  40. unsigned long f0, f1;
  41. asm volatile(PUSHF " \n\t"
  42. PUSHF " \n\t"
  43. "pop %0 \n\t"
  44. "mov %0,%1 \n\t"
  45. "xor %2,%1 \n\t"
  46. "push %1 \n\t"
  47. POPF " \n\t"
  48. PUSHF " \n\t"
  49. "pop %1 \n\t"
  50. POPF
  51. : "=&r" (f0), "=&r" (f1)
  52. : "ri" (mask));
  53. return !!((f0^f1) & mask);
  54. }
  55. /* Handle x86_32 PIC using ebx. */
  56. #if defined(__i386__) && defined(__PIC__)
  57. # define EBX_REG "=r"
  58. #else
  59. # define EBX_REG "=b"
  60. #endif
  61. void cpuid_count(u32 id, u32 count, u32 *a, u32 *b, u32 *c, u32 *d)
  62. {
  63. asm volatile(".ifnc %%ebx,%3 ; movl %%ebx,%3 ; .endif \n\t"
  64. "cpuid \n\t"
  65. ".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif \n\t"
  66. : "=a" (*a), "=c" (*c), "=d" (*d), EBX_REG (*b)
  67. : "a" (id), "c" (count)
  68. );
  69. }
  70. #define cpuid(id, a, b, c, d) cpuid_count(id, 0, a, b, c, d)
  71. void get_cpuflags(void)
  72. {
  73. u32 max_intel_level, max_amd_level;
  74. u32 tfms;
  75. u32 ignored;
  76. if (loaded_flags)
  77. return;
  78. loaded_flags = true;
  79. if (has_fpu())
  80. set_bit(X86_FEATURE_FPU, cpu.flags);
  81. if (has_eflag(X86_EFLAGS_ID)) {
  82. cpuid(0x0, &max_intel_level, &cpu_vendor[0], &cpu_vendor[2],
  83. &cpu_vendor[1]);
  84. if (max_intel_level >= 0x00000001 &&
  85. max_intel_level <= 0x0000ffff) {
  86. cpuid(0x1, &tfms, &ignored, &cpu.flags[4],
  87. &cpu.flags[0]);
  88. cpu.level = (tfms >> 8) & 15;
  89. cpu.family = cpu.level;
  90. cpu.model = (tfms >> 4) & 15;
  91. if (cpu.level >= 6)
  92. cpu.model += ((tfms >> 16) & 0xf) << 4;
  93. }
  94. if (max_intel_level >= 0x00000007) {
  95. cpuid_count(0x00000007, 0, &ignored, &ignored,
  96. &cpu.flags[16], &ignored);
  97. }
  98. cpuid(0x80000000, &max_amd_level, &ignored, &ignored,
  99. &ignored);
  100. if (max_amd_level >= 0x80000001 &&
  101. max_amd_level <= 0x8000ffff) {
  102. cpuid(0x80000001, &ignored, &ignored, &cpu.flags[6],
  103. &cpu.flags[1]);
  104. }
  105. }
  106. }