idt_64.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. #include <asm/trap_pf.h>
  3. #include <asm/segment.h>
  4. #include <asm/trapnr.h>
  5. #include "misc.h"
  6. static void set_idt_entry(int vector, void (*handler)(void))
  7. {
  8. unsigned long address = (unsigned long)handler;
  9. gate_desc entry;
  10. memset(&entry, 0, sizeof(entry));
  11. entry.offset_low = (u16)(address & 0xffff);
  12. entry.segment = __KERNEL_CS;
  13. entry.bits.type = GATE_TRAP;
  14. entry.bits.p = 1;
  15. entry.offset_middle = (u16)((address >> 16) & 0xffff);
  16. entry.offset_high = (u32)(address >> 32);
  17. memcpy(&boot_idt[vector], &entry, sizeof(entry));
  18. }
  19. /* Have this here so we don't need to include <asm/desc.h> */
  20. static void load_boot_idt(const struct desc_ptr *dtr)
  21. {
  22. asm volatile("lidt %0"::"m" (*dtr));
  23. }
  24. /* Setup IDT before kernel jumping to .Lrelocated */
  25. void load_stage1_idt(void)
  26. {
  27. boot_idt_desc.address = (unsigned long)boot_idt;
  28. if (IS_ENABLED(CONFIG_AMD_MEM_ENCRYPT))
  29. set_idt_entry(X86_TRAP_VC, boot_stage1_vc);
  30. load_boot_idt(&boot_idt_desc);
  31. }
  32. /*
  33. * Setup IDT after kernel jumping to .Lrelocated.
  34. *
  35. * initialize_identity_maps() needs a #PF handler to be setup
  36. * in order to be able to fault-in identity mapping ranges; see
  37. * do_boot_page_fault().
  38. *
  39. * This #PF handler setup needs to happen in load_stage2_idt() where the
  40. * IDT is loaded and there the #VC IDT entry gets setup too.
  41. *
  42. * In order to be able to handle #VCs, one needs a GHCB which
  43. * gets setup with an already set up pagetable, which is done in
  44. * initialize_identity_maps(). And there's the catch 22: the boot #VC
  45. * handler do_boot_stage2_vc() needs to call early_setup_ghcb() itself
  46. * (and, especially set_page_decrypted()) because the SEV-ES setup code
  47. * cannot initialize a GHCB as there's no #PF handler yet...
  48. */
  49. void load_stage2_idt(void)
  50. {
  51. boot_idt_desc.address = (unsigned long)boot_idt;
  52. set_idt_entry(X86_TRAP_PF, boot_page_fault);
  53. #ifdef CONFIG_AMD_MEM_ENCRYPT
  54. /*
  55. * Clear the second stage #VC handler in case guest types
  56. * needing #VC have not been detected.
  57. */
  58. if (sev_status & BIT(1))
  59. set_idt_entry(X86_TRAP_VC, boot_stage2_vc);
  60. else
  61. set_idt_entry(X86_TRAP_VC, NULL);
  62. #endif
  63. load_boot_idt(&boot_idt_desc);
  64. }
  65. void cleanup_exception_handling(void)
  66. {
  67. /*
  68. * Flush GHCB from cache and map it encrypted again when running as
  69. * SEV-ES guest.
  70. */
  71. sev_es_shutdown_ghcb();
  72. /* Set a null-idt, disabling #PF and #VC handling */
  73. boot_idt_desc.size = 0;
  74. boot_idt_desc.address = 0;
  75. load_boot_idt(&boot_idt_desc);
  76. }