a20.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* -*- linux-c -*- ------------------------------------------------------- *
  3. *
  4. * Copyright (C) 1991, 1992 Linus Torvalds
  5. * Copyright 2007-2008 rPath, Inc. - All Rights Reserved
  6. * Copyright 2009 Intel Corporation; author H. Peter Anvin
  7. *
  8. * ----------------------------------------------------------------------- */
  9. /*
  10. * Enable A20 gate (return -1 on failure)
  11. */
  12. #include "boot.h"
  13. #define MAX_8042_LOOPS 100000
  14. #define MAX_8042_FF 32
  15. static int empty_8042(void)
  16. {
  17. u8 status;
  18. int loops = MAX_8042_LOOPS;
  19. int ffs = MAX_8042_FF;
  20. while (loops--) {
  21. io_delay();
  22. status = inb(0x64);
  23. if (status == 0xff) {
  24. /* FF is a plausible, but very unlikely status */
  25. if (!--ffs)
  26. return -1; /* Assume no KBC present */
  27. }
  28. if (status & 1) {
  29. /* Read and discard input data */
  30. io_delay();
  31. (void)inb(0x60);
  32. } else if (!(status & 2)) {
  33. /* Buffers empty, finished! */
  34. return 0;
  35. }
  36. }
  37. return -1;
  38. }
  39. /* Returns nonzero if the A20 line is enabled. The memory address
  40. used as a test is the int $0x80 vector, which should be safe. */
  41. #define A20_TEST_ADDR (4*0x80)
  42. #define A20_TEST_SHORT 32
  43. #define A20_TEST_LONG 2097152 /* 2^21 */
  44. static int a20_test(int loops)
  45. {
  46. int ok = 0;
  47. int saved, ctr;
  48. set_fs(0x0000);
  49. set_gs(0xffff);
  50. saved = ctr = rdfs32(A20_TEST_ADDR);
  51. while (loops--) {
  52. wrfs32(++ctr, A20_TEST_ADDR);
  53. io_delay(); /* Serialize and make delay constant */
  54. ok = rdgs32(A20_TEST_ADDR+0x10) ^ ctr;
  55. if (ok)
  56. break;
  57. }
  58. wrfs32(saved, A20_TEST_ADDR);
  59. return ok;
  60. }
  61. /* Quick test to see if A20 is already enabled */
  62. static int a20_test_short(void)
  63. {
  64. return a20_test(A20_TEST_SHORT);
  65. }
  66. /* Longer test that actually waits for A20 to come on line; this
  67. is useful when dealing with the KBC or other slow external circuitry. */
  68. static int a20_test_long(void)
  69. {
  70. return a20_test(A20_TEST_LONG);
  71. }
  72. static void enable_a20_bios(void)
  73. {
  74. struct biosregs ireg;
  75. initregs(&ireg);
  76. ireg.ax = 0x2401;
  77. intcall(0x15, &ireg, NULL);
  78. }
  79. static void enable_a20_kbc(void)
  80. {
  81. empty_8042();
  82. outb(0xd1, 0x64); /* Command write */
  83. empty_8042();
  84. outb(0xdf, 0x60); /* A20 on */
  85. empty_8042();
  86. outb(0xff, 0x64); /* Null command, but UHCI wants it */
  87. empty_8042();
  88. }
  89. static void enable_a20_fast(void)
  90. {
  91. u8 port_a;
  92. port_a = inb(0x92); /* Configuration port A */
  93. port_a |= 0x02; /* Enable A20 */
  94. port_a &= ~0x01; /* Do not reset machine */
  95. outb(port_a, 0x92);
  96. }
  97. /*
  98. * Actual routine to enable A20; return 0 on ok, -1 on failure
  99. */
  100. #define A20_ENABLE_LOOPS 255 /* Number of times to try */
  101. int enable_a20(void)
  102. {
  103. int loops = A20_ENABLE_LOOPS;
  104. int kbc_err;
  105. while (loops--) {
  106. /* First, check to see if A20 is already enabled
  107. (legacy free, etc.) */
  108. if (a20_test_short())
  109. return 0;
  110. /* Next, try the BIOS (INT 0x15, AX=0x2401) */
  111. enable_a20_bios();
  112. if (a20_test_short())
  113. return 0;
  114. /* Try enabling A20 through the keyboard controller */
  115. kbc_err = empty_8042();
  116. if (a20_test_short())
  117. return 0; /* BIOS worked, but with delayed reaction */
  118. if (!kbc_err) {
  119. enable_a20_kbc();
  120. if (a20_test_long())
  121. return 0;
  122. }
  123. /* Finally, try enabling the "fast A20 gate" */
  124. enable_a20_fast();
  125. if (a20_test_long())
  126. return 0;
  127. }
  128. return -1;
  129. }