cache.h 483 B

123456789101112131415161718
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __UM_CACHE_H
  3. #define __UM_CACHE_H
  4. #if defined(CONFIG_UML_X86) && !defined(CONFIG_64BIT)
  5. # define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
  6. #elif defined(CONFIG_UML_X86) /* 64-bit */
  7. # define L1_CACHE_SHIFT 6 /* Should be 7 on Intel */
  8. #else
  9. /* XXX: this was taken from x86, now it's completely random. Luckily only
  10. * affects SMP padding. */
  11. # define L1_CACHE_SHIFT 5
  12. #endif
  13. #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
  14. #endif