hd64461.c 2.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2000 YAEGASHI Takeshi
  4. * Hitachi HD64461 companion chip support
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/module.h>
  8. #include <linux/kernel.h>
  9. #include <linux/param.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/init.h>
  12. #include <linux/irq.h>
  13. #include <linux/io.h>
  14. #include <asm/irq.h>
  15. #include <asm/hd64461.h>
  16. /* This belongs in cpu specific */
  17. #define INTC_ICR1 0xA4140010UL
  18. static void hd64461_mask_irq(struct irq_data *data)
  19. {
  20. unsigned int irq = data->irq;
  21. unsigned short nimr;
  22. unsigned short mask = 1 << (irq - HD64461_IRQBASE);
  23. nimr = __raw_readw(HD64461_NIMR);
  24. nimr |= mask;
  25. __raw_writew(nimr, HD64461_NIMR);
  26. }
  27. static void hd64461_unmask_irq(struct irq_data *data)
  28. {
  29. unsigned int irq = data->irq;
  30. unsigned short nimr;
  31. unsigned short mask = 1 << (irq - HD64461_IRQBASE);
  32. nimr = __raw_readw(HD64461_NIMR);
  33. nimr &= ~mask;
  34. __raw_writew(nimr, HD64461_NIMR);
  35. }
  36. static void hd64461_mask_and_ack_irq(struct irq_data *data)
  37. {
  38. hd64461_mask_irq(data);
  39. #ifdef CONFIG_HD64461_ENABLER
  40. if (data->irq == HD64461_IRQBASE + 13)
  41. __raw_writeb(0x00, HD64461_PCC1CSCR);
  42. #endif
  43. }
  44. static struct irq_chip hd64461_irq_chip = {
  45. .name = "HD64461-IRQ",
  46. .irq_mask = hd64461_mask_irq,
  47. .irq_mask_ack = hd64461_mask_and_ack_irq,
  48. .irq_unmask = hd64461_unmask_irq,
  49. };
  50. static void hd64461_irq_demux(struct irq_desc *desc)
  51. {
  52. unsigned short intv = __raw_readw(HD64461_NIRR);
  53. unsigned int ext_irq = HD64461_IRQBASE;
  54. intv &= (1 << HD64461_IRQ_NUM) - 1;
  55. for (; intv; intv >>= 1, ext_irq++) {
  56. if (!(intv & 1))
  57. continue;
  58. generic_handle_irq(ext_irq);
  59. }
  60. }
  61. int __init setup_hd64461(void)
  62. {
  63. int irq_base, i;
  64. printk(KERN_INFO
  65. "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
  66. HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
  67. HD64461_IRQBASE + 15);
  68. /* Should be at processor specific part.. */
  69. #if defined(CONFIG_CPU_SUBTYPE_SH7709)
  70. __raw_writew(0x2240, INTC_ICR1);
  71. #endif
  72. __raw_writew(0xffff, HD64461_NIMR);
  73. irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1);
  74. if (IS_ERR_VALUE(irq_base)) {
  75. pr_err("%s: failed hooking irqs for HD64461\n", __func__);
  76. return irq_base;
  77. }
  78. for (i = 0; i < 16; i++)
  79. irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip,
  80. handle_level_irq);
  81. irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
  82. irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
  83. #ifdef CONFIG_HD64461_ENABLER
  84. printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
  85. __raw_writeb(0x4c, HD64461_PCC1CSCIER);
  86. __raw_writeb(0x00, HD64461_PCC1CSCR);
  87. #endif
  88. return 0;
  89. }
  90. module_init(setup_hd64461);