gpio.c 3.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * arch/sh/boards/mach-x3proto/gpio.c
  4. *
  5. * Renesas SH-X3 Prototype Baseboard GPIO Support.
  6. *
  7. * Copyright (C) 2010 - 2012 Paul Mundt
  8. */
  9. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10. #include <linux/init.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/gpio/driver.h>
  13. #include <linux/irq.h>
  14. #include <linux/kernel.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/irqdomain.h>
  17. #include <linux/io.h>
  18. #include <mach/ilsel.h>
  19. #include <mach/hardware.h>
  20. #define KEYCTLR 0xb81c0000
  21. #define KEYOUTR 0xb81c0002
  22. #define KEYDETR 0xb81c0004
  23. static DEFINE_SPINLOCK(x3proto_gpio_lock);
  24. static struct irq_domain *x3proto_irq_domain;
  25. static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
  26. {
  27. unsigned long flags;
  28. unsigned int data;
  29. spin_lock_irqsave(&x3proto_gpio_lock, flags);
  30. data = __raw_readw(KEYCTLR);
  31. data |= (1 << gpio);
  32. __raw_writew(data, KEYCTLR);
  33. spin_unlock_irqrestore(&x3proto_gpio_lock, flags);
  34. return 0;
  35. }
  36. static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio)
  37. {
  38. return !!(__raw_readw(KEYDETR) & (1 << gpio));
  39. }
  40. static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
  41. {
  42. int virq;
  43. if (gpio < chip->ngpio)
  44. virq = irq_create_mapping(x3proto_irq_domain, gpio);
  45. else
  46. virq = -ENXIO;
  47. return virq;
  48. }
  49. static void x3proto_gpio_irq_handler(struct irq_desc *desc)
  50. {
  51. struct irq_data *data = irq_desc_get_irq_data(desc);
  52. struct irq_chip *chip = irq_data_get_irq_chip(data);
  53. unsigned long mask;
  54. int pin;
  55. chip->irq_mask_ack(data);
  56. mask = __raw_readw(KEYDETR);
  57. for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
  58. generic_handle_domain_irq(x3proto_irq_domain, pin);
  59. chip->irq_unmask(data);
  60. }
  61. struct gpio_chip x3proto_gpio_chip = {
  62. .label = "x3proto-gpio",
  63. .direction_input = x3proto_gpio_direction_input,
  64. .get = x3proto_gpio_get,
  65. .to_irq = x3proto_gpio_to_irq,
  66. .base = -1,
  67. .ngpio = NR_BASEBOARD_GPIOS,
  68. };
  69. static int x3proto_gpio_irq_map(struct irq_domain *domain, unsigned int virq,
  70. irq_hw_number_t hwirq)
  71. {
  72. irq_set_chip_and_handler_name(virq, &dummy_irq_chip, handle_simple_irq,
  73. "gpio");
  74. return 0;
  75. }
  76. static struct irq_domain_ops x3proto_gpio_irq_ops = {
  77. .map = x3proto_gpio_irq_map,
  78. .xlate = irq_domain_xlate_twocell,
  79. };
  80. int __init x3proto_gpio_setup(void)
  81. {
  82. int ilsel, ret;
  83. ilsel = ilsel_enable(ILSEL_KEY);
  84. if (unlikely(ilsel < 0))
  85. return ilsel;
  86. ret = gpiochip_add_data(&x3proto_gpio_chip, NULL);
  87. if (unlikely(ret))
  88. goto err_gpio;
  89. x3proto_irq_domain = irq_domain_add_linear(NULL, NR_BASEBOARD_GPIOS,
  90. &x3proto_gpio_irq_ops, NULL);
  91. if (unlikely(!x3proto_irq_domain))
  92. goto err_irq;
  93. pr_info("registering '%s' support, handling GPIOs %u -> %u, "
  94. "bound to IRQ %u\n",
  95. x3proto_gpio_chip.label, x3proto_gpio_chip.base,
  96. x3proto_gpio_chip.base + x3proto_gpio_chip.ngpio,
  97. ilsel);
  98. irq_set_chained_handler(ilsel, x3proto_gpio_irq_handler);
  99. irq_set_irq_wake(ilsel, 1);
  100. return 0;
  101. err_irq:
  102. gpiochip_remove(&x3proto_gpio_chip);
  103. ret = 0;
  104. err_gpio:
  105. synchronize_irq(ilsel);
  106. ilsel_disable(ILSEL_KEY);
  107. return ret;
  108. }