setup.c 4.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * linux/arch/sh/boards/se/7722/setup.c
  4. *
  5. * Copyright (C) 2007 Nobuhiro Iwamatsu
  6. * Copyright (C) 2012 Paul Mundt
  7. *
  8. * Hitachi UL SolutionEngine 7722 Support.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/ata_platform.h>
  13. #include <linux/input.h>
  14. #include <linux/input/sh_keysc.h>
  15. #include <linux/irqdomain.h>
  16. #include <linux/smc91x.h>
  17. #include <linux/sh_intc.h>
  18. #include <mach-se/mach/se7722.h>
  19. #include <mach-se/mach/mrshpc.h>
  20. #include <asm/machvec.h>
  21. #include <asm/clock.h>
  22. #include <asm/io.h>
  23. #include <asm/heartbeat.h>
  24. #include <cpu/sh7722.h>
  25. /* Heartbeat */
  26. static struct resource heartbeat_resource = {
  27. .start = PA_LED,
  28. .end = PA_LED,
  29. .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  30. };
  31. static struct platform_device heartbeat_device = {
  32. .name = "heartbeat",
  33. .id = -1,
  34. .num_resources = 1,
  35. .resource = &heartbeat_resource,
  36. };
  37. /* SMC91x */
  38. static struct smc91x_platdata smc91x_info = {
  39. .flags = SMC91X_USE_16BIT,
  40. };
  41. static struct resource smc91x_eth_resources[] = {
  42. [0] = {
  43. .name = "smc91x-regs" ,
  44. .start = PA_LAN + 0x300,
  45. .end = PA_LAN + 0x300 + 0x10 ,
  46. .flags = IORESOURCE_MEM,
  47. },
  48. [1] = {
  49. /* Filled in later */
  50. .flags = IORESOURCE_IRQ,
  51. },
  52. };
  53. static struct platform_device smc91x_eth_device = {
  54. .name = "smc91x",
  55. .id = 0,
  56. .dev = {
  57. .dma_mask = NULL, /* don't use dma */
  58. .coherent_dma_mask = 0xffffffff,
  59. .platform_data = &smc91x_info,
  60. },
  61. .num_resources = ARRAY_SIZE(smc91x_eth_resources),
  62. .resource = smc91x_eth_resources,
  63. };
  64. static struct resource cf_ide_resources[] = {
  65. [0] = {
  66. .start = PA_MRSHPC_IO + 0x1f0,
  67. .end = PA_MRSHPC_IO + 0x1f0 + 8 ,
  68. .flags = IORESOURCE_IO,
  69. },
  70. [1] = {
  71. .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
  72. .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
  73. .flags = IORESOURCE_IO,
  74. },
  75. [2] = {
  76. /* Filled in later */
  77. .flags = IORESOURCE_IRQ,
  78. },
  79. };
  80. static struct platform_device cf_ide_device = {
  81. .name = "pata_platform",
  82. .id = -1,
  83. .num_resources = ARRAY_SIZE(cf_ide_resources),
  84. .resource = cf_ide_resources,
  85. };
  86. static struct sh_keysc_info sh_keysc_info = {
  87. .mode = SH_KEYSC_MODE_1, /* KEYOUT0->5, KEYIN0->4 */
  88. .scan_timing = 3,
  89. .delay = 5,
  90. .keycodes = { /* SW1 -> SW30 */
  91. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  92. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  93. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  94. KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T,
  95. KEY_U, KEY_V, KEY_W, KEY_X, KEY_Y,
  96. KEY_Z,
  97. KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, /* life */
  98. },
  99. };
  100. static struct resource sh_keysc_resources[] = {
  101. [0] = {
  102. .start = 0x044b0000,
  103. .end = 0x044b000f,
  104. .flags = IORESOURCE_MEM,
  105. },
  106. [1] = {
  107. .start = evt2irq(0xbe0),
  108. .flags = IORESOURCE_IRQ,
  109. },
  110. };
  111. static struct platform_device sh_keysc_device = {
  112. .name = "sh_keysc",
  113. .id = 0, /* "keysc0" clock */
  114. .num_resources = ARRAY_SIZE(sh_keysc_resources),
  115. .resource = sh_keysc_resources,
  116. .dev = {
  117. .platform_data = &sh_keysc_info,
  118. },
  119. };
  120. static struct platform_device *se7722_devices[] __initdata = {
  121. &heartbeat_device,
  122. &smc91x_eth_device,
  123. &cf_ide_device,
  124. &sh_keysc_device,
  125. };
  126. static int __init se7722_devices_setup(void)
  127. {
  128. mrshpc_setup_windows();
  129. /* Wire-up dynamic vectors */
  130. cf_ide_resources[2].start = cf_ide_resources[2].end =
  131. irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_MRSHPC0);
  132. smc91x_eth_resources[1].start = smc91x_eth_resources[1].end =
  133. irq_find_mapping(se7722_irq_domain, SE7722_FPGA_IRQ_SMC);
  134. return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
  135. }
  136. device_initcall(se7722_devices_setup);
  137. static void __init se7722_setup(char **cmdline_p)
  138. {
  139. __raw_writew(0x010D, FPGA_OUT); /* FPGA */
  140. __raw_writew(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
  141. __raw_writew(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
  142. /* LCDC I/O */
  143. __raw_writew(0x0020, PORT_PSELD);
  144. /* SIOF1*/
  145. __raw_writew(0x0003, PORT_PSELB);
  146. __raw_writew(0xe000, PORT_PSELC);
  147. __raw_writew(0x0000, PORT_PKCR);
  148. /* LCDC */
  149. __raw_writew(0x4020, PORT_PHCR);
  150. __raw_writew(0x0000, PORT_PLCR);
  151. __raw_writew(0x0000, PORT_PMCR);
  152. __raw_writew(0x0002, PORT_PRCR);
  153. __raw_writew(0x0000, PORT_PXCR); /* LCDC,CS6A */
  154. /* KEYSC */
  155. __raw_writew(0x0A10, PORT_PSELA); /* BS,SHHID2 */
  156. __raw_writew(0x0000, PORT_PYCR);
  157. __raw_writew(0x0000, PORT_PZCR);
  158. __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA);
  159. __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC);
  160. }
  161. /*
  162. * The Machine Vector
  163. */
  164. static struct sh_machine_vector mv_se7722 __initmv = {
  165. .mv_name = "Solution Engine 7722" ,
  166. .mv_setup = se7722_setup ,
  167. .mv_init_irq = init_se7722_IRQ,
  168. };