setup.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * linux/arch/sh/boards/se/770x/setup.c
  4. *
  5. * Copyright (C) 2000 Kazumoto Kojima
  6. *
  7. * Hitachi SolutionEngine Support.
  8. *
  9. */
  10. #include <linux/init.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/sh_eth.h>
  13. #include <mach-se/mach/se.h>
  14. #include <mach-se/mach/mrshpc.h>
  15. #include <asm/machvec.h>
  16. #include <asm/io.h>
  17. #include <asm/smc37c93x.h>
  18. #include <asm/heartbeat.h>
  19. /*
  20. * Configure the Super I/O chip
  21. */
  22. static void __init smsc_config(int index, int data)
  23. {
  24. outb_p(index, INDEX_PORT);
  25. outb_p(data, DATA_PORT);
  26. }
  27. /* XXX: Another candidate for a more generic cchip machine vector */
  28. static void __init smsc_setup(char **cmdline_p)
  29. {
  30. outb_p(CONFIG_ENTER, CONFIG_PORT);
  31. outb_p(CONFIG_ENTER, CONFIG_PORT);
  32. /* FDC */
  33. smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
  34. smsc_config(ACTIVATE_INDEX, 0x01);
  35. smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
  36. /* AUXIO (GPIO): to use IDE1 */
  37. smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
  38. smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
  39. smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
  40. /* COM1 */
  41. smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
  42. smsc_config(ACTIVATE_INDEX, 0x01);
  43. smsc_config(IO_BASE_HI_INDEX, 0x03);
  44. smsc_config(IO_BASE_LO_INDEX, 0xf8);
  45. smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
  46. /* COM2 */
  47. smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
  48. smsc_config(ACTIVATE_INDEX, 0x01);
  49. smsc_config(IO_BASE_HI_INDEX, 0x02);
  50. smsc_config(IO_BASE_LO_INDEX, 0xf8);
  51. smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
  52. /* RTC */
  53. smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
  54. smsc_config(ACTIVATE_INDEX, 0x01);
  55. smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
  56. /* XXX: PARPORT, KBD, and MOUSE will come here... */
  57. outb_p(CONFIG_EXIT, CONFIG_PORT);
  58. }
  59. static struct resource cf_ide_resources[] = {
  60. [0] = {
  61. .start = PA_MRSHPC_IO + 0x1f0,
  62. .end = PA_MRSHPC_IO + 0x1f0 + 8,
  63. .flags = IORESOURCE_MEM,
  64. },
  65. [1] = {
  66. .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
  67. .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
  68. .flags = IORESOURCE_MEM,
  69. },
  70. [2] = {
  71. .start = IRQ_CFCARD,
  72. .flags = IORESOURCE_IRQ,
  73. },
  74. };
  75. static struct platform_device cf_ide_device = {
  76. .name = "pata_platform",
  77. .id = -1,
  78. .num_resources = ARRAY_SIZE(cf_ide_resources),
  79. .resource = cf_ide_resources,
  80. };
  81. static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
  82. static struct heartbeat_data heartbeat_data = {
  83. .bit_pos = heartbeat_bit_pos,
  84. .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
  85. };
  86. static struct resource heartbeat_resource = {
  87. .start = PA_LED,
  88. .end = PA_LED,
  89. .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  90. };
  91. static struct platform_device heartbeat_device = {
  92. .name = "heartbeat",
  93. .id = -1,
  94. .dev = {
  95. .platform_data = &heartbeat_data,
  96. },
  97. .num_resources = 1,
  98. .resource = &heartbeat_resource,
  99. };
  100. #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
  101. defined(CONFIG_CPU_SUBTYPE_SH7712)
  102. /* SH771X Ethernet driver */
  103. static struct sh_eth_plat_data sh_eth_plat = {
  104. .phy = PHY_ID,
  105. .phy_interface = PHY_INTERFACE_MODE_MII,
  106. };
  107. static struct resource sh_eth0_resources[] = {
  108. [0] = {
  109. .start = SH_ETH0_BASE,
  110. .end = SH_ETH0_BASE + 0x1B8 - 1,
  111. .flags = IORESOURCE_MEM,
  112. },
  113. [1] = {
  114. .start = SH_TSU_BASE,
  115. .end = SH_TSU_BASE + 0x200 - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. [2] = {
  119. .start = SH_ETH0_IRQ,
  120. .end = SH_ETH0_IRQ,
  121. .flags = IORESOURCE_IRQ,
  122. },
  123. };
  124. static struct platform_device sh_eth0_device = {
  125. .name = "sh771x-ether",
  126. .id = 0,
  127. .dev = {
  128. .platform_data = &sh_eth_plat,
  129. },
  130. .num_resources = ARRAY_SIZE(sh_eth0_resources),
  131. .resource = sh_eth0_resources,
  132. };
  133. static struct resource sh_eth1_resources[] = {
  134. [0] = {
  135. .start = SH_ETH1_BASE,
  136. .end = SH_ETH1_BASE + 0x1B8 - 1,
  137. .flags = IORESOURCE_MEM,
  138. },
  139. [1] = {
  140. .start = SH_TSU_BASE,
  141. .end = SH_TSU_BASE + 0x200 - 1,
  142. .flags = IORESOURCE_MEM,
  143. },
  144. [2] = {
  145. .start = SH_ETH1_IRQ,
  146. .end = SH_ETH1_IRQ,
  147. .flags = IORESOURCE_IRQ,
  148. },
  149. };
  150. static struct platform_device sh_eth1_device = {
  151. .name = "sh771x-ether",
  152. .id = 1,
  153. .dev = {
  154. .platform_data = &sh_eth_plat,
  155. },
  156. .num_resources = ARRAY_SIZE(sh_eth1_resources),
  157. .resource = sh_eth1_resources,
  158. };
  159. #endif
  160. static struct platform_device *se_devices[] __initdata = {
  161. &heartbeat_device,
  162. &cf_ide_device,
  163. #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
  164. defined(CONFIG_CPU_SUBTYPE_SH7712)
  165. &sh_eth0_device,
  166. &sh_eth1_device,
  167. #endif
  168. };
  169. static int __init se_devices_setup(void)
  170. {
  171. mrshpc_setup_windows();
  172. return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
  173. }
  174. device_initcall(se_devices_setup);
  175. /*
  176. * The Machine Vector
  177. */
  178. static struct sh_machine_vector mv_se __initmv = {
  179. .mv_name = "SolutionEngine",
  180. .mv_setup = smsc_setup,
  181. .mv_init_irq = init_se_IRQ,
  182. };