board-apsh4a3a.c 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * ALPHAPROJECT AP-SH4A-3A Support.
  4. *
  5. * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
  6. * Copyright (C) 2008 Yoshihiro Shimoda
  7. * Copyright (C) 2009 Paul Mundt
  8. */
  9. #include <linux/init.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/io.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/regulator/fixed.h>
  14. #include <linux/regulator/machine.h>
  15. #include <linux/smsc911x.h>
  16. #include <linux/irq.h>
  17. #include <linux/clk.h>
  18. #include <asm/machvec.h>
  19. #include <linux/sizes.h>
  20. #include <asm/clock.h>
  21. static struct mtd_partition nor_flash_partitions[] = {
  22. {
  23. .name = "loader",
  24. .offset = 0x00000000,
  25. .size = 512 * 1024,
  26. },
  27. {
  28. .name = "bootenv",
  29. .offset = MTDPART_OFS_APPEND,
  30. .size = 512 * 1024,
  31. },
  32. {
  33. .name = "kernel",
  34. .offset = MTDPART_OFS_APPEND,
  35. .size = 4 * 1024 * 1024,
  36. },
  37. {
  38. .name = "data",
  39. .offset = MTDPART_OFS_APPEND,
  40. .size = MTDPART_SIZ_FULL,
  41. },
  42. };
  43. static struct physmap_flash_data nor_flash_data = {
  44. .width = 4,
  45. .parts = nor_flash_partitions,
  46. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  47. };
  48. static struct resource nor_flash_resources[] = {
  49. [0] = {
  50. .start = 0x00000000,
  51. .end = 0x01000000 - 1,
  52. .flags = IORESOURCE_MEM,
  53. }
  54. };
  55. static struct platform_device nor_flash_device = {
  56. .name = "physmap-flash",
  57. .dev = {
  58. .platform_data = &nor_flash_data,
  59. },
  60. .num_resources = ARRAY_SIZE(nor_flash_resources),
  61. .resource = nor_flash_resources,
  62. };
  63. /* Dummy supplies, where voltage doesn't matter */
  64. static struct regulator_consumer_supply dummy_supplies[] = {
  65. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  66. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  67. };
  68. static struct resource smsc911x_resources[] = {
  69. [0] = {
  70. .name = "smsc911x-memory",
  71. .start = 0xA4000000,
  72. .end = 0xA4000000 + SZ_256 - 1,
  73. .flags = IORESOURCE_MEM,
  74. },
  75. [1] = {
  76. .name = "smsc911x-irq",
  77. .start = evt2irq(0x200),
  78. .end = evt2irq(0x200),
  79. .flags = IORESOURCE_IRQ,
  80. },
  81. };
  82. static struct smsc911x_platform_config smsc911x_config = {
  83. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  84. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  85. .flags = SMSC911X_USE_16BIT,
  86. .phy_interface = PHY_INTERFACE_MODE_MII,
  87. };
  88. static struct platform_device smsc911x_device = {
  89. .name = "smsc911x",
  90. .id = -1,
  91. .num_resources = ARRAY_SIZE(smsc911x_resources),
  92. .resource = smsc911x_resources,
  93. .dev = {
  94. .platform_data = &smsc911x_config,
  95. },
  96. };
  97. static struct platform_device *apsh4a3a_devices[] __initdata = {
  98. &nor_flash_device,
  99. &smsc911x_device,
  100. };
  101. static int __init apsh4a3a_devices_setup(void)
  102. {
  103. regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  104. return platform_add_devices(apsh4a3a_devices,
  105. ARRAY_SIZE(apsh4a3a_devices));
  106. }
  107. device_initcall(apsh4a3a_devices_setup);
  108. static int apsh4a3a_clk_init(void)
  109. {
  110. struct clk *clk;
  111. int ret;
  112. clk = clk_get(NULL, "extal");
  113. if (IS_ERR(clk))
  114. return PTR_ERR(clk);
  115. ret = clk_set_rate(clk, 33333000);
  116. clk_put(clk);
  117. return ret;
  118. }
  119. /* Initialize the board */
  120. static void __init apsh4a3a_setup(char **cmdline_p)
  121. {
  122. printk(KERN_INFO "Alpha Project AP-SH4A-3A support:\n");
  123. }
  124. static void __init apsh4a3a_init_irq(void)
  125. {
  126. plat_irq_setup_pins(IRQ_MODE_IRQ7654);
  127. }
  128. /* Return the board specific boot mode pin configuration */
  129. static int apsh4a3a_mode_pins(void)
  130. {
  131. int value = 0;
  132. /* These are the factory default settings of SW1 and SW2.
  133. * If you change these dip switches then you will need to
  134. * adjust the values below as well.
  135. */
  136. value &= ~MODE_PIN0; /* Clock Mode 16 */
  137. value &= ~MODE_PIN1;
  138. value &= ~MODE_PIN2;
  139. value &= ~MODE_PIN3;
  140. value |= MODE_PIN4;
  141. value &= ~MODE_PIN5; /* 16-bit Area0 bus width */
  142. value |= MODE_PIN6; /* Area 0 SRAM interface */
  143. value |= MODE_PIN7;
  144. value |= MODE_PIN8; /* Little Endian */
  145. value |= MODE_PIN9; /* Master Mode */
  146. value |= MODE_PIN10; /* Crystal resonator */
  147. value |= MODE_PIN11; /* Display Unit */
  148. value |= MODE_PIN12;
  149. value &= ~MODE_PIN13; /* 29-bit address mode */
  150. value |= MODE_PIN14; /* No PLL step-up */
  151. return value;
  152. }
  153. /*
  154. * The Machine Vector
  155. */
  156. static struct sh_machine_vector mv_apsh4a3a __initmv = {
  157. .mv_name = "AP-SH4A-3A",
  158. .mv_setup = apsh4a3a_setup,
  159. .mv_clk_init = apsh4a3a_clk_init,
  160. .mv_init_irq = apsh4a3a_init_irq,
  161. .mv_mode_pins = apsh4a3a_mode_pins,
  162. };