tlb.h 4.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _S390_TLB_H
  3. #define _S390_TLB_H
  4. /*
  5. * TLB flushing on s390 is complicated. The following requirement
  6. * from the principles of operation is the most arduous:
  7. *
  8. * "A valid table entry must not be changed while it is attached
  9. * to any CPU and may be used for translation by that CPU except to
  10. * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
  11. * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
  12. * table entry, or (3) make a change by means of a COMPARE AND SWAP
  13. * AND PURGE instruction that purges the TLB."
  14. *
  15. * The modification of a pte of an active mm struct therefore is
  16. * a two step process: i) invalidate the pte, ii) store the new pte.
  17. * This is true for the page protection bit as well.
  18. * The only possible optimization is to flush at the beginning of
  19. * a tlb_gather_mmu cycle if the mm_struct is currently not in use.
  20. *
  21. * Pages used for the page tables is a different story. FIXME: more
  22. */
  23. void __tlb_remove_table(void *_table);
  24. static inline void tlb_flush(struct mmu_gather *tlb);
  25. static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
  26. struct page *page, int page_size);
  27. #define tlb_flush tlb_flush
  28. #define pte_free_tlb pte_free_tlb
  29. #define pmd_free_tlb pmd_free_tlb
  30. #define p4d_free_tlb p4d_free_tlb
  31. #define pud_free_tlb pud_free_tlb
  32. #include <asm/tlbflush.h>
  33. #include <asm-generic/tlb.h>
  34. /*
  35. * Release the page cache reference for a pte removed by
  36. * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page
  37. * has already been freed, so just do free_page_and_swap_cache.
  38. */
  39. static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
  40. struct page *page, int page_size)
  41. {
  42. free_page_and_swap_cache(page);
  43. return false;
  44. }
  45. static inline void tlb_flush(struct mmu_gather *tlb)
  46. {
  47. __tlb_flush_mm_lazy(tlb->mm);
  48. }
  49. /*
  50. * pte_free_tlb frees a pte table and clears the CRSTE for the
  51. * page table from the tlb.
  52. */
  53. static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
  54. unsigned long address)
  55. {
  56. __tlb_adjust_range(tlb, address, PAGE_SIZE);
  57. tlb->mm->context.flush_mm = 1;
  58. tlb->freed_tables = 1;
  59. tlb->cleared_pmds = 1;
  60. /*
  61. * page_table_free_rcu takes care of the allocation bit masks
  62. * of the 2K table fragments in the 4K page table page,
  63. * then calls tlb_remove_table.
  64. */
  65. page_table_free_rcu(tlb, (unsigned long *) pte, address);
  66. }
  67. /*
  68. * pmd_free_tlb frees a pmd table and clears the CRSTE for the
  69. * segment table entry from the tlb.
  70. * If the mm uses a two level page table the single pmd is freed
  71. * as the pgd. pmd_free_tlb checks the asce_limit against 2GB
  72. * to avoid the double free of the pmd in this case.
  73. */
  74. static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
  75. unsigned long address)
  76. {
  77. if (mm_pmd_folded(tlb->mm))
  78. return;
  79. pgtable_pmd_page_dtor(virt_to_page(pmd));
  80. __tlb_adjust_range(tlb, address, PAGE_SIZE);
  81. tlb->mm->context.flush_mm = 1;
  82. tlb->freed_tables = 1;
  83. tlb->cleared_puds = 1;
  84. tlb_remove_table(tlb, pmd);
  85. }
  86. /*
  87. * p4d_free_tlb frees a pud table and clears the CRSTE for the
  88. * region second table entry from the tlb.
  89. * If the mm uses a four level page table the single p4d is freed
  90. * as the pgd. p4d_free_tlb checks the asce_limit against 8PB
  91. * to avoid the double free of the p4d in this case.
  92. */
  93. static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
  94. unsigned long address)
  95. {
  96. if (mm_p4d_folded(tlb->mm))
  97. return;
  98. __tlb_adjust_range(tlb, address, PAGE_SIZE);
  99. tlb->mm->context.flush_mm = 1;
  100. tlb->freed_tables = 1;
  101. tlb_remove_table(tlb, p4d);
  102. }
  103. /*
  104. * pud_free_tlb frees a pud table and clears the CRSTE for the
  105. * region third table entry from the tlb.
  106. * If the mm uses a three level page table the single pud is freed
  107. * as the pgd. pud_free_tlb checks the asce_limit against 4TB
  108. * to avoid the double free of the pud in this case.
  109. */
  110. static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
  111. unsigned long address)
  112. {
  113. if (mm_pud_folded(tlb->mm))
  114. return;
  115. tlb->mm->context.flush_mm = 1;
  116. tlb->freed_tables = 1;
  117. tlb->cleared_p4ds = 1;
  118. tlb_remove_table(tlb, pud);
  119. }
  120. #endif /* _S390_TLB_H */