ipl_data.c 3.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <linux/compat.h>
  3. #include <linux/ptrace.h>
  4. #include <asm/cio.h>
  5. #include <asm/asm-offsets.h>
  6. #include "boot.h"
  7. #define CCW0(cmd, addr, cnt, flg) \
  8. { .cmd_code = cmd, .cda = addr, .count = cnt, .flags = flg, }
  9. #define PSW_MASK_DISABLED (PSW_MASK_WAIT | PSW_MASK_EA | PSW_MASK_BA)
  10. struct ipl_lowcore {
  11. psw_t32 ipl_psw; /* 0x0000 */
  12. struct ccw0 ccwpgm[2]; /* 0x0008 */
  13. u8 fill[56]; /* 0x0018 */
  14. struct ccw0 ccwpgmcc[20]; /* 0x0050 */
  15. u8 pad_0xf0[0x01a0-0x00f0]; /* 0x00f0 */
  16. psw_t restart_psw; /* 0x01a0 */
  17. psw_t external_new_psw; /* 0x01b0 */
  18. psw_t svc_new_psw; /* 0x01c0 */
  19. psw_t program_new_psw; /* 0x01d0 */
  20. psw_t mcck_new_psw; /* 0x01e0 */
  21. psw_t io_new_psw; /* 0x01f0 */
  22. };
  23. /*
  24. * Initial lowcore for IPL: the first 24 bytes are loaded by IPL to
  25. * addresses 0-23 (a PSW and two CCWs). Bytes 24-79 are discarded.
  26. * The next 160 bytes are loaded to addresses 0x18-0xb7. They form
  27. * the continuation of the CCW program started by IPL and load the
  28. * range 0x0f0-0x730 from the image to the range 0x0f0-0x730 in
  29. * memory. At the end of the channel program the PSW at location 0 is
  30. * loaded.
  31. * Initial processing starts at 0x200 = iplstart.
  32. *
  33. * The restart psw points to iplstart which allows to load a kernel
  34. * image into memory and starting it by a psw restart on any cpu. All
  35. * other default psw new locations contain a disabled wait psw where
  36. * the address indicates which psw was loaded.
  37. *
  38. * Note that the 'file' utility can detect s390 kernel images. For
  39. * that to succeed the two initial CCWs, and the 0x40 fill bytes must
  40. * be present.
  41. */
  42. static struct ipl_lowcore ipl_lowcore __used __section(".ipldata") = {
  43. .ipl_psw = { .mask = PSW32_MASK_BASE, .addr = PSW32_ADDR_AMODE | IPL_START },
  44. .ccwpgm = {
  45. [ 0] = CCW0(CCW_CMD_READ_IPL, 0x018, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  46. [ 1] = CCW0(CCW_CMD_READ_IPL, 0x068, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  47. },
  48. .fill = {
  49. [ 0 ... 55] = 0x40,
  50. },
  51. .ccwpgmcc = {
  52. [ 0] = CCW0(CCW_CMD_READ_IPL, 0x0f0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  53. [ 1] = CCW0(CCW_CMD_READ_IPL, 0x140, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  54. [ 2] = CCW0(CCW_CMD_READ_IPL, 0x190, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  55. [ 3] = CCW0(CCW_CMD_READ_IPL, 0x1e0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  56. [ 4] = CCW0(CCW_CMD_READ_IPL, 0x230, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  57. [ 5] = CCW0(CCW_CMD_READ_IPL, 0x280, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  58. [ 6] = CCW0(CCW_CMD_READ_IPL, 0x2d0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  59. [ 7] = CCW0(CCW_CMD_READ_IPL, 0x320, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  60. [ 8] = CCW0(CCW_CMD_READ_IPL, 0x370, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  61. [ 9] = CCW0(CCW_CMD_READ_IPL, 0x3c0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  62. [10] = CCW0(CCW_CMD_READ_IPL, 0x410, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  63. [11] = CCW0(CCW_CMD_READ_IPL, 0x460, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  64. [12] = CCW0(CCW_CMD_READ_IPL, 0x4b0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  65. [13] = CCW0(CCW_CMD_READ_IPL, 0x500, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  66. [14] = CCW0(CCW_CMD_READ_IPL, 0x550, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  67. [15] = CCW0(CCW_CMD_READ_IPL, 0x5a0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  68. [16] = CCW0(CCW_CMD_READ_IPL, 0x5f0, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  69. [17] = CCW0(CCW_CMD_READ_IPL, 0x640, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  70. [18] = CCW0(CCW_CMD_READ_IPL, 0x690, 0x50, CCW_FLAG_SLI | CCW_FLAG_CC),
  71. [19] = CCW0(CCW_CMD_READ_IPL, 0x6e0, 0x50, CCW_FLAG_SLI),
  72. },
  73. .restart_psw = { .mask = 0, .addr = IPL_START, },
  74. .external_new_psw = { .mask = PSW_MASK_DISABLED, .addr = __LC_EXT_NEW_PSW, },
  75. .svc_new_psw = { .mask = PSW_MASK_DISABLED, .addr = __LC_SVC_NEW_PSW, },
  76. .program_new_psw = { .mask = PSW_MASK_DISABLED, .addr = __LC_PGM_NEW_PSW, },
  77. .mcck_new_psw = { .mask = PSW_MASK_DISABLED, .addr = __LC_MCK_NEW_PSW, },
  78. .io_new_psw = { .mask = PSW_MASK_DISABLED, .addr = __LC_IO_NEW_PSW, },
  79. };