prom.c 3.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. *
  4. * Copyright (C) 2010 John Crispin <[email protected]>
  5. * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG
  6. */
  7. #include <linux/export.h>
  8. #include <linux/clk.h>
  9. #include <asm/bootinfo.h>
  10. #include <asm/time.h>
  11. #include <lantiq_soc.h>
  12. #include "../prom.h"
  13. #define SOC_DANUBE "Danube"
  14. #define SOC_TWINPASS "Twinpass"
  15. #define SOC_AMAZON_SE "Amazon_SE"
  16. #define SOC_AR9 "AR9"
  17. #define SOC_GR9 "GRX200"
  18. #define SOC_VR9 "xRX200"
  19. #define SOC_VRX220 "xRX220"
  20. #define SOC_AR10 "xRX300"
  21. #define SOC_GRX390 "xRX330"
  22. #define COMP_DANUBE "lantiq,danube"
  23. #define COMP_TWINPASS "lantiq,twinpass"
  24. #define COMP_AMAZON_SE "lantiq,ase"
  25. #define COMP_AR9 "lantiq,ar9"
  26. #define COMP_GR9 "lantiq,gr9"
  27. #define COMP_VR9 "lantiq,vr9"
  28. #define COMP_AR10 "lantiq,ar10"
  29. #define COMP_GRX390 "lantiq,grx390"
  30. #define PART_SHIFT 12
  31. #define PART_MASK 0x0FFFFFFF
  32. #define REV_SHIFT 28
  33. #define REV_MASK 0xF0000000
  34. void __init ltq_soc_detect(struct ltq_soc_info *i)
  35. {
  36. i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT;
  37. i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT;
  38. sprintf(i->rev_type, "1.%d", i->rev);
  39. switch (i->partnum) {
  40. case SOC_ID_DANUBE1:
  41. case SOC_ID_DANUBE2:
  42. i->name = SOC_DANUBE;
  43. i->type = SOC_TYPE_DANUBE;
  44. i->compatible = COMP_DANUBE;
  45. break;
  46. case SOC_ID_TWINPASS:
  47. i->name = SOC_TWINPASS;
  48. i->type = SOC_TYPE_DANUBE;
  49. i->compatible = COMP_TWINPASS;
  50. break;
  51. case SOC_ID_ARX188:
  52. case SOC_ID_ARX168_1:
  53. case SOC_ID_ARX168_2:
  54. case SOC_ID_ARX182:
  55. i->name = SOC_AR9;
  56. i->type = SOC_TYPE_AR9;
  57. i->compatible = COMP_AR9;
  58. break;
  59. case SOC_ID_GRX188:
  60. case SOC_ID_GRX168:
  61. i->name = SOC_GR9;
  62. i->type = SOC_TYPE_AR9;
  63. i->compatible = COMP_GR9;
  64. break;
  65. case SOC_ID_AMAZON_SE_1:
  66. case SOC_ID_AMAZON_SE_2:
  67. #ifdef CONFIG_PCI
  68. panic("ase is only supported for non pci kernels");
  69. #endif
  70. i->name = SOC_AMAZON_SE;
  71. i->type = SOC_TYPE_AMAZON_SE;
  72. i->compatible = COMP_AMAZON_SE;
  73. break;
  74. case SOC_ID_VRX282:
  75. case SOC_ID_VRX268:
  76. case SOC_ID_VRX288:
  77. i->name = SOC_VR9;
  78. i->type = SOC_TYPE_VR9;
  79. i->compatible = COMP_VR9;
  80. break;
  81. case SOC_ID_GRX268:
  82. case SOC_ID_GRX288:
  83. i->name = SOC_GR9;
  84. i->type = SOC_TYPE_VR9;
  85. i->compatible = COMP_GR9;
  86. break;
  87. case SOC_ID_VRX268_2:
  88. case SOC_ID_VRX288_2:
  89. i->name = SOC_VR9;
  90. i->type = SOC_TYPE_VR9_2;
  91. i->compatible = COMP_VR9;
  92. break;
  93. case SOC_ID_VRX220:
  94. i->name = SOC_VRX220;
  95. i->type = SOC_TYPE_VRX220;
  96. i->compatible = COMP_VR9;
  97. break;
  98. case SOC_ID_GRX282_2:
  99. case SOC_ID_GRX288_2:
  100. i->name = SOC_GR9;
  101. i->type = SOC_TYPE_VR9_2;
  102. i->compatible = COMP_GR9;
  103. break;
  104. case SOC_ID_ARX362:
  105. case SOC_ID_ARX368:
  106. case SOC_ID_ARX382:
  107. case SOC_ID_ARX388:
  108. case SOC_ID_URX388:
  109. i->name = SOC_AR10;
  110. i->type = SOC_TYPE_AR10;
  111. i->compatible = COMP_AR10;
  112. break;
  113. case SOC_ID_GRX383:
  114. case SOC_ID_GRX369:
  115. case SOC_ID_GRX387:
  116. case SOC_ID_GRX389:
  117. i->name = SOC_GRX390;
  118. i->type = SOC_TYPE_GRX390;
  119. i->compatible = COMP_GRX390;
  120. break;
  121. default:
  122. unreachable();
  123. break;
  124. }
  125. }