smp-cmp.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. *
  4. * Copyright (C) 2007 MIPS Technologies, Inc.
  5. * Chris Dearman ([email protected])
  6. */
  7. #undef DEBUG
  8. #include <linux/kernel.h>
  9. #include <linux/sched/task_stack.h>
  10. #include <linux/smp.h>
  11. #include <linux/cpumask.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/compiler.h>
  14. #include <linux/atomic.h>
  15. #include <asm/cacheflush.h>
  16. #include <asm/cpu.h>
  17. #include <asm/processor.h>
  18. #include <asm/hardirq.h>
  19. #include <asm/mmu_context.h>
  20. #include <asm/smp.h>
  21. #include <asm/time.h>
  22. #include <asm/mipsregs.h>
  23. #include <asm/mipsmtregs.h>
  24. #include <asm/mips_mt.h>
  25. #include <asm/amon.h>
  26. static void cmp_init_secondary(void)
  27. {
  28. struct cpuinfo_mips *c __maybe_unused = &current_cpu_data;
  29. /* Assume GIC is present */
  30. change_c0_status(ST0_IM, STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP4 |
  31. STATUSF_IP5 | STATUSF_IP6 | STATUSF_IP7);
  32. /* Enable per-cpu interrupts: platform specific */
  33. #ifdef CONFIG_MIPS_MT_SMP
  34. if (cpu_has_mipsmt)
  35. cpu_set_vpe_id(c, (read_c0_tcbind() >> TCBIND_CURVPE_SHIFT) &
  36. TCBIND_CURVPE);
  37. #endif
  38. }
  39. static void cmp_smp_finish(void)
  40. {
  41. pr_debug("SMPCMP: CPU%d: %s\n", smp_processor_id(), __func__);
  42. /* CDFIXME: remove this? */
  43. write_c0_compare(read_c0_count() + (8 * mips_hpt_frequency / HZ));
  44. #ifdef CONFIG_MIPS_MT_FPAFF
  45. /* If we have an FPU, enroll ourselves in the FPU-full mask */
  46. if (cpu_has_fpu)
  47. cpumask_set_cpu(smp_processor_id(), &mt_fpu_cpumask);
  48. #endif /* CONFIG_MIPS_MT_FPAFF */
  49. local_irq_enable();
  50. }
  51. /*
  52. * Setup the PC, SP, and GP of a secondary processor and start it running
  53. * smp_bootstrap is the place to resume from
  54. * __KSTK_TOS(idle) is apparently the stack pointer
  55. * (unsigned long)idle->thread_info the gp
  56. */
  57. static int cmp_boot_secondary(int cpu, struct task_struct *idle)
  58. {
  59. struct thread_info *gp = task_thread_info(idle);
  60. unsigned long sp = __KSTK_TOS(idle);
  61. unsigned long pc = (unsigned long)&smp_bootstrap;
  62. unsigned long a0 = 0;
  63. pr_debug("SMPCMP: CPU%d: %s cpu %d\n", smp_processor_id(),
  64. __func__, cpu);
  65. #if 0
  66. /* Needed? */
  67. flush_icache_range((unsigned long)gp,
  68. (unsigned long)(gp + sizeof(struct thread_info)));
  69. #endif
  70. amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0);
  71. return 0;
  72. }
  73. /*
  74. * Common setup before any secondaries are started
  75. */
  76. void __init cmp_smp_setup(void)
  77. {
  78. int i;
  79. int ncpu = 0;
  80. pr_debug("SMPCMP: CPU%d: %s\n", smp_processor_id(), __func__);
  81. #ifdef CONFIG_MIPS_MT_FPAFF
  82. /* If we have an FPU, enroll ourselves in the FPU-full mask */
  83. if (cpu_has_fpu)
  84. cpumask_set_cpu(0, &mt_fpu_cpumask);
  85. #endif /* CONFIG_MIPS_MT_FPAFF */
  86. for (i = 1; i < NR_CPUS; i++) {
  87. if (amon_cpu_avail(i)) {
  88. set_cpu_possible(i, true);
  89. __cpu_number_map[i] = ++ncpu;
  90. __cpu_logical_map[ncpu] = i;
  91. }
  92. }
  93. if (cpu_has_mipsmt) {
  94. unsigned int nvpe = 1;
  95. #ifdef CONFIG_MIPS_MT_SMP
  96. unsigned int mvpconf0 = read_c0_mvpconf0();
  97. nvpe = ((mvpconf0 & MVPCONF0_PVPE) >> MVPCONF0_PVPE_SHIFT) + 1;
  98. #endif
  99. smp_num_siblings = nvpe;
  100. }
  101. pr_info("Detected %i available secondary CPU(s)\n", ncpu);
  102. }
  103. void __init cmp_prepare_cpus(unsigned int max_cpus)
  104. {
  105. pr_debug("SMPCMP: CPU%d: %s max_cpus=%d\n",
  106. smp_processor_id(), __func__, max_cpus);
  107. #ifdef CONFIG_MIPS_MT
  108. /*
  109. * FIXME: some of these options are per-system, some per-core and
  110. * some per-cpu
  111. */
  112. mips_mt_set_cpuoptions();
  113. #endif
  114. }
  115. const struct plat_smp_ops cmp_smp_ops = {
  116. .send_ipi_single = mips_smp_send_ipi_single,
  117. .send_ipi_mask = mips_smp_send_ipi_mask,
  118. .init_secondary = cmp_init_secondary,
  119. .smp_finish = cmp_smp_finish,
  120. .boot_secondary = cmp_boot_secondary,
  121. .smp_setup = cmp_smp_setup,
  122. .prepare_cpus = cmp_prepare_cpus,
  123. };