r4k_switch.S 1.5 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1994, 1995, 1996, 1998, 1999, 2002, 2003 Ralf Baechle
  7. * Copyright (C) 1996 David S. Miller ([email protected])
  8. * Copyright (C) 1994, 1995, 1996, by Andreas Busse
  9. * Copyright (C) 1999 Silicon Graphics, Inc.
  10. * Copyright (C) 2000 MIPS Technologies, Inc.
  11. * written by Carsten Langgaard, [email protected]
  12. */
  13. #include <asm/asm.h>
  14. #include <asm/cachectl.h>
  15. #include <asm/mipsregs.h>
  16. #include <asm/asm-offsets.h>
  17. #include <asm/regdef.h>
  18. #include <asm/stackframe.h>
  19. #include <asm/thread_info.h>
  20. #include <asm/asmmacro.h>
  21. /*
  22. * task_struct *resume(task_struct *prev, task_struct *next,
  23. * struct thread_info *next_ti)
  24. */
  25. .align 5
  26. LEAF(resume)
  27. mfc0 t1, CP0_STATUS
  28. LONG_S t1, THREAD_STATUS(a0)
  29. cpu_save_nonscratch a0
  30. LONG_S ra, THREAD_REG31(a0)
  31. #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP)
  32. PTR_LA t8, __stack_chk_guard
  33. LONG_L t9, TASK_STACK_CANARY(a1)
  34. LONG_S t9, 0(t8)
  35. #endif
  36. /*
  37. * The order of restoring the registers takes care of the race
  38. * updating $28, $29 and kernelsp without disabling ints.
  39. */
  40. move $28, a2
  41. cpu_restore_nonscratch a1
  42. PTR_ADDU t0, $28, _THREAD_SIZE - 32
  43. set_saved_sp t0, t1, t2
  44. mfc0 t1, CP0_STATUS /* Do we really need this? */
  45. li a3, 0xff01
  46. and t1, a3
  47. LONG_L a2, THREAD_STATUS(a1)
  48. nor a3, $0, a3
  49. and a2, a3
  50. or a2, t1
  51. mtc0 a2, CP0_STATUS
  52. move v0, a0
  53. jr ra
  54. END(resume)