probes-common.h 1.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879
  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (C) 2016 Imagination Technologies
  4. * Author: Marcin Nowakowski <[email protected]>
  5. */
  6. #ifndef __PROBES_COMMON_H
  7. #define __PROBES_COMMON_H
  8. #include <asm/inst.h>
  9. int __insn_is_compact_branch(union mips_instruction insn);
  10. static inline int __insn_has_delay_slot(const union mips_instruction insn)
  11. {
  12. switch (insn.i_format.opcode) {
  13. /*
  14. * jr and jalr are in r_format format.
  15. */
  16. case spec_op:
  17. switch (insn.r_format.func) {
  18. case jalr_op:
  19. case jr_op:
  20. return 1;
  21. }
  22. break;
  23. /*
  24. * This group contains:
  25. * bltz_op, bgez_op, bltzl_op, bgezl_op,
  26. * bltzal_op, bgezal_op, bltzall_op, bgezall_op.
  27. */
  28. case bcond_op:
  29. switch (insn.i_format.rt) {
  30. case bltz_op:
  31. case bltzl_op:
  32. case bgez_op:
  33. case bgezl_op:
  34. case bltzal_op:
  35. case bltzall_op:
  36. case bgezal_op:
  37. case bgezall_op:
  38. case bposge32_op:
  39. return 1;
  40. }
  41. break;
  42. /*
  43. * These are unconditional and in j_format.
  44. */
  45. case jal_op:
  46. case j_op:
  47. case beq_op:
  48. case beql_op:
  49. case bne_op:
  50. case bnel_op:
  51. case blez_op: /* not really i_format */
  52. case blezl_op:
  53. case bgtz_op:
  54. case bgtzl_op:
  55. return 1;
  56. /*
  57. * And now the FPA/cp1 branch instructions.
  58. */
  59. case cop1_op:
  60. #ifdef CONFIG_CPU_CAVIUM_OCTEON
  61. case lwc2_op: /* This is bbit0 on Octeon */
  62. case ldc2_op: /* This is bbit032 on Octeon */
  63. case swc2_op: /* This is bbit1 on Octeon */
  64. case sdc2_op: /* This is bbit132 on Octeon */
  65. #endif
  66. return 1;
  67. }
  68. return 0;
  69. }
  70. #endif /* __PROBES_COMMON_H */