jazzdma.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Mips Jazz DMA controller support
  4. * Copyright (C) 1995, 1996 by Andreas Busse
  5. *
  6. * NOTE: Some of the argument checking could be removed when
  7. * things have settled down. Also, instead of returning 0xffffffff
  8. * on failure of vdma_alloc() one could leave page #0 unused
  9. * and return the more usual NULL pointer as logical address.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/export.h>
  14. #include <linux/errno.h>
  15. #include <linux/mm.h>
  16. #include <linux/memblock.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/gfp.h>
  19. #include <linux/dma-map-ops.h>
  20. #include <asm/mipsregs.h>
  21. #include <asm/jazz.h>
  22. #include <asm/io.h>
  23. #include <linux/uaccess.h>
  24. #include <asm/dma.h>
  25. #include <asm/jazzdma.h>
  26. /*
  27. * Set this to one to enable additional vdma debug code.
  28. */
  29. #define CONF_DEBUG_VDMA 0
  30. static VDMA_PGTBL_ENTRY *pgtbl;
  31. static DEFINE_SPINLOCK(vdma_lock);
  32. /*
  33. * Debug stuff
  34. */
  35. #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
  36. static int debuglvl = 3;
  37. /*
  38. * Initialize the pagetable with a one-to-one mapping of
  39. * the first 16 Mbytes of main memory and declare all
  40. * entries to be unused. Using this method will at least
  41. * allow some early device driver operations to work.
  42. */
  43. static inline void vdma_pgtbl_init(void)
  44. {
  45. unsigned long paddr = 0;
  46. int i;
  47. for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
  48. pgtbl[i].frame = paddr;
  49. pgtbl[i].owner = VDMA_PAGE_EMPTY;
  50. paddr += VDMA_PAGESIZE;
  51. }
  52. }
  53. /*
  54. * Initialize the Jazz R4030 dma controller
  55. */
  56. static int __init vdma_init(void)
  57. {
  58. /*
  59. * Allocate 32k of memory for DMA page tables. This needs to be page
  60. * aligned and should be uncached to avoid cache flushing after every
  61. * update.
  62. */
  63. pgtbl = (VDMA_PGTBL_ENTRY *)__get_free_pages(GFP_KERNEL | GFP_DMA,
  64. get_order(VDMA_PGTBL_SIZE));
  65. BUG_ON(!pgtbl);
  66. dma_cache_wback_inv((unsigned long)pgtbl, VDMA_PGTBL_SIZE);
  67. pgtbl = (VDMA_PGTBL_ENTRY *)CKSEG1ADDR((unsigned long)pgtbl);
  68. /*
  69. * Clear the R4030 translation table
  70. */
  71. vdma_pgtbl_init();
  72. r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
  73. CPHYSADDR((unsigned long)pgtbl));
  74. r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
  75. r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
  76. printk(KERN_INFO "VDMA: R4030 DMA pagetables initialized.\n");
  77. return 0;
  78. }
  79. arch_initcall(vdma_init);
  80. /*
  81. * Allocate DMA pagetables using a simple first-fit algorithm
  82. */
  83. unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
  84. {
  85. int first, last, pages, frame, i;
  86. unsigned long laddr, flags;
  87. /* check arguments */
  88. if (paddr > 0x1fffffff) {
  89. if (vdma_debug)
  90. printk("vdma_alloc: Invalid physical address: %08lx\n",
  91. paddr);
  92. return DMA_MAPPING_ERROR; /* invalid physical address */
  93. }
  94. if (size > 0x400000 || size == 0) {
  95. if (vdma_debug)
  96. printk("vdma_alloc: Invalid size: %08lx\n", size);
  97. return DMA_MAPPING_ERROR; /* invalid physical address */
  98. }
  99. spin_lock_irqsave(&vdma_lock, flags);
  100. /*
  101. * Find free chunk
  102. */
  103. pages = VDMA_PAGE(paddr + size) - VDMA_PAGE(paddr) + 1;
  104. first = 0;
  105. while (1) {
  106. while (pgtbl[first].owner != VDMA_PAGE_EMPTY &&
  107. first < VDMA_PGTBL_ENTRIES) first++;
  108. if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
  109. spin_unlock_irqrestore(&vdma_lock, flags);
  110. return DMA_MAPPING_ERROR;
  111. }
  112. last = first + 1;
  113. while (pgtbl[last].owner == VDMA_PAGE_EMPTY
  114. && last - first < pages)
  115. last++;
  116. if (last - first == pages)
  117. break; /* found */
  118. first = last + 1;
  119. }
  120. /*
  121. * Mark pages as allocated
  122. */
  123. laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
  124. frame = paddr & ~(VDMA_PAGESIZE - 1);
  125. for (i = first; i < last; i++) {
  126. pgtbl[i].frame = frame;
  127. pgtbl[i].owner = laddr;
  128. frame += VDMA_PAGESIZE;
  129. }
  130. /*
  131. * Update translation table and return logical start address
  132. */
  133. r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
  134. if (vdma_debug > 1)
  135. printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
  136. pages, laddr);
  137. if (vdma_debug > 2) {
  138. printk("LADDR: ");
  139. for (i = first; i < last; i++)
  140. printk("%08x ", i << 12);
  141. printk("\nPADDR: ");
  142. for (i = first; i < last; i++)
  143. printk("%08x ", pgtbl[i].frame);
  144. printk("\nOWNER: ");
  145. for (i = first; i < last; i++)
  146. printk("%08x ", pgtbl[i].owner);
  147. printk("\n");
  148. }
  149. spin_unlock_irqrestore(&vdma_lock, flags);
  150. return laddr;
  151. }
  152. EXPORT_SYMBOL(vdma_alloc);
  153. /*
  154. * Free previously allocated dma translation pages
  155. * Note that this does NOT change the translation table,
  156. * it just marks the free'd pages as unused!
  157. */
  158. int vdma_free(unsigned long laddr)
  159. {
  160. int i;
  161. i = laddr >> 12;
  162. if (pgtbl[i].owner != laddr) {
  163. printk
  164. ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
  165. laddr);
  166. return -1;
  167. }
  168. while (i < VDMA_PGTBL_ENTRIES && pgtbl[i].owner == laddr) {
  169. pgtbl[i].owner = VDMA_PAGE_EMPTY;
  170. i++;
  171. }
  172. if (vdma_debug > 1)
  173. printk("vdma_free: freed %ld pages starting from %08lx\n",
  174. i - (laddr >> 12), laddr);
  175. return 0;
  176. }
  177. EXPORT_SYMBOL(vdma_free);
  178. /*
  179. * Translate a physical address to a logical address.
  180. * This will return the logical address of the first
  181. * match.
  182. */
  183. unsigned long vdma_phys2log(unsigned long paddr)
  184. {
  185. int i;
  186. int frame;
  187. frame = paddr & ~(VDMA_PAGESIZE - 1);
  188. for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
  189. if (pgtbl[i].frame == frame)
  190. break;
  191. }
  192. if (i == VDMA_PGTBL_ENTRIES)
  193. return ~0UL;
  194. return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
  195. }
  196. EXPORT_SYMBOL(vdma_phys2log);
  197. /*
  198. * Translate a logical DMA address to a physical address
  199. */
  200. unsigned long vdma_log2phys(unsigned long laddr)
  201. {
  202. return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
  203. }
  204. EXPORT_SYMBOL(vdma_log2phys);
  205. /*
  206. * Print DMA statistics
  207. */
  208. void vdma_stats(void)
  209. {
  210. int i;
  211. printk("vdma_stats: CONFIG: %08x\n",
  212. r4030_read_reg32(JAZZ_R4030_CONFIG));
  213. printk("R4030 translation table base: %08x\n",
  214. r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
  215. printk("R4030 translation table limit: %08x\n",
  216. r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
  217. printk("vdma_stats: INV_ADDR: %08x\n",
  218. r4030_read_reg32(JAZZ_R4030_INV_ADDR));
  219. printk("vdma_stats: R_FAIL_ADDR: %08x\n",
  220. r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
  221. printk("vdma_stats: M_FAIL_ADDR: %08x\n",
  222. r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
  223. printk("vdma_stats: IRQ_SOURCE: %08x\n",
  224. r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
  225. printk("vdma_stats: I386_ERROR: %08x\n",
  226. r4030_read_reg32(JAZZ_R4030_I386_ERROR));
  227. printk("vdma_chnl_modes: ");
  228. for (i = 0; i < 8; i++)
  229. printk("%04x ",
  230. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
  231. (i << 5)));
  232. printk("\n");
  233. printk("vdma_chnl_enables: ");
  234. for (i = 0; i < 8; i++)
  235. printk("%04x ",
  236. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  237. (i << 5)));
  238. printk("\n");
  239. }
  240. /*
  241. * DMA transfer functions
  242. */
  243. /*
  244. * Enable a DMA channel. Also clear any error conditions.
  245. */
  246. void vdma_enable(int channel)
  247. {
  248. int status;
  249. if (vdma_debug)
  250. printk("vdma_enable: channel %d\n", channel);
  251. /*
  252. * Check error conditions first
  253. */
  254. status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
  255. if (status & 0x400)
  256. printk("VDMA: Channel %d: Address error!\n", channel);
  257. if (status & 0x200)
  258. printk("VDMA: Channel %d: Memory error!\n", channel);
  259. /*
  260. * Clear all interrupt flags
  261. */
  262. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  263. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  264. (channel << 5)) | R4030_TC_INTR
  265. | R4030_MEM_INTR | R4030_ADDR_INTR);
  266. /*
  267. * Enable the desired channel
  268. */
  269. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  270. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  271. (channel << 5)) |
  272. R4030_CHNL_ENABLE);
  273. }
  274. EXPORT_SYMBOL(vdma_enable);
  275. /*
  276. * Disable a DMA channel
  277. */
  278. void vdma_disable(int channel)
  279. {
  280. if (vdma_debug) {
  281. int status =
  282. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  283. (channel << 5));
  284. printk("vdma_disable: channel %d\n", channel);
  285. printk("VDMA: channel %d status: %04x (%s) mode: "
  286. "%02x addr: %06x count: %06x\n",
  287. channel, status,
  288. ((status & 0x600) ? "ERROR" : "OK"),
  289. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
  290. (channel << 5)),
  291. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
  292. (channel << 5)),
  293. (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
  294. (channel << 5)));
  295. }
  296. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  297. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  298. (channel << 5)) &
  299. ~R4030_CHNL_ENABLE);
  300. /*
  301. * After disabling a DMA channel a remote bus register should be
  302. * read to ensure that the current DMA acknowledge cycle is completed.
  303. */
  304. *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
  305. }
  306. EXPORT_SYMBOL(vdma_disable);
  307. /*
  308. * Set DMA mode. This function accepts the mode values used
  309. * to set a PC-style DMA controller. For the SCSI and FDC
  310. * channels, we also set the default modes each time we're
  311. * called.
  312. * NOTE: The FAST and BURST dma modes are supported by the
  313. * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
  314. * for now.
  315. */
  316. void vdma_set_mode(int channel, int mode)
  317. {
  318. if (vdma_debug)
  319. printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
  320. mode);
  321. switch (channel) {
  322. case JAZZ_SCSI_DMA: /* scsi */
  323. r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
  324. /* R4030_MODE_FAST | */
  325. /* R4030_MODE_BURST | */
  326. R4030_MODE_INTR_EN |
  327. R4030_MODE_WIDTH_16 |
  328. R4030_MODE_ATIME_80);
  329. break;
  330. case JAZZ_FLOPPY_DMA: /* floppy */
  331. r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
  332. /* R4030_MODE_FAST | */
  333. /* R4030_MODE_BURST | */
  334. R4030_MODE_INTR_EN |
  335. R4030_MODE_WIDTH_8 |
  336. R4030_MODE_ATIME_120);
  337. break;
  338. case JAZZ_AUDIOL_DMA:
  339. case JAZZ_AUDIOR_DMA:
  340. printk("VDMA: Audio DMA not supported yet.\n");
  341. break;
  342. default:
  343. printk
  344. ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
  345. channel);
  346. }
  347. switch (mode) {
  348. case DMA_MODE_READ:
  349. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  350. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  351. (channel << 5)) &
  352. ~R4030_CHNL_WRITE);
  353. break;
  354. case DMA_MODE_WRITE:
  355. r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
  356. r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
  357. (channel << 5)) |
  358. R4030_CHNL_WRITE);
  359. break;
  360. default:
  361. printk
  362. ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
  363. mode);
  364. }
  365. }
  366. EXPORT_SYMBOL(vdma_set_mode);
  367. /*
  368. * Set Transfer Address
  369. */
  370. void vdma_set_addr(int channel, long addr)
  371. {
  372. if (vdma_debug)
  373. printk("vdma_set_addr: channel %d, addr %lx\n", channel,
  374. addr);
  375. r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
  376. }
  377. EXPORT_SYMBOL(vdma_set_addr);
  378. /*
  379. * Set Transfer Count
  380. */
  381. void vdma_set_count(int channel, int count)
  382. {
  383. if (vdma_debug)
  384. printk("vdma_set_count: channel %d, count %08x\n", channel,
  385. (unsigned) count);
  386. r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
  387. }
  388. EXPORT_SYMBOL(vdma_set_count);
  389. /*
  390. * Get Residual
  391. */
  392. int vdma_get_residue(int channel)
  393. {
  394. int residual;
  395. residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
  396. if (vdma_debug)
  397. printk("vdma_get_residual: channel %d: residual=%d\n",
  398. channel, residual);
  399. return residual;
  400. }
  401. /*
  402. * Get DMA channel enable register
  403. */
  404. int vdma_get_enable(int channel)
  405. {
  406. int enable;
  407. enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
  408. if (vdma_debug)
  409. printk("vdma_get_enable: channel %d: enable=%d\n", channel,
  410. enable);
  411. return enable;
  412. }
  413. static void *jazz_dma_alloc(struct device *dev, size_t size,
  414. dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
  415. {
  416. struct page *page;
  417. void *ret;
  418. if (attrs & DMA_ATTR_NO_WARN)
  419. gfp |= __GFP_NOWARN;
  420. size = PAGE_ALIGN(size);
  421. page = alloc_pages(gfp, get_order(size));
  422. if (!page)
  423. return NULL;
  424. ret = page_address(page);
  425. memset(ret, 0, size);
  426. *dma_handle = vdma_alloc(virt_to_phys(ret), size);
  427. if (*dma_handle == DMA_MAPPING_ERROR)
  428. goto out_free_pages;
  429. arch_dma_prep_coherent(page, size);
  430. return (void *)(UNCAC_BASE + __pa(ret));
  431. out_free_pages:
  432. __free_pages(page, get_order(size));
  433. return NULL;
  434. }
  435. static void jazz_dma_free(struct device *dev, size_t size, void *vaddr,
  436. dma_addr_t dma_handle, unsigned long attrs)
  437. {
  438. vdma_free(dma_handle);
  439. __free_pages(virt_to_page(vaddr), get_order(size));
  440. }
  441. static dma_addr_t jazz_dma_map_page(struct device *dev, struct page *page,
  442. unsigned long offset, size_t size, enum dma_data_direction dir,
  443. unsigned long attrs)
  444. {
  445. phys_addr_t phys = page_to_phys(page) + offset;
  446. if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
  447. arch_sync_dma_for_device(phys, size, dir);
  448. return vdma_alloc(phys, size);
  449. }
  450. static void jazz_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
  451. size_t size, enum dma_data_direction dir, unsigned long attrs)
  452. {
  453. if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
  454. arch_sync_dma_for_cpu(vdma_log2phys(dma_addr), size, dir);
  455. vdma_free(dma_addr);
  456. }
  457. static int jazz_dma_map_sg(struct device *dev, struct scatterlist *sglist,
  458. int nents, enum dma_data_direction dir, unsigned long attrs)
  459. {
  460. int i;
  461. struct scatterlist *sg;
  462. for_each_sg(sglist, sg, nents, i) {
  463. if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
  464. arch_sync_dma_for_device(sg_phys(sg), sg->length,
  465. dir);
  466. sg->dma_address = vdma_alloc(sg_phys(sg), sg->length);
  467. if (sg->dma_address == DMA_MAPPING_ERROR)
  468. return -EIO;
  469. sg_dma_len(sg) = sg->length;
  470. }
  471. return nents;
  472. }
  473. static void jazz_dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
  474. int nents, enum dma_data_direction dir, unsigned long attrs)
  475. {
  476. int i;
  477. struct scatterlist *sg;
  478. for_each_sg(sglist, sg, nents, i) {
  479. if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
  480. arch_sync_dma_for_cpu(sg_phys(sg), sg->length, dir);
  481. vdma_free(sg->dma_address);
  482. }
  483. }
  484. static void jazz_dma_sync_single_for_device(struct device *dev,
  485. dma_addr_t addr, size_t size, enum dma_data_direction dir)
  486. {
  487. arch_sync_dma_for_device(vdma_log2phys(addr), size, dir);
  488. }
  489. static void jazz_dma_sync_single_for_cpu(struct device *dev,
  490. dma_addr_t addr, size_t size, enum dma_data_direction dir)
  491. {
  492. arch_sync_dma_for_cpu(vdma_log2phys(addr), size, dir);
  493. }
  494. static void jazz_dma_sync_sg_for_device(struct device *dev,
  495. struct scatterlist *sgl, int nents, enum dma_data_direction dir)
  496. {
  497. struct scatterlist *sg;
  498. int i;
  499. for_each_sg(sgl, sg, nents, i)
  500. arch_sync_dma_for_device(sg_phys(sg), sg->length, dir);
  501. }
  502. static void jazz_dma_sync_sg_for_cpu(struct device *dev,
  503. struct scatterlist *sgl, int nents, enum dma_data_direction dir)
  504. {
  505. struct scatterlist *sg;
  506. int i;
  507. for_each_sg(sgl, sg, nents, i)
  508. arch_sync_dma_for_cpu(sg_phys(sg), sg->length, dir);
  509. }
  510. const struct dma_map_ops jazz_dma_ops = {
  511. .alloc = jazz_dma_alloc,
  512. .free = jazz_dma_free,
  513. .map_page = jazz_dma_map_page,
  514. .unmap_page = jazz_dma_unmap_page,
  515. .map_sg = jazz_dma_map_sg,
  516. .unmap_sg = jazz_dma_unmap_sg,
  517. .sync_single_for_cpu = jazz_dma_sync_single_for_cpu,
  518. .sync_single_for_device = jazz_dma_sync_single_for_device,
  519. .sync_sg_for_cpu = jazz_dma_sync_sg_for_cpu,
  520. .sync_sg_for_device = jazz_dma_sync_sg_for_device,
  521. .mmap = dma_common_mmap,
  522. .get_sgtable = dma_common_get_sgtable,
  523. .alloc_pages = dma_common_alloc_pages,
  524. .free_pages = dma_common_free_pages,
  525. };
  526. EXPORT_SYMBOL(jazz_dma_ops);