cvmx-helper-sgmii.c 15 KB

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  1. /***********************license start***************
  2. * Author: Cavium Networks
  3. *
  4. * Contact: [email protected]
  5. * This file is part of the OCTEON SDK
  6. *
  7. * Copyright (C) 2003-2018 Cavium, Inc.
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more
  17. * details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this file; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22. * or visit http://www.gnu.org/licenses/.
  23. *
  24. * This file may also be available under a different license from Cavium.
  25. * Contact Cavium Networks for more information
  26. ***********************license end**************************************/
  27. /*
  28. * Functions for SGMII initialization, configuration,
  29. * and monitoring.
  30. */
  31. #include <asm/octeon/octeon.h>
  32. #include <asm/octeon/cvmx-config.h>
  33. #include <asm/octeon/cvmx-helper.h>
  34. #include <asm/octeon/cvmx-helper-board.h>
  35. #include <asm/octeon/cvmx-gmxx-defs.h>
  36. #include <asm/octeon/cvmx-pcsx-defs.h>
  37. #include <asm/octeon/cvmx-pcsxx-defs.h>
  38. /**
  39. * Perform initialization required only once for an SGMII port.
  40. *
  41. * @interface: Interface to init
  42. * @index: Index of prot on the interface
  43. *
  44. * Returns Zero on success, negative on failure
  45. */
  46. static int __cvmx_helper_sgmii_hardware_init_one_time(int interface, int index)
  47. {
  48. const uint64_t clock_mhz = cvmx_sysinfo_get()->cpu_clock_hz / 1000000;
  49. union cvmx_pcsx_miscx_ctl_reg pcs_misc_ctl_reg;
  50. union cvmx_pcsx_linkx_timer_count_reg pcsx_linkx_timer_count_reg;
  51. union cvmx_gmxx_prtx_cfg gmxx_prtx_cfg;
  52. /* Disable GMX */
  53. gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
  54. gmxx_prtx_cfg.s.en = 0;
  55. cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
  56. /*
  57. * Write PCS*_LINK*_TIMER_COUNT_REG[COUNT] with the
  58. * appropriate value. 1000BASE-X specifies a 10ms
  59. * interval. SGMII specifies a 1.6ms interval.
  60. */
  61. pcs_misc_ctl_reg.u64 =
  62. cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
  63. pcsx_linkx_timer_count_reg.u64 =
  64. cvmx_read_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface));
  65. if (pcs_misc_ctl_reg.s.mode) {
  66. /* 1000BASE-X */
  67. pcsx_linkx_timer_count_reg.s.count =
  68. (10000ull * clock_mhz) >> 10;
  69. } else {
  70. /* SGMII */
  71. pcsx_linkx_timer_count_reg.s.count =
  72. (1600ull * clock_mhz) >> 10;
  73. }
  74. cvmx_write_csr(CVMX_PCSX_LINKX_TIMER_COUNT_REG(index, interface),
  75. pcsx_linkx_timer_count_reg.u64);
  76. /*
  77. * Write the advertisement register to be used as the
  78. * tx_Config_Reg<D15:D0> of the autonegotiation. In
  79. * 1000BASE-X mode, tx_Config_Reg<D15:D0> is PCS*_AN*_ADV_REG.
  80. * In SGMII PHY mode, tx_Config_Reg<D15:D0> is
  81. * PCS*_SGM*_AN_ADV_REG. In SGMII MAC mode,
  82. * tx_Config_Reg<D15:D0> is the fixed value 0x4001, so this
  83. * step can be skipped.
  84. */
  85. if (pcs_misc_ctl_reg.s.mode) {
  86. /* 1000BASE-X */
  87. union cvmx_pcsx_anx_adv_reg pcsx_anx_adv_reg;
  88. pcsx_anx_adv_reg.u64 =
  89. cvmx_read_csr(CVMX_PCSX_ANX_ADV_REG(index, interface));
  90. pcsx_anx_adv_reg.s.rem_flt = 0;
  91. pcsx_anx_adv_reg.s.pause = 3;
  92. pcsx_anx_adv_reg.s.hfd = 1;
  93. pcsx_anx_adv_reg.s.fd = 1;
  94. cvmx_write_csr(CVMX_PCSX_ANX_ADV_REG(index, interface),
  95. pcsx_anx_adv_reg.u64);
  96. } else {
  97. union cvmx_pcsx_miscx_ctl_reg pcsx_miscx_ctl_reg;
  98. pcsx_miscx_ctl_reg.u64 =
  99. cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
  100. if (pcsx_miscx_ctl_reg.s.mac_phy) {
  101. /* PHY Mode */
  102. union cvmx_pcsx_sgmx_an_adv_reg pcsx_sgmx_an_adv_reg;
  103. pcsx_sgmx_an_adv_reg.u64 =
  104. cvmx_read_csr(CVMX_PCSX_SGMX_AN_ADV_REG
  105. (index, interface));
  106. pcsx_sgmx_an_adv_reg.s.link = 1;
  107. pcsx_sgmx_an_adv_reg.s.dup = 1;
  108. pcsx_sgmx_an_adv_reg.s.speed = 2;
  109. cvmx_write_csr(CVMX_PCSX_SGMX_AN_ADV_REG
  110. (index, interface),
  111. pcsx_sgmx_an_adv_reg.u64);
  112. } else {
  113. /* MAC Mode - Nothing to do */
  114. }
  115. }
  116. return 0;
  117. }
  118. /**
  119. * Initialize the SERTES link for the first time or after a loss
  120. * of link.
  121. *
  122. * @interface: Interface to init
  123. * @index: Index of prot on the interface
  124. *
  125. * Returns Zero on success, negative on failure
  126. */
  127. static int __cvmx_helper_sgmii_hardware_init_link(int interface, int index)
  128. {
  129. union cvmx_pcsx_mrx_control_reg control_reg;
  130. /*
  131. * Take PCS through a reset sequence.
  132. * PCS*_MR*_CONTROL_REG[PWR_DN] should be cleared to zero.
  133. * Write PCS*_MR*_CONTROL_REG[RESET]=1 (while not changing the
  134. * value of the other PCS*_MR*_CONTROL_REG bits). Read
  135. * PCS*_MR*_CONTROL_REG[RESET] until it changes value to
  136. * zero.
  137. */
  138. control_reg.u64 =
  139. cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface));
  140. if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {
  141. control_reg.s.reset = 1;
  142. cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface),
  143. control_reg.u64);
  144. if (CVMX_WAIT_FOR_FIELD64
  145. (CVMX_PCSX_MRX_CONTROL_REG(index, interface),
  146. union cvmx_pcsx_mrx_control_reg, reset, ==, 0, 10000)) {
  147. cvmx_dprintf("SGMII%d: Timeout waiting for port %d "
  148. "to finish reset\n",
  149. interface, index);
  150. return -1;
  151. }
  152. }
  153. /*
  154. * Write PCS*_MR*_CONTROL_REG[RST_AN]=1 to ensure a fresh
  155. * sgmii negotiation starts.
  156. */
  157. control_reg.s.rst_an = 1;
  158. control_reg.s.an_en = 1;
  159. control_reg.s.pwr_dn = 0;
  160. cvmx_write_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface),
  161. control_reg.u64);
  162. /*
  163. * Wait for PCS*_MR*_STATUS_REG[AN_CPT] to be set, indicating
  164. * that sgmii autonegotiation is complete. In MAC mode this
  165. * isn't an ethernet link, but a link between Octeon and the
  166. * PHY.
  167. */
  168. if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&
  169. CVMX_WAIT_FOR_FIELD64(CVMX_PCSX_MRX_STATUS_REG(index, interface),
  170. union cvmx_pcsx_mrx_status_reg, an_cpt, ==, 1,
  171. 10000)) {
  172. /* cvmx_dprintf("SGMII%d: Port %d link timeout\n", interface, index); */
  173. return -1;
  174. }
  175. return 0;
  176. }
  177. /**
  178. * Configure an SGMII link to the specified speed after the SERTES
  179. * link is up.
  180. *
  181. * @interface: Interface to init
  182. * @index: Index of prot on the interface
  183. * @link_info: Link state to configure
  184. *
  185. * Returns Zero on success, negative on failure
  186. */
  187. static int __cvmx_helper_sgmii_hardware_init_link_speed(int interface,
  188. int index,
  189. union cvmx_helper_link_info
  190. link_info)
  191. {
  192. int is_enabled;
  193. union cvmx_gmxx_prtx_cfg gmxx_prtx_cfg;
  194. union cvmx_pcsx_miscx_ctl_reg pcsx_miscx_ctl_reg;
  195. /* Disable GMX before we make any changes. Remember the enable state */
  196. gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
  197. is_enabled = gmxx_prtx_cfg.s.en;
  198. gmxx_prtx_cfg.s.en = 0;
  199. cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
  200. /* Wait for GMX to be idle */
  201. if (CVMX_WAIT_FOR_FIELD64
  202. (CVMX_GMXX_PRTX_CFG(index, interface), union cvmx_gmxx_prtx_cfg,
  203. rx_idle, ==, 1, 10000)
  204. || CVMX_WAIT_FOR_FIELD64(CVMX_GMXX_PRTX_CFG(index, interface),
  205. union cvmx_gmxx_prtx_cfg, tx_idle, ==, 1,
  206. 10000)) {
  207. cvmx_dprintf
  208. ("SGMII%d: Timeout waiting for port %d to be idle\n",
  209. interface, index);
  210. return -1;
  211. }
  212. /* Read GMX CFG again to make sure the disable completed */
  213. gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
  214. /*
  215. * Get the misc control for PCS. We will need to set the
  216. * duplication amount.
  217. */
  218. pcsx_miscx_ctl_reg.u64 =
  219. cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
  220. /*
  221. * Use GMXENO to force the link down if the status we get says
  222. * it should be down.
  223. */
  224. pcsx_miscx_ctl_reg.s.gmxeno = !link_info.s.link_up;
  225. /* Only change the duplex setting if the link is up */
  226. if (link_info.s.link_up)
  227. gmxx_prtx_cfg.s.duplex = link_info.s.full_duplex;
  228. /* Do speed based setting for GMX */
  229. switch (link_info.s.speed) {
  230. case 10:
  231. gmxx_prtx_cfg.s.speed = 0;
  232. gmxx_prtx_cfg.s.speed_msb = 1;
  233. gmxx_prtx_cfg.s.slottime = 0;
  234. /* Setting from GMX-603 */
  235. pcsx_miscx_ctl_reg.s.samp_pt = 25;
  236. cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
  237. cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
  238. break;
  239. case 100:
  240. gmxx_prtx_cfg.s.speed = 0;
  241. gmxx_prtx_cfg.s.speed_msb = 0;
  242. gmxx_prtx_cfg.s.slottime = 0;
  243. pcsx_miscx_ctl_reg.s.samp_pt = 0x5;
  244. cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 64);
  245. cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
  246. break;
  247. case 1000:
  248. gmxx_prtx_cfg.s.speed = 1;
  249. gmxx_prtx_cfg.s.speed_msb = 0;
  250. gmxx_prtx_cfg.s.slottime = 1;
  251. pcsx_miscx_ctl_reg.s.samp_pt = 1;
  252. cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 512);
  253. cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 8192);
  254. break;
  255. default:
  256. break;
  257. }
  258. /* Write the new misc control for PCS */
  259. cvmx_write_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface),
  260. pcsx_miscx_ctl_reg.u64);
  261. /* Write the new GMX settings with the port still disabled */
  262. cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
  263. /* Read GMX CFG again to make sure the config completed */
  264. gmxx_prtx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
  265. /* Restore the enabled / disabled state */
  266. gmxx_prtx_cfg.s.en = is_enabled;
  267. cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmxx_prtx_cfg.u64);
  268. return 0;
  269. }
  270. /**
  271. * Bring up the SGMII interface to be ready for packet I/O but
  272. * leave I/O disabled using the GMX override. This function
  273. * follows the bringup documented in 10.6.3 of the manual.
  274. *
  275. * @interface: Interface to bringup
  276. * @num_ports: Number of ports on the interface
  277. *
  278. * Returns Zero on success, negative on failure
  279. */
  280. static int __cvmx_helper_sgmii_hardware_init(int interface, int num_ports)
  281. {
  282. int index;
  283. __cvmx_helper_setup_gmx(interface, num_ports);
  284. for (index = 0; index < num_ports; index++) {
  285. int ipd_port = cvmx_helper_get_ipd_port(interface, index);
  286. __cvmx_helper_sgmii_hardware_init_one_time(interface, index);
  287. /* Linux kernel driver will call ....link_set with the
  288. * proper link state. In the simulator there is no
  289. * link state polling and hence it is set from
  290. * here.
  291. */
  292. if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)
  293. __cvmx_helper_sgmii_link_set(ipd_port,
  294. __cvmx_helper_sgmii_link_get(ipd_port));
  295. }
  296. return 0;
  297. }
  298. int __cvmx_helper_sgmii_enumerate(int interface)
  299. {
  300. return 4;
  301. }
  302. /**
  303. * Probe a SGMII interface and determine the number of ports
  304. * connected to it. The SGMII interface should still be down after
  305. * this call.
  306. *
  307. * @interface: Interface to probe
  308. *
  309. * Returns Number of ports on the interface. Zero to disable.
  310. */
  311. int __cvmx_helper_sgmii_probe(int interface)
  312. {
  313. union cvmx_gmxx_inf_mode mode;
  314. /*
  315. * Due to errata GMX-700 on CN56XXp1.x and CN52XXp1.x, the
  316. * interface needs to be enabled before IPD otherwise per port
  317. * backpressure may not work properly
  318. */
  319. mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
  320. mode.s.en = 1;
  321. cvmx_write_csr(CVMX_GMXX_INF_MODE(interface), mode.u64);
  322. return __cvmx_helper_sgmii_enumerate(interface);
  323. }
  324. /**
  325. * Bringup and enable a SGMII interface. After this call packet
  326. * I/O should be fully functional. This is called with IPD
  327. * enabled but PKO disabled.
  328. *
  329. * @interface: Interface to bring up
  330. *
  331. * Returns Zero on success, negative on failure
  332. */
  333. int __cvmx_helper_sgmii_enable(int interface)
  334. {
  335. int num_ports = cvmx_helper_ports_on_interface(interface);
  336. int index;
  337. __cvmx_helper_sgmii_hardware_init(interface, num_ports);
  338. for (index = 0; index < num_ports; index++) {
  339. union cvmx_gmxx_prtx_cfg gmxx_prtx_cfg;
  340. gmxx_prtx_cfg.u64 =
  341. cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
  342. gmxx_prtx_cfg.s.en = 1;
  343. cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface),
  344. gmxx_prtx_cfg.u64);
  345. __cvmx_interrupt_pcsx_intx_en_reg_enable(index, interface);
  346. }
  347. __cvmx_interrupt_pcsxx_int_en_reg_enable(interface);
  348. __cvmx_interrupt_gmxx_enable(interface);
  349. return 0;
  350. }
  351. /**
  352. * Return the link state of an IPD/PKO port as returned by
  353. * auto negotiation. The result of this function may not match
  354. * Octeon's link config if auto negotiation has changed since
  355. * the last call to cvmx_helper_link_set().
  356. *
  357. * @ipd_port: IPD/PKO port to query
  358. *
  359. * Returns Link state
  360. */
  361. union cvmx_helper_link_info __cvmx_helper_sgmii_link_get(int ipd_port)
  362. {
  363. union cvmx_helper_link_info result;
  364. union cvmx_pcsx_miscx_ctl_reg pcs_misc_ctl_reg;
  365. int interface = cvmx_helper_get_interface_num(ipd_port);
  366. int index = cvmx_helper_get_interface_index_num(ipd_port);
  367. union cvmx_pcsx_mrx_control_reg pcsx_mrx_control_reg;
  368. result.u64 = 0;
  369. if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
  370. /* The simulator gives you a simulated 1Gbps full duplex link */
  371. result.s.link_up = 1;
  372. result.s.full_duplex = 1;
  373. result.s.speed = 1000;
  374. return result;
  375. }
  376. pcsx_mrx_control_reg.u64 =
  377. cvmx_read_csr(CVMX_PCSX_MRX_CONTROL_REG(index, interface));
  378. if (pcsx_mrx_control_reg.s.loopbck1) {
  379. /* Force 1Gbps full duplex link for internal loopback */
  380. result.s.link_up = 1;
  381. result.s.full_duplex = 1;
  382. result.s.speed = 1000;
  383. return result;
  384. }
  385. pcs_misc_ctl_reg.u64 =
  386. cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
  387. if (pcs_misc_ctl_reg.s.mode) {
  388. /* 1000BASE-X */
  389. /* FIXME */
  390. } else {
  391. union cvmx_pcsx_miscx_ctl_reg pcsx_miscx_ctl_reg;
  392. pcsx_miscx_ctl_reg.u64 =
  393. cvmx_read_csr(CVMX_PCSX_MISCX_CTL_REG(index, interface));
  394. if (pcsx_miscx_ctl_reg.s.mac_phy) {
  395. /* PHY Mode */
  396. union cvmx_pcsx_mrx_status_reg pcsx_mrx_status_reg;
  397. union cvmx_pcsx_anx_results_reg pcsx_anx_results_reg;
  398. /*
  399. * Don't bother continuing if the SERTES low
  400. * level link is down
  401. */
  402. pcsx_mrx_status_reg.u64 =
  403. cvmx_read_csr(CVMX_PCSX_MRX_STATUS_REG
  404. (index, interface));
  405. if (pcsx_mrx_status_reg.s.lnk_st == 0) {
  406. if (__cvmx_helper_sgmii_hardware_init_link
  407. (interface, index) != 0)
  408. return result;
  409. }
  410. /* Read the autoneg results */
  411. pcsx_anx_results_reg.u64 =
  412. cvmx_read_csr(CVMX_PCSX_ANX_RESULTS_REG
  413. (index, interface));
  414. if (pcsx_anx_results_reg.s.an_cpt) {
  415. /*
  416. * Auto negotiation is complete. Set
  417. * status accordingly.
  418. */
  419. result.s.full_duplex =
  420. pcsx_anx_results_reg.s.dup;
  421. result.s.link_up =
  422. pcsx_anx_results_reg.s.link_ok;
  423. switch (pcsx_anx_results_reg.s.spd) {
  424. case 0:
  425. result.s.speed = 10;
  426. break;
  427. case 1:
  428. result.s.speed = 100;
  429. break;
  430. case 2:
  431. result.s.speed = 1000;
  432. break;
  433. default:
  434. result.s.speed = 0;
  435. result.s.link_up = 0;
  436. break;
  437. }
  438. } else {
  439. /*
  440. * Auto negotiation isn't
  441. * complete. Return link down.
  442. */
  443. result.s.speed = 0;
  444. result.s.link_up = 0;
  445. }
  446. } else { /* MAC Mode */
  447. result = __cvmx_helper_board_link_get(ipd_port);
  448. }
  449. }
  450. return result;
  451. }
  452. /**
  453. * Configure an IPD/PKO port for the specified link state. This
  454. * function does not influence auto negotiation at the PHY level.
  455. * The passed link state must always match the link state returned
  456. * by cvmx_helper_link_get().
  457. *
  458. * @ipd_port: IPD/PKO port to configure
  459. * @link_info: The new link state
  460. *
  461. * Returns Zero on success, negative on failure
  462. */
  463. int __cvmx_helper_sgmii_link_set(int ipd_port,
  464. union cvmx_helper_link_info link_info)
  465. {
  466. int interface = cvmx_helper_get_interface_num(ipd_port);
  467. int index = cvmx_helper_get_interface_index_num(ipd_port);
  468. __cvmx_helper_sgmii_hardware_init_link(interface, index);
  469. return __cvmx_helper_sgmii_hardware_init_link_speed(interface, index,
  470. link_info);
  471. }