ci20.dts 11 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /dts-v1/;
  3. #include "jz4780.dtsi"
  4. #include <dt-bindings/clock/ingenic,tcu.h>
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/input/input.h>
  7. #include <dt-bindings/interrupt-controller/irq.h>
  8. #include <dt-bindings/regulator/active-semi,8865-regulator.h>
  9. / {
  10. compatible = "img,ci20", "ingenic,jz4780";
  11. aliases {
  12. serial0 = &uart0;
  13. serial1 = &uart1;
  14. serial3 = &uart3;
  15. serial4 = &uart4;
  16. };
  17. chosen {
  18. stdout-path = &uart4;
  19. };
  20. memory {
  21. device_type = "memory";
  22. reg = <0x0 0x10000000
  23. 0x30000000 0x30000000>;
  24. };
  25. gpio-keys {
  26. compatible = "gpio-keys";
  27. switch {
  28. label = "ci20:sw1";
  29. linux,code = <KEY_F13>;
  30. gpios = <&gpd 17 GPIO_ACTIVE_HIGH>;
  31. wakeup-source;
  32. };
  33. };
  34. leds {
  35. compatible = "gpio-leds";
  36. led0 {
  37. label = "ci20:red:led0";
  38. gpios = <&gpc 3 GPIO_ACTIVE_HIGH>;
  39. linux,default-trigger = "none";
  40. };
  41. led1 {
  42. label = "ci20:red:led1";
  43. gpios = <&gpc 2 GPIO_ACTIVE_HIGH>;
  44. linux,default-trigger = "nand-disk";
  45. };
  46. led2 {
  47. label = "ci20:red:led2";
  48. gpios = <&gpc 1 GPIO_ACTIVE_HIGH>;
  49. linux,default-trigger = "cpu1";
  50. };
  51. led3 {
  52. label = "ci20:red:led3";
  53. gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
  54. linux,default-trigger = "cpu0";
  55. };
  56. };
  57. eth0_power: fixedregulator@0 {
  58. compatible = "regulator-fixed";
  59. regulator-name = "eth0_power";
  60. regulator-min-microvolt = <3300000>;
  61. regulator-max-microvolt = <3300000>;
  62. gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
  63. enable-active-high;
  64. };
  65. hdmi_out: connector {
  66. compatible = "hdmi-connector";
  67. label = "HDMI OUT";
  68. type = "a";
  69. ddc-en-gpios = <&gpa 25 GPIO_ACTIVE_HIGH>;
  70. port {
  71. hdmi_con: endpoint {
  72. remote-endpoint = <&dw_hdmi_out>;
  73. };
  74. };
  75. };
  76. ir: ir {
  77. compatible = "gpio-ir-receiver";
  78. gpios = <&gpe 3 GPIO_ACTIVE_LOW>;
  79. };
  80. wlan0_power: fixedregulator@1 {
  81. compatible = "regulator-fixed";
  82. regulator-name = "wlan0_power";
  83. gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
  84. enable-active-high;
  85. };
  86. otg_power: fixedregulator@2 {
  87. compatible = "regulator-fixed";
  88. regulator-name = "otg_power";
  89. regulator-min-microvolt = <5000000>;
  90. regulator-max-microvolt = <5000000>;
  91. gpio = <&gpf 15 GPIO_ACTIVE_LOW>;
  92. enable-active-high;
  93. };
  94. };
  95. &ext {
  96. clock-frequency = <48000000>;
  97. };
  98. &cgu {
  99. /*
  100. * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
  101. * precision.
  102. */
  103. assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>,
  104. <&cgu JZ4780_CLK_SSIPLL>, <&cgu JZ4780_CLK_SSI>,
  105. <&cgu JZ4780_CLK_HDMI>;
  106. assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
  107. <&cgu JZ4780_CLK_MPLL>,
  108. <&cgu JZ4780_CLK_SSIPLL>;
  109. assigned-clock-rates = <48000000>, <0>, <54000000>, <0>, <27000000>;
  110. };
  111. &tcu {
  112. /*
  113. * 750 kHz for the system timers and clocksource,
  114. * use channel #0 and #1 for the per cpu system timers,
  115. * and use channel #2 for the clocksource.
  116. *
  117. * 3000 kHz for the OST timer to provide a higher
  118. * precision clocksource.
  119. */
  120. assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
  121. <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>;
  122. assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>;
  123. };
  124. &mmc0 {
  125. status = "okay";
  126. bus-width = <4>;
  127. max-frequency = <50000000>;
  128. pinctrl-names = "default";
  129. pinctrl-0 = <&pins_mmc0>;
  130. cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>;
  131. };
  132. &mmc1 {
  133. status = "okay";
  134. bus-width = <4>;
  135. max-frequency = <50000000>;
  136. non-removable;
  137. pinctrl-names = "default";
  138. pinctrl-0 = <&pins_mmc1>;
  139. brcmf: wifi@1 {
  140. /* reg = <4>;*/
  141. compatible = "brcm,bcm4330-fmac";
  142. vcc-supply = <&wlan0_power>;
  143. device-wakeup-gpios = <&gpd 9 GPIO_ACTIVE_HIGH>;
  144. shutdown-gpios = <&gpf 7 GPIO_ACTIVE_LOW>;
  145. };
  146. };
  147. &uart0 {
  148. status = "okay";
  149. pinctrl-names = "default";
  150. pinctrl-0 = <&pins_uart0>;
  151. };
  152. &uart1 {
  153. status = "okay";
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&pins_uart1>;
  156. };
  157. &uart2 {
  158. status = "okay";
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&pins_uart2>;
  161. uart-has-rtscts;
  162. bluetooth {
  163. compatible = "brcm,bcm4330-bt";
  164. reset-gpios = <&gpf 8 GPIO_ACTIVE_HIGH>;
  165. vcc-supply = <&wlan0_power>;
  166. device-wakeup-gpios = <&gpf 5 GPIO_ACTIVE_HIGH>;
  167. host-wakeup-gpios = <&gpf 6 GPIO_ACTIVE_HIGH>;
  168. shutdown-gpios = <&gpf 4 GPIO_ACTIVE_LOW>;
  169. };
  170. };
  171. &uart3 {
  172. status = "okay";
  173. pinctrl-names = "default";
  174. pinctrl-0 = <&pins_uart3>;
  175. };
  176. &uart4 {
  177. status = "okay";
  178. pinctrl-names = "default";
  179. pinctrl-0 = <&pins_uart4>;
  180. };
  181. &i2c0 {
  182. status = "okay";
  183. pinctrl-names = "default";
  184. pinctrl-0 = <&pins_i2c0>;
  185. clock-frequency = <400000>;
  186. act8600: act8600@5a {
  187. compatible = "active-semi,act8600";
  188. reg = <0x5a>;
  189. status = "okay";
  190. regulators {
  191. vddcore: SUDCDC1 {
  192. regulator-name = "DCDC_REG1";
  193. regulator-min-microvolt = <1100000>;
  194. regulator-max-microvolt = <1100000>;
  195. regulator-always-on;
  196. };
  197. vddmem: SUDCDC2 {
  198. regulator-name = "DCDC_REG2";
  199. regulator-min-microvolt = <1500000>;
  200. regulator-max-microvolt = <1500000>;
  201. regulator-always-on;
  202. };
  203. vcc_33: SUDCDC3 {
  204. regulator-name = "DCDC_REG3";
  205. regulator-min-microvolt = <3300000>;
  206. regulator-max-microvolt = <3300000>;
  207. regulator-always-on;
  208. };
  209. vcc_50: SUDCDC4 {
  210. regulator-name = "SUDCDC_REG4";
  211. regulator-min-microvolt = <5000000>;
  212. regulator-max-microvolt = <5000000>;
  213. regulator-always-on;
  214. };
  215. vcc_25: LDO_REG5 {
  216. regulator-name = "LDO_REG5";
  217. regulator-min-microvolt = <2500000>;
  218. regulator-max-microvolt = <2500000>;
  219. regulator-always-on;
  220. };
  221. wifi_io: LDO_REG6 {
  222. regulator-name = "LDO_REG6";
  223. regulator-min-microvolt = <2500000>;
  224. regulator-max-microvolt = <2500000>;
  225. regulator-always-on;
  226. };
  227. vcc_28: LDO_REG7 {
  228. regulator-name = "LDO_REG7";
  229. regulator-min-microvolt = <2800000>;
  230. regulator-max-microvolt = <2800000>;
  231. regulator-always-on;
  232. };
  233. vcc_15: LDO_REG8 {
  234. regulator-name = "LDO_REG8";
  235. regulator-min-microvolt = <1500000>;
  236. regulator-max-microvolt = <1500000>;
  237. regulator-always-on;
  238. };
  239. vrtc_18: LDO_REG9 {
  240. regulator-name = "LDO_REG9";
  241. /* Despite the datasheet stating 3.3V
  242. * for REG9 and the driver expecting that,
  243. * REG9 outputs 1.8V.
  244. * Likely the CI20 uses a proprietary
  245. * factory programmed chip variant.
  246. * Since this is a simple on/off LDO the
  247. * exact values do not matter.
  248. */
  249. regulator-min-microvolt = <3300000>;
  250. regulator-max-microvolt = <3300000>;
  251. regulator-always-on;
  252. };
  253. vcc_11: LDO_REG10 {
  254. regulator-name = "LDO_REG10";
  255. regulator-min-microvolt = <1200000>;
  256. regulator-max-microvolt = <1200000>;
  257. regulator-always-on;
  258. };
  259. };
  260. };
  261. };
  262. &i2c1 {
  263. status = "okay";
  264. pinctrl-names = "default";
  265. pinctrl-0 = <&pins_i2c1>;
  266. };
  267. &i2c2 {
  268. status = "okay";
  269. pinctrl-names = "default";
  270. pinctrl-0 = <&pins_i2c2>;
  271. };
  272. &i2c3 {
  273. status = "okay";
  274. pinctrl-names = "default";
  275. pinctrl-0 = <&pins_i2c3>;
  276. };
  277. &i2c4 {
  278. status = "okay";
  279. pinctrl-names = "default";
  280. pinctrl-0 = <&pins_i2c4>;
  281. clock-frequency = <400000>;
  282. rtc@51 {
  283. compatible = "nxp,pcf8563";
  284. reg = <0x51>;
  285. interrupt-parent = <&gpf>;
  286. interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
  287. };
  288. };
  289. &nemc {
  290. status = "okay";
  291. nandc: nand-controller@1 {
  292. compatible = "ingenic,jz4780-nand";
  293. reg = <1 0 0x1000000>;
  294. #address-cells = <1>;
  295. #size-cells = <0>;
  296. ingenic,bch-controller = <&bch>;
  297. ingenic,nemc-tAS = <10>;
  298. ingenic,nemc-tAH = <5>;
  299. ingenic,nemc-tBP = <10>;
  300. ingenic,nemc-tAW = <15>;
  301. ingenic,nemc-tSTRV = <100>;
  302. /*
  303. * Only CLE/ALE are needed for the devices that are connected, rather
  304. * than the full address line set.
  305. */
  306. pinctrl-names = "default";
  307. pinctrl-0 = <&pins_nemc>;
  308. nand@1 {
  309. reg = <1>;
  310. nand-ecc-step-size = <1024>;
  311. nand-ecc-strength = <24>;
  312. nand-ecc-mode = "hw";
  313. nand-on-flash-bbt;
  314. pinctrl-names = "default";
  315. pinctrl-0 = <&pins_nemc_cs1>;
  316. partitions {
  317. compatible = "fixed-partitions";
  318. #address-cells = <2>;
  319. #size-cells = <2>;
  320. partition@0 {
  321. label = "u-boot-spl";
  322. reg = <0x0 0x0 0x0 0x800000>;
  323. };
  324. partition@800000 {
  325. label = "u-boot";
  326. reg = <0x0 0x800000 0x0 0x200000>;
  327. };
  328. partition@a00000 {
  329. label = "u-boot-env";
  330. reg = <0x0 0xa00000 0x0 0x200000>;
  331. };
  332. partition@c00000 {
  333. label = "boot";
  334. reg = <0x0 0xc00000 0x0 0x4000000>;
  335. };
  336. partition@4c00000 {
  337. label = "system";
  338. reg = <0x0 0x4c00000 0x1 0xfb400000>;
  339. };
  340. };
  341. };
  342. };
  343. dm9000@6 {
  344. compatible = "davicom,dm9000";
  345. davicom,no-eeprom;
  346. pinctrl-names = "default";
  347. pinctrl-0 = <&pins_nemc_cs6>;
  348. reg = <6 0 1 /* addr */
  349. 6 2 1>; /* data */
  350. ingenic,nemc-tAS = <15>;
  351. ingenic,nemc-tAH = <10>;
  352. ingenic,nemc-tBP = <20>;
  353. ingenic,nemc-tAW = <50>;
  354. ingenic,nemc-tSTRV = <100>;
  355. reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>;
  356. vcc-supply = <&eth0_power>;
  357. interrupt-parent = <&gpe>;
  358. interrupts = <19 4>;
  359. nvmem-cells = <&eth0_addr>;
  360. nvmem-cell-names = "mac-address";
  361. };
  362. };
  363. &bch {
  364. status = "okay";
  365. };
  366. &otg_phy {
  367. status = "okay";
  368. vcc-supply = <&otg_power>;
  369. };
  370. &otg {
  371. status = "okay";
  372. };
  373. &pinctrl {
  374. pins_uart0: uart0 {
  375. function = "uart0";
  376. groups = "uart0-data";
  377. bias-disable;
  378. };
  379. pins_uart1: uart1 {
  380. function = "uart1";
  381. groups = "uart1-data";
  382. bias-disable;
  383. };
  384. pins_uart2: uart2 {
  385. function = "uart2";
  386. groups = "uart2-data", "uart2-hwflow";
  387. bias-disable;
  388. };
  389. pins_uart3: uart3 {
  390. function = "uart3";
  391. groups = "uart3-data", "uart3-hwflow";
  392. bias-disable;
  393. };
  394. pins_uart4: uart4 {
  395. function = "uart4";
  396. groups = "uart4-data";
  397. bias-disable;
  398. };
  399. pins_i2c0: i2c0 {
  400. function = "i2c0";
  401. groups = "i2c0-data";
  402. bias-disable;
  403. };
  404. pins_i2c1: i2c1 {
  405. function = "i2c1";
  406. groups = "i2c1-data";
  407. bias-disable;
  408. };
  409. pins_i2c2: i2c2 {
  410. function = "i2c2";
  411. groups = "i2c2-data";
  412. bias-disable;
  413. };
  414. pins_i2c3: i2c3 {
  415. function = "i2c3";
  416. groups = "i2c3-data";
  417. bias-disable;
  418. };
  419. pins_i2c4: i2c4 {
  420. function = "i2c4";
  421. groups = "i2c4-data-e";
  422. bias-disable;
  423. };
  424. pins_hdmi_ddc: hdmi_ddc {
  425. function = "hdmi-ddc";
  426. groups = "hdmi-ddc";
  427. bias-disable;
  428. };
  429. pins_nemc: nemc {
  430. function = "nemc";
  431. groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
  432. bias-disable;
  433. };
  434. pins_nemc_cs1: nemc-cs1 {
  435. function = "nemc-cs1";
  436. groups = "nemc-cs1";
  437. bias-disable;
  438. };
  439. pins_nemc_cs6: nemc-cs6 {
  440. function = "nemc-cs6";
  441. groups = "nemc-cs6";
  442. bias-disable;
  443. };
  444. pins_mmc0: mmc0 {
  445. function = "mmc0";
  446. groups = "mmc0-1bit-e", "mmc0-4bit-e";
  447. bias-disable;
  448. };
  449. pins_mmc1: mmc1 {
  450. function = "mmc1";
  451. groups = "mmc1-1bit-d", "mmc1-4bit-d";
  452. bias-disable;
  453. };
  454. };
  455. &hdmi {
  456. status = "okay";
  457. pinctrl-names = "default";
  458. pinctrl-0 = <&pins_hdmi_ddc>;
  459. ports {
  460. #address-cells = <1>;
  461. #size-cells = <0>;
  462. port@0 {
  463. reg = <0>;
  464. dw_hdmi_in: endpoint {
  465. remote-endpoint = <&lcd_out>;
  466. };
  467. };
  468. port@1 {
  469. reg = <1>;
  470. dw_hdmi_out: endpoint {
  471. remote-endpoint = <&hdmi_con>;
  472. };
  473. };
  474. };
  475. };
  476. &lcdc0 {
  477. status = "okay";
  478. port {
  479. lcd_out: endpoint {
  480. remote-endpoint = <&dw_hdmi_in>;
  481. };
  482. };
  483. };