config.c 11 KB

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  1. /*
  2. * arch/m68k/mvme16x/config.c
  3. *
  4. * Copyright (C) 1995 Richard Hirst [[email protected]]
  5. *
  6. * Based on:
  7. *
  8. * linux/amiga/config.c
  9. *
  10. * Copyright (C) 1993 Hamish Macdonald
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file README.legal in the main directory of this archive
  14. * for more details.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mm.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/tty.h>
  21. #include <linux/clocksource.h>
  22. #include <linux/console.h>
  23. #include <linux/linkage.h>
  24. #include <linux/init.h>
  25. #include <linux/major.h>
  26. #include <linux/rtc.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/module.h>
  29. #include <asm/bootinfo.h>
  30. #include <asm/bootinfo-vme.h>
  31. #include <asm/byteorder.h>
  32. #include <asm/setup.h>
  33. #include <asm/irq.h>
  34. #include <asm/traps.h>
  35. #include <asm/machdep.h>
  36. #include <asm/mvme16xhw.h>
  37. #include <asm/config.h>
  38. extern t_bdid mvme_bdid;
  39. static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
  40. static void mvme16x_get_model(char *model);
  41. extern void mvme16x_sched_init(void);
  42. extern int mvme16x_hwclk (int, struct rtc_time *);
  43. extern void mvme16x_reset (void);
  44. int bcd2int (unsigned char b);
  45. unsigned short mvme16x_config;
  46. EXPORT_SYMBOL(mvme16x_config);
  47. int __init mvme16x_parse_bootinfo(const struct bi_record *bi)
  48. {
  49. uint16_t tag = be16_to_cpu(bi->tag);
  50. if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
  51. return 0;
  52. else
  53. return 1;
  54. }
  55. void mvme16x_reset(void)
  56. {
  57. pr_info("\r\n\nCalled mvme16x_reset\r\n"
  58. "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
  59. /* The string of returns is to delay the reset until the whole
  60. * message is output. Assert reset bit in GCSR */
  61. *(volatile char *)0xfff40107 = 0x80;
  62. }
  63. static void mvme16x_get_model(char *model)
  64. {
  65. p_bdid p = &mvme_bdid;
  66. char suf[4];
  67. suf[1] = p->brdsuffix[0];
  68. suf[2] = p->brdsuffix[1];
  69. suf[3] = '\0';
  70. suf[0] = suf[1] ? '-' : '\0';
  71. sprintf(model, "Motorola MVME%x%s", be16_to_cpu(p->brdno), suf);
  72. }
  73. static void mvme16x_get_hardware_list(struct seq_file *m)
  74. {
  75. uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
  76. if (brdno == 0x0162 || brdno == 0x0172)
  77. {
  78. unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
  79. seq_printf (m, "VMEchip2 %spresent\n",
  80. rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
  81. seq_printf (m, "SCSI interface %spresent\n",
  82. rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
  83. seq_printf (m, "Ethernet i/f %spresent\n",
  84. rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
  85. }
  86. }
  87. /*
  88. * This function is called during kernel startup to initialize
  89. * the mvme16x IRQ handling routines. Should probably ensure
  90. * that the base vectors for the VMEChip2 and PCCChip2 are valid.
  91. */
  92. static void __init mvme16x_init_IRQ (void)
  93. {
  94. m68k_setup_user_interrupt(VEC_USER, 192);
  95. }
  96. #define PCC2CHIP (0xfff42000)
  97. #define PCCSCCMICR (PCC2CHIP + 0x1d)
  98. #define PCCSCCTICR (PCC2CHIP + 0x1e)
  99. #define PCCSCCRICR (PCC2CHIP + 0x1f)
  100. #define PCCTPIACKR (PCC2CHIP + 0x25)
  101. #ifdef CONFIG_EARLY_PRINTK
  102. /**** cd2401 registers ****/
  103. #define CD2401_ADDR (0xfff45000)
  104. #define CyGFRCR (0x81)
  105. #define CyCCR (0x13)
  106. #define CyCLR_CHAN (0x40)
  107. #define CyINIT_CHAN (0x20)
  108. #define CyCHIP_RESET (0x10)
  109. #define CyENB_XMTR (0x08)
  110. #define CyDIS_XMTR (0x04)
  111. #define CyENB_RCVR (0x02)
  112. #define CyDIS_RCVR (0x01)
  113. #define CyCAR (0xee)
  114. #define CyIER (0x11)
  115. #define CyMdmCh (0x80)
  116. #define CyRxExc (0x20)
  117. #define CyRxData (0x08)
  118. #define CyTxMpty (0x02)
  119. #define CyTxRdy (0x01)
  120. #define CyLICR (0x26)
  121. #define CyRISR (0x89)
  122. #define CyTIMEOUT (0x80)
  123. #define CySPECHAR (0x70)
  124. #define CyOVERRUN (0x08)
  125. #define CyPARITY (0x04)
  126. #define CyFRAME (0x02)
  127. #define CyBREAK (0x01)
  128. #define CyREOIR (0x84)
  129. #define CyTEOIR (0x85)
  130. #define CyMEOIR (0x86)
  131. #define CyNOTRANS (0x08)
  132. #define CyRFOC (0x30)
  133. #define CyRDR (0xf8)
  134. #define CyTDR (0xf8)
  135. #define CyMISR (0x8b)
  136. #define CyRISR (0x89)
  137. #define CyTISR (0x8a)
  138. #define CyMSVR1 (0xde)
  139. #define CyMSVR2 (0xdf)
  140. #define CyDSR (0x80)
  141. #define CyDCD (0x40)
  142. #define CyCTS (0x20)
  143. #define CyDTR (0x02)
  144. #define CyRTS (0x01)
  145. #define CyRTPRL (0x25)
  146. #define CyRTPRH (0x24)
  147. #define CyCOR1 (0x10)
  148. #define CyPARITY_NONE (0x00)
  149. #define CyPARITY_E (0x40)
  150. #define CyPARITY_O (0xC0)
  151. #define Cy_5_BITS (0x04)
  152. #define Cy_6_BITS (0x05)
  153. #define Cy_7_BITS (0x06)
  154. #define Cy_8_BITS (0x07)
  155. #define CyCOR2 (0x17)
  156. #define CyETC (0x20)
  157. #define CyCtsAE (0x02)
  158. #define CyCOR3 (0x16)
  159. #define Cy_1_STOP (0x02)
  160. #define Cy_2_STOP (0x04)
  161. #define CyCOR4 (0x15)
  162. #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
  163. #define CyCOR5 (0x14)
  164. #define CyCOR6 (0x18)
  165. #define CyCOR7 (0x07)
  166. #define CyRBPR (0xcb)
  167. #define CyRCOR (0xc8)
  168. #define CyTBPR (0xc3)
  169. #define CyTCOR (0xc0)
  170. #define CySCHR1 (0x1f)
  171. #define CySCHR2 (0x1e)
  172. #define CyTPR (0xda)
  173. #define CyPILR1 (0xe3)
  174. #define CyPILR2 (0xe0)
  175. #define CyPILR3 (0xe1)
  176. #define CyCMR (0x1b)
  177. #define CyASYNC (0x02)
  178. #define CyLICR (0x26)
  179. #define CyLIVR (0x09)
  180. #define CySCRL (0x23)
  181. #define CySCRH (0x22)
  182. #define CyTFTC (0x80)
  183. void mvme16x_cons_write(struct console *co, const char *str, unsigned count)
  184. {
  185. volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
  186. volatile u_char sink;
  187. u_char ier;
  188. int port;
  189. u_char do_lf = 0;
  190. int i = 0;
  191. /* Ensure transmitter is enabled! */
  192. port = 0;
  193. base_addr[CyCAR] = (u_char)port;
  194. while (base_addr[CyCCR])
  195. ;
  196. base_addr[CyCCR] = CyENB_XMTR;
  197. ier = base_addr[CyIER];
  198. base_addr[CyIER] = CyTxMpty;
  199. while (1) {
  200. if (in_8(PCCSCCTICR) & 0x20)
  201. {
  202. /* We have a Tx int. Acknowledge it */
  203. sink = in_8(PCCTPIACKR);
  204. if ((base_addr[CyLICR] >> 2) == port) {
  205. if (i == count) {
  206. /* Last char of string is now output */
  207. base_addr[CyTEOIR] = CyNOTRANS;
  208. break;
  209. }
  210. if (do_lf) {
  211. base_addr[CyTDR] = '\n';
  212. str++;
  213. i++;
  214. do_lf = 0;
  215. }
  216. else if (*str == '\n') {
  217. base_addr[CyTDR] = '\r';
  218. do_lf = 1;
  219. }
  220. else {
  221. base_addr[CyTDR] = *str++;
  222. i++;
  223. }
  224. base_addr[CyTEOIR] = 0;
  225. }
  226. else
  227. base_addr[CyTEOIR] = CyNOTRANS;
  228. }
  229. }
  230. base_addr[CyIER] = ier;
  231. }
  232. #endif
  233. void __init config_mvme16x(void)
  234. {
  235. p_bdid p = &mvme_bdid;
  236. char id[40];
  237. uint16_t brdno = be16_to_cpu(p->brdno);
  238. mach_sched_init = mvme16x_sched_init;
  239. mach_init_IRQ = mvme16x_init_IRQ;
  240. mach_hwclk = mvme16x_hwclk;
  241. mach_reset = mvme16x_reset;
  242. mach_get_model = mvme16x_get_model;
  243. mach_get_hardware_list = mvme16x_get_hardware_list;
  244. /* Report board revision */
  245. if (strncmp("BDID", p->bdid, 4))
  246. {
  247. pr_crit("Bug call .BRD_ID returned garbage - giving up\n");
  248. while (1)
  249. ;
  250. }
  251. /* Board type is only set by newer versions of vmelilo/tftplilo */
  252. if (vme_brdtype == 0)
  253. vme_brdtype = brdno;
  254. mvme16x_get_model(id);
  255. pr_info("BRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev >> 4,
  256. p->rev & 0xf, p->yr, p->mth, p->day);
  257. if (brdno == 0x0162 || brdno == 0x172)
  258. {
  259. unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
  260. mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
  261. pr_info("MVME%x Hardware status:\n", brdno);
  262. pr_info(" CPU Type 68%s040\n",
  263. rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
  264. pr_info(" CPU clock %dMHz\n",
  265. rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
  266. pr_info(" VMEchip2 %spresent\n",
  267. rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
  268. pr_info(" SCSI interface %spresent\n",
  269. rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
  270. pr_info(" Ethernet interface %spresent\n",
  271. rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
  272. }
  273. else
  274. {
  275. mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
  276. }
  277. }
  278. static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
  279. {
  280. unsigned long *new = (unsigned long *)vectors;
  281. unsigned long *old = (unsigned long *)0xffe00000;
  282. volatile unsigned char uc, *ucp;
  283. uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
  284. if (brdno == 0x0162 || brdno == 0x172)
  285. {
  286. ucp = (volatile unsigned char *)0xfff42043;
  287. uc = *ucp | 8;
  288. *ucp = uc;
  289. }
  290. else
  291. {
  292. *(volatile unsigned long *)0xfff40074 = 0x40000000;
  293. }
  294. *(new+4) = *(old+4); /* Illegal instruction */
  295. *(new+9) = *(old+9); /* Trace */
  296. *(new+47) = *(old+47); /* Trap #15 */
  297. if (brdno == 0x0162 || brdno == 0x172)
  298. *(new+0x5e) = *(old+0x5e); /* ABORT switch */
  299. else
  300. *(new+0x6e) = *(old+0x6e); /* ABORT switch */
  301. return IRQ_HANDLED;
  302. }
  303. static u64 mvme16x_read_clk(struct clocksource *cs);
  304. static struct clocksource mvme16x_clk = {
  305. .name = "pcc",
  306. .rating = 250,
  307. .read = mvme16x_read_clk,
  308. .mask = CLOCKSOURCE_MASK(32),
  309. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  310. };
  311. static u32 clk_total;
  312. #define PCC_TIMER_CLOCK_FREQ 1000000
  313. #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
  314. #define PCCTCMP1 (PCC2CHIP + 0x04)
  315. #define PCCTCNT1 (PCC2CHIP + 0x08)
  316. #define PCCTOVR1 (PCC2CHIP + 0x17)
  317. #define PCCTIC1 (PCC2CHIP + 0x1b)
  318. #define PCCTOVR1_TIC_EN 0x01
  319. #define PCCTOVR1_COC_EN 0x02
  320. #define PCCTOVR1_OVR_CLR 0x04
  321. #define PCCTIC1_INT_LEVEL 6
  322. #define PCCTIC1_INT_CLR 0x08
  323. #define PCCTIC1_INT_EN 0x10
  324. static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
  325. {
  326. unsigned long flags;
  327. local_irq_save(flags);
  328. out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
  329. out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL);
  330. clk_total += PCC_TIMER_CYCLES;
  331. legacy_timer_tick(1);
  332. local_irq_restore(flags);
  333. return IRQ_HANDLED;
  334. }
  335. void mvme16x_sched_init(void)
  336. {
  337. uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
  338. int irq;
  339. /* Using PCCchip2 or MC2 chip tick timer 1 */
  340. if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
  341. NULL))
  342. panic ("Couldn't register timer int");
  343. out_be32(PCCTCNT1, 0);
  344. out_be32(PCCTCMP1, PCC_TIMER_CYCLES);
  345. out_8(PCCTOVR1, PCCTOVR1_OVR_CLR | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
  346. out_8(PCCTIC1, PCCTIC1_INT_EN | PCCTIC1_INT_CLR | PCCTIC1_INT_LEVEL);
  347. clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
  348. if (brdno == 0x0162 || brdno == 0x172)
  349. irq = MVME162_IRQ_ABORT;
  350. else
  351. irq = MVME167_IRQ_ABORT;
  352. if (request_irq(irq, mvme16x_abort_int, 0,
  353. "abort", mvme16x_abort_int))
  354. panic ("Couldn't register abort int");
  355. }
  356. static u64 mvme16x_read_clk(struct clocksource *cs)
  357. {
  358. unsigned long flags;
  359. u8 overflow, tmp;
  360. u32 ticks;
  361. local_irq_save(flags);
  362. tmp = in_8(PCCTOVR1) >> 4;
  363. ticks = in_be32(PCCTCNT1);
  364. overflow = in_8(PCCTOVR1) >> 4;
  365. if (overflow != tmp)
  366. ticks = in_be32(PCCTCNT1);
  367. ticks += overflow * PCC_TIMER_CYCLES;
  368. ticks += clk_total;
  369. local_irq_restore(flags);
  370. return ticks;
  371. }
  372. int bcd2int (unsigned char b)
  373. {
  374. return ((b>>4)*10 + (b&15));
  375. }
  376. int mvme16x_hwclk(int op, struct rtc_time *t)
  377. {
  378. if (!op) {
  379. rtc->ctrl = RTC_READ;
  380. t->tm_year = bcd2int (rtc->bcd_year);
  381. t->tm_mon = bcd2int(rtc->bcd_mth) - 1;
  382. t->tm_mday = bcd2int (rtc->bcd_dom);
  383. t->tm_hour = bcd2int (rtc->bcd_hr);
  384. t->tm_min = bcd2int (rtc->bcd_min);
  385. t->tm_sec = bcd2int (rtc->bcd_sec);
  386. rtc->ctrl = 0;
  387. if (t->tm_year < 70)
  388. t->tm_year += 100;
  389. } else {
  390. /* FIXME Setting the time is not yet supported */
  391. return -EOPNOTSUPP;
  392. }
  393. return 0;
  394. }