m523x.c 2.8 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697
  1. // SPDX-License-Identifier: GPL-2.0
  2. /***************************************************************************/
  3. /*
  4. * m523x.c -- platform support for ColdFire 523x based boards
  5. *
  6. * Sub-architcture dependent initialization code for the Freescale
  7. * 523x CPUs.
  8. *
  9. * Copyright (C) 1999-2005, Greg Ungerer ([email protected])
  10. * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
  11. */
  12. /***************************************************************************/
  13. #include <linux/clkdev.h>
  14. #include <linux/kernel.h>
  15. #include <linux/param.h>
  16. #include <linux/init.h>
  17. #include <linux/io.h>
  18. #include <asm/machdep.h>
  19. #include <asm/coldfire.h>
  20. #include <asm/mcfsim.h>
  21. #include <asm/mcfclk.h>
  22. /***************************************************************************/
  23. DEFINE_CLK(pll, "pll.0", MCF_CLK);
  24. DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
  25. static struct clk_lookup m523x_clk_lookup[] = {
  26. CLKDEV_INIT(NULL, "pll.0", &clk_pll),
  27. CLKDEV_INIT(NULL, "sys.0", &clk_sys),
  28. CLKDEV_INIT("mcfpit.0", NULL, &clk_pll),
  29. CLKDEV_INIT("mcfpit.1", NULL, &clk_pll),
  30. CLKDEV_INIT("mcfpit.2", NULL, &clk_pll),
  31. CLKDEV_INIT("mcfpit.3", NULL, &clk_pll),
  32. CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),
  33. CLKDEV_INIT("mcfuart.1", NULL, &clk_sys),
  34. CLKDEV_INIT("mcfuart.2", NULL, &clk_sys),
  35. CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys),
  36. CLKDEV_INIT("fec.0", NULL, &clk_sys),
  37. CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys),
  38. };
  39. /***************************************************************************/
  40. static void __init m523x_qspi_init(void)
  41. {
  42. #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
  43. u16 par;
  44. /* setup QSPS pins for QSPI with gpio CS control */
  45. writeb(0x1f, MCFGPIO_PAR_QSPI);
  46. /* and CS2 & CS3 as gpio */
  47. par = readw(MCFGPIO_PAR_TIMER);
  48. par &= 0x3f3f;
  49. writew(par, MCFGPIO_PAR_TIMER);
  50. #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
  51. }
  52. /***************************************************************************/
  53. static void __init m523x_i2c_init(void)
  54. {
  55. #if IS_ENABLED(CONFIG_I2C_IMX)
  56. u8 par;
  57. /* setup Port AS Pin Assignment Register for I2C */
  58. /* set PASPA0 to SCL and PASPA1 to SDA */
  59. par = readb(MCFGPIO_PAR_FECI2C);
  60. par |= 0x0f;
  61. writeb(par, MCFGPIO_PAR_FECI2C);
  62. #endif /* IS_ENABLED(CONFIG_I2C_IMX) */
  63. }
  64. /***************************************************************************/
  65. static void __init m523x_fec_init(void)
  66. {
  67. /* Set multi-function pins to ethernet use */
  68. writeb(readb(MCFGPIO_PAR_FECI2C) | 0xf0, MCFGPIO_PAR_FECI2C);
  69. }
  70. /***************************************************************************/
  71. void __init config_BSP(char *commandp, int size)
  72. {
  73. mach_sched_init = hw_timer_init;
  74. m523x_fec_init();
  75. m523x_qspi_init();
  76. m523x_i2c_init();
  77. clkdev_add_table(m523x_clk_lookup, ARRAY_SIZE(m523x_clk_lookup));
  78. }
  79. /***************************************************************************/