Kconfig.cpu 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539
  1. # SPDX-License-Identifier: GPL-2.0
  2. comment "Processor Type"
  3. choice
  4. prompt "CPU family support"
  5. default M68KCLASSIC if MMU
  6. default COLDFIRE if !MMU
  7. help
  8. The Freescale (was Motorola) M68K family of processors implements
  9. the full 68000 processor instruction set.
  10. The Freescale ColdFire family of processors is a modern derivative
  11. of the 68000 processor family. They are mainly targeted at embedded
  12. applications, and are all System-On-Chip (SOC) devices, as opposed
  13. to stand alone CPUs. They implement a subset of the original 68000
  14. processor instruction set.
  15. If you anticipate running this kernel on a computer with a classic
  16. MC68xxx processor, select M68KCLASSIC.
  17. If you anticipate running this kernel on a computer with a ColdFire
  18. processor, select COLDFIRE.
  19. config M68KCLASSIC
  20. bool "Classic M68K CPU family support"
  21. select HAVE_ARCH_PFN_VALID
  22. config COLDFIRE
  23. bool "Coldfire CPU family support"
  24. select ARCH_HAVE_CUSTOM_GPIO_H
  25. select CPU_HAS_NO_BITFIELDS
  26. select CPU_HAS_NO_CAS
  27. select CPU_HAS_NO_MULDIV64
  28. select GENERIC_CSUM
  29. select GPIOLIB
  30. select HAVE_LEGACY_CLK
  31. endchoice
  32. if M68KCLASSIC
  33. config M68000
  34. def_bool y
  35. depends on !MMU
  36. select CPU_HAS_NO_BITFIELDS
  37. select CPU_HAS_NO_CAS
  38. select CPU_HAS_NO_MULDIV64
  39. select CPU_HAS_NO_UNALIGNED
  40. select GENERIC_CSUM
  41. select CPU_NO_EFFICIENT_FFS
  42. select HAVE_ARCH_HASH
  43. select LEGACY_TIMER_TICK
  44. help
  45. The Freescale (was Motorola) 68000 CPU is the first generation of
  46. the well known M68K family of processors. The CPU core as well as
  47. being available as a stand alone CPU was also used in many
  48. System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  49. a paging MMU.
  50. config M68020
  51. bool "68020 support"
  52. depends on MMU
  53. select FPU
  54. select CPU_HAS_ADDRESS_SPACES
  55. help
  56. If you anticipate running this kernel on a computer with a MC68020
  57. processor, say Y. Otherwise, say N. Note that the 68020 requires a
  58. 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  59. Sun 3, which provides its own version.
  60. config M68030
  61. bool "68030 support"
  62. depends on MMU && !MMU_SUN3
  63. select FPU
  64. select CPU_HAS_ADDRESS_SPACES
  65. help
  66. If you anticipate running this kernel on a computer with a MC68030
  67. processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  68. work, as it does not include an MMU (Memory Management Unit).
  69. config M68040
  70. bool "68040 support"
  71. depends on MMU && !MMU_SUN3
  72. select FPU
  73. select CPU_HAS_ADDRESS_SPACES
  74. help
  75. If you anticipate running this kernel on a computer with a MC68LC040
  76. or MC68040 processor, say Y. Otherwise, say N. Note that an
  77. MC68EC040 will not work, as it does not include an MMU (Memory
  78. Management Unit).
  79. config M68060
  80. bool "68060 support"
  81. depends on MMU && !MMU_SUN3
  82. select FPU
  83. select CPU_HAS_ADDRESS_SPACES
  84. help
  85. If you anticipate running this kernel on a computer with a MC68060
  86. processor, say Y. Otherwise, say N.
  87. config M68328
  88. bool
  89. depends on !MMU
  90. select M68000
  91. help
  92. Motorola 68328 processor support.
  93. config M68EZ328
  94. bool
  95. depends on !MMU
  96. select M68000
  97. help
  98. Motorola 68EX328 processor support.
  99. config M68VZ328
  100. bool
  101. depends on !MMU
  102. select M68000
  103. help
  104. Motorola 68VZ328 processor support.
  105. endif # M68KCLASSIC
  106. if COLDFIRE
  107. choice
  108. prompt "ColdFire SoC type"
  109. default M520x
  110. help
  111. Select the type of ColdFire System-on-Chip (SoC) that you want
  112. to build for.
  113. config M5206
  114. bool "MCF5206"
  115. depends on !MMU
  116. select COLDFIRE_SW_A7
  117. select COLDFIRE_TIMERS
  118. select HAVE_MBAR
  119. select CPU_NO_EFFICIENT_FFS
  120. help
  121. Motorola ColdFire 5206 processor support.
  122. config M5206e
  123. bool "MCF5206e"
  124. depends on !MMU
  125. select COLDFIRE_SW_A7
  126. select COLDFIRE_TIMERS
  127. select HAVE_MBAR
  128. select CPU_NO_EFFICIENT_FFS
  129. help
  130. Motorola ColdFire 5206e processor support.
  131. config M520x
  132. bool "MCF520x"
  133. depends on !MMU
  134. select COLDFIRE_PIT_TIMER
  135. select HAVE_CACHE_SPLIT
  136. help
  137. Freescale Coldfire 5207/5208 processor support.
  138. config M523x
  139. bool "MCF523x"
  140. depends on !MMU
  141. select COLDFIRE_PIT_TIMER
  142. select HAVE_CACHE_SPLIT
  143. select HAVE_IPSBAR
  144. help
  145. Freescale Coldfire 5230/1/2/4/5 processor support
  146. config M5249
  147. bool "MCF5249"
  148. depends on !MMU
  149. select COLDFIRE_SW_A7
  150. select COLDFIRE_TIMERS
  151. select HAVE_MBAR
  152. select CPU_NO_EFFICIENT_FFS
  153. help
  154. Motorola ColdFire 5249 processor support.
  155. config M525x
  156. bool "MCF525x"
  157. depends on !MMU
  158. select COLDFIRE_SW_A7
  159. select COLDFIRE_TIMERS
  160. select HAVE_MBAR
  161. select CPU_NO_EFFICIENT_FFS
  162. help
  163. Freescale (Motorola) Coldfire 5251/5253 processor support.
  164. config M5271
  165. bool "MCF5271"
  166. depends on !MMU
  167. select COLDFIRE_PIT_TIMER
  168. select M527x
  169. select HAVE_CACHE_SPLIT
  170. select HAVE_IPSBAR
  171. help
  172. Freescale (Motorola) ColdFire 5270/5271 processor support.
  173. config M5272
  174. bool "MCF5272"
  175. depends on !MMU
  176. select COLDFIRE_SW_A7
  177. select COLDFIRE_TIMERS
  178. select HAVE_MBAR
  179. select CPU_NO_EFFICIENT_FFS
  180. help
  181. Motorola ColdFire 5272 processor support.
  182. config M5275
  183. bool "MCF5275"
  184. depends on !MMU
  185. select COLDFIRE_PIT_TIMER
  186. select M527x
  187. select HAVE_CACHE_SPLIT
  188. select HAVE_IPSBAR
  189. help
  190. Freescale (Motorola) ColdFire 5274/5275 processor support.
  191. config M528x
  192. bool "MCF528x"
  193. depends on !MMU
  194. select COLDFIRE_PIT_TIMER
  195. select HAVE_CACHE_SPLIT
  196. select HAVE_IPSBAR
  197. help
  198. Motorola ColdFire 5280/5282 processor support.
  199. config M5307
  200. bool "MCF5307"
  201. depends on !MMU
  202. select COLDFIRE_TIMERS
  203. select COLDFIRE_SW_A7
  204. select HAVE_CACHE_CB
  205. select HAVE_MBAR
  206. select CPU_NO_EFFICIENT_FFS
  207. help
  208. Motorola ColdFire 5307 processor support.
  209. config M532x
  210. bool "MCF532x"
  211. depends on !MMU
  212. select COLDFIRE_TIMERS
  213. select M53xx
  214. select HAVE_CACHE_CB
  215. help
  216. Freescale (Motorola) ColdFire 532x processor support.
  217. config M537x
  218. bool "MCF537x"
  219. depends on !MMU
  220. select COLDFIRE_TIMERS
  221. select M53xx
  222. select HAVE_CACHE_CB
  223. help
  224. Freescale ColdFire 537x processor support.
  225. config M5407
  226. bool "MCF5407"
  227. depends on !MMU
  228. select COLDFIRE_SW_A7
  229. select COLDFIRE_TIMERS
  230. select HAVE_CACHE_CB
  231. select HAVE_MBAR
  232. select CPU_NO_EFFICIENT_FFS
  233. help
  234. Motorola ColdFire 5407 processor support.
  235. config M547x
  236. bool "MCF547x"
  237. select M54xx
  238. select COLDFIRE_SLTIMERS
  239. select MMU_COLDFIRE if MMU
  240. select FPU if MMU
  241. select HAVE_CACHE_CB
  242. select HAVE_MBAR
  243. select CPU_NO_EFFICIENT_FFS
  244. help
  245. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
  246. config M548x
  247. bool "MCF548x"
  248. select COLDFIRE_SLTIMERS
  249. select MMU_COLDFIRE if MMU
  250. select FPU if MMU
  251. select M54xx
  252. select HAVE_CACHE_CB
  253. select HAVE_MBAR
  254. select CPU_NO_EFFICIENT_FFS
  255. help
  256. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
  257. config M5441x
  258. bool "MCF5441x"
  259. select COLDFIRE_PIT_TIMER
  260. select MMU_COLDFIRE if MMU
  261. select HAVE_CACHE_CB
  262. help
  263. Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
  264. endchoice
  265. config M527x
  266. bool
  267. config M53xx
  268. bool
  269. config M54xx
  270. select HAVE_PCI
  271. bool
  272. config COLDFIRE_PIT_TIMER
  273. bool
  274. config COLDFIRE_TIMERS
  275. bool
  276. select LEGACY_TIMER_TICK
  277. config COLDFIRE_SLTIMERS
  278. bool
  279. select LEGACY_TIMER_TICK
  280. endif # COLDFIRE
  281. comment "Processor Specific Options"
  282. config M68KFPU_EMU
  283. bool "Math emulation support"
  284. depends on M68KCLASSIC && FPU
  285. help
  286. At some point in the future, this will cause floating-point math
  287. instructions to be emulated by the kernel on machines that lack a
  288. floating-point math coprocessor. Thrill-seekers and chronically
  289. sleep-deprived psychotic hacker types can say Y now, everyone else
  290. should probably wait a while.
  291. config M68KFPU_EMU_EXTRAPREC
  292. bool "Math emulation extra precision"
  293. depends on M68KFPU_EMU
  294. help
  295. The fpu uses normally a few bit more during calculations for
  296. correct rounding, the emulator can (often) do the same but this
  297. extra calculation can cost quite some time, so you can disable
  298. it here. The emulator will then "only" calculate with a 64 bit
  299. mantissa and round slightly incorrect, what is more than enough
  300. for normal usage.
  301. config M68KFPU_EMU_ONLY
  302. bool "Math emulation only kernel"
  303. depends on M68KFPU_EMU
  304. help
  305. This option prevents any floating-point instructions from being
  306. compiled into the kernel, thereby the kernel doesn't save any
  307. floating point context anymore during task switches, so this
  308. kernel will only be usable on machines without a floating-point
  309. math coprocessor. This makes the kernel a bit faster as no tests
  310. needs to be executed whether a floating-point instruction in the
  311. kernel should be executed or not.
  312. config ADVANCED
  313. bool "Advanced configuration options"
  314. depends on MMU
  315. help
  316. This gives you access to some advanced options for the CPU. The
  317. defaults should be fine for most users, but these options may make
  318. it possible for you to improve performance somewhat if you know what
  319. you are doing.
  320. Note that the answer to this question won't directly affect the
  321. kernel: saying N will just cause the configurator to skip all
  322. the questions about these options.
  323. Most users should say N to this question.
  324. config RMW_INSNS
  325. bool "Use read-modify-write instructions"
  326. depends on ADVANCED && !CPU_HAS_NO_CAS
  327. help
  328. This allows to use certain instructions that work with indivisible
  329. read-modify-write bus cycles. While this is faster than the
  330. workaround of disabling interrupts, it can conflict with DMA
  331. ( = direct memory access) on many Amiga systems, and it is also said
  332. to destabilize other machines. It is very likely that this will
  333. cause serious problems on any Amiga or Atari Medusa if set. The only
  334. configuration where it should work are 68030-based Ataris, where it
  335. apparently improves performance. But you've been warned! Unless you
  336. really know what you are doing, say N. Try Y only if you're quite
  337. adventurous.
  338. config SINGLE_MEMORY_CHUNK
  339. bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
  340. depends on MMU
  341. default y if SUN3 || MMU_COLDFIRE
  342. help
  343. Ignore all but the first contiguous chunk of physical memory for VM
  344. purposes. This will save a few bytes kernel size and may speed up
  345. some operations.
  346. When this option os set to N, you may want to lower "Maximum zone
  347. order" to save memory that could be wasted for unused memory map.
  348. Say N if not sure.
  349. config ARCH_FORCE_MAX_ORDER
  350. int "Maximum zone order" if ADVANCED
  351. depends on !SINGLE_MEMORY_CHUNK
  352. default "11"
  353. help
  354. The kernel memory allocator divides physically contiguous memory
  355. blocks into "zones", where each zone is a power of two number of
  356. pages. This option selects the largest power of two that the kernel
  357. keeps in the memory allocator. If you need to allocate very large
  358. blocks of physically contiguous memory, then you may need to
  359. increase this value.
  360. For systems that have holes in their physical address space this
  361. value also defines the minimal size of the hole that allows
  362. freeing unused memory map.
  363. This config option is actually maximum order plus one. For example,
  364. a value of 11 means that the largest free memory block is 2^10 pages.
  365. config 060_WRITETHROUGH
  366. bool "Use write-through caching for 68060 supervisor accesses"
  367. depends on ADVANCED && M68060
  368. help
  369. The 68060 generally uses copyback caching of recently accessed data.
  370. Copyback caching means that memory writes will be held in an on-chip
  371. cache and only written back to memory some time later. Saying Y
  372. here will force supervisor (kernel) accesses to use writethrough
  373. caching. Writethrough caching means that data is written to memory
  374. straight away, so that cache and memory data always agree.
  375. Writethrough caching is less efficient, but is needed for some
  376. drivers on 68060 based systems where the 68060 bus snooping signal
  377. is hardwired on. The 53c710 SCSI driver is known to suffer from
  378. this problem.
  379. config M68K_L2_CACHE
  380. bool
  381. depends on MAC
  382. default y
  383. config CPU_HAS_NO_BITFIELDS
  384. bool
  385. config CPU_HAS_NO_CAS
  386. bool
  387. config CPU_HAS_NO_MULDIV64
  388. bool
  389. config CPU_HAS_NO_UNALIGNED
  390. bool
  391. config CPU_HAS_ADDRESS_SPACES
  392. bool
  393. select ALTERNATE_USER_ADDRESS_SPACE
  394. config FPU
  395. bool
  396. config COLDFIRE_SW_A7
  397. bool
  398. config HAVE_CACHE_SPLIT
  399. bool
  400. config HAVE_CACHE_CB
  401. bool
  402. config HAVE_MBAR
  403. bool
  404. config HAVE_IPSBAR
  405. bool
  406. config CLOCK_FREQ
  407. int "Set the core clock frequency"
  408. default "25000000" if M5206
  409. default "54000000" if M5206e
  410. default "166666666" if M520x
  411. default "140000000" if M5249
  412. default "150000000" if M527x || M523x
  413. default "90000000" if M5307
  414. default "50000000" if M5407
  415. default "266000000" if M54xx
  416. default "66666666"
  417. depends on COLDFIRE
  418. help
  419. Define the CPU clock frequency in use. This is the core clock
  420. frequency, it may or may not be the same as the external clock
  421. crystal fitted to your board. Some processors have an internal
  422. PLL and can have their frequency programmed at run time, others
  423. use internal dividers. In general the kernel won't setup a PLL
  424. if it is fitted (there are some exceptions). This value will be
  425. specific to the exact CPU that you are using.
  426. config OLDMASK
  427. bool "Old mask 5307 (1H55J) silicon"
  428. depends on M5307
  429. help
  430. Build support for the older revision ColdFire 5307 silicon.
  431. Specifically this is the 1H55J mask revision.
  432. if HAVE_CACHE_SPLIT
  433. choice
  434. prompt "Split Cache Configuration"
  435. default CACHE_I
  436. config CACHE_I
  437. bool "Instruction"
  438. help
  439. Use all of the ColdFire CPU cache memory as an instruction cache.
  440. config CACHE_D
  441. bool "Data"
  442. help
  443. Use all of the ColdFire CPU cache memory as a data cache.
  444. config CACHE_BOTH
  445. bool "Both"
  446. help
  447. Split the ColdFire CPU cache, and use half as an instruction cache
  448. and half as a data cache.
  449. endchoice
  450. endif # HAVE_CACHE_SPLIT
  451. if HAVE_CACHE_CB
  452. choice
  453. prompt "Data cache mode"
  454. default CACHE_WRITETHRU
  455. config CACHE_WRITETHRU
  456. bool "Write-through"
  457. help
  458. The ColdFire CPU cache is set into Write-through mode.
  459. config CACHE_COPYBACK
  460. bool "Copy-back"
  461. help
  462. The ColdFire CPU cache is set into Copy-back mode.
  463. endchoice
  464. endif # HAVE_CACHE_CB