setup.c 29 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Architecture-specific setup.
  4. *
  5. * Copyright (C) 1998-2001, 2003-2004 Hewlett-Packard Co
  6. * David Mosberger-Tang <[email protected]>
  7. * Stephane Eranian <[email protected]>
  8. * Copyright (C) 2000, 2004 Intel Corp
  9. * Rohit Seth <[email protected]>
  10. * Suresh Siddha <[email protected]>
  11. * Gordon Jin <[email protected]>
  12. * Copyright (C) 1999 VA Linux Systems
  13. * Copyright (C) 1999 Walt Drummond <[email protected]>
  14. *
  15. * 12/26/04 S.Siddha, G.Jin, R.Seth
  16. * Add multi-threading and multi-core detection
  17. * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
  18. * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
  19. * 03/31/00 R.Seth cpu_initialized and current->processor fixes
  20. * 02/04/00 D.Mosberger some more get_cpuinfo fixes...
  21. * 02/01/00 R.Seth fixed get_cpuinfo for SMP
  22. * 01/07/99 S.Eranian added the support for command line argument
  23. * 06/24/99 W.Drummond added boot_cpu_data.
  24. * 05/28/05 Z. Menyhart Dynamic stride size for "flush_icache_range()"
  25. */
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <linux/pgtable.h>
  29. #include <linux/acpi.h>
  30. #include <linux/console.h>
  31. #include <linux/delay.h>
  32. #include <linux/cpu.h>
  33. #include <linux/kdev_t.h>
  34. #include <linux/kernel.h>
  35. #include <linux/memblock.h>
  36. #include <linux/reboot.h>
  37. #include <linux/sched/mm.h>
  38. #include <linux/sched/clock.h>
  39. #include <linux/sched/task_stack.h>
  40. #include <linux/seq_file.h>
  41. #include <linux/string.h>
  42. #include <linux/threads.h>
  43. #include <linux/screen_info.h>
  44. #include <linux/dmi.h>
  45. #include <linux/root_dev.h>
  46. #include <linux/serial.h>
  47. #include <linux/serial_core.h>
  48. #include <linux/efi.h>
  49. #include <linux/initrd.h>
  50. #include <linux/pm.h>
  51. #include <linux/cpufreq.h>
  52. #include <linux/kexec.h>
  53. #include <linux/crash_dump.h>
  54. #include <asm/mca.h>
  55. #include <asm/meminit.h>
  56. #include <asm/page.h>
  57. #include <asm/patch.h>
  58. #include <asm/processor.h>
  59. #include <asm/sal.h>
  60. #include <asm/sections.h>
  61. #include <asm/setup.h>
  62. #include <asm/smp.h>
  63. #include <asm/tlbflush.h>
  64. #include <asm/unistd.h>
  65. #include <asm/uv/uv.h>
  66. #include <asm/xtp.h>
  67. #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
  68. # error "struct cpuinfo_ia64 too big!"
  69. #endif
  70. char ia64_platform_name[64];
  71. #ifdef CONFIG_SMP
  72. unsigned long __per_cpu_offset[NR_CPUS];
  73. EXPORT_SYMBOL(__per_cpu_offset);
  74. #endif
  75. DEFINE_PER_CPU(struct cpuinfo_ia64, ia64_cpu_info);
  76. EXPORT_SYMBOL(ia64_cpu_info);
  77. DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
  78. #ifdef CONFIG_SMP
  79. EXPORT_SYMBOL(local_per_cpu_offset);
  80. #endif
  81. unsigned long ia64_cycles_per_usec;
  82. struct ia64_boot_param *ia64_boot_param;
  83. struct screen_info screen_info;
  84. unsigned long vga_console_iobase;
  85. unsigned long vga_console_membase;
  86. static struct resource data_resource = {
  87. .name = "Kernel data",
  88. .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
  89. };
  90. static struct resource code_resource = {
  91. .name = "Kernel code",
  92. .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
  93. };
  94. static struct resource bss_resource = {
  95. .name = "Kernel bss",
  96. .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM
  97. };
  98. unsigned long ia64_max_cacheline_size;
  99. unsigned long ia64_iobase; /* virtual address for I/O accesses */
  100. EXPORT_SYMBOL(ia64_iobase);
  101. struct io_space io_space[MAX_IO_SPACES];
  102. EXPORT_SYMBOL(io_space);
  103. unsigned int num_io_spaces;
  104. /*
  105. * "flush_icache_range()" needs to know what processor dependent stride size to use
  106. * when it makes i-cache(s) coherent with d-caches.
  107. */
  108. #define I_CACHE_STRIDE_SHIFT 5 /* Safest way to go: 32 bytes by 32 bytes */
  109. unsigned long ia64_i_cache_stride_shift = ~0;
  110. /*
  111. * "clflush_cache_range()" needs to know what processor dependent stride size to
  112. * use when it flushes cache lines including both d-cache and i-cache.
  113. */
  114. /* Safest way to go: 32 bytes by 32 bytes */
  115. #define CACHE_STRIDE_SHIFT 5
  116. unsigned long ia64_cache_stride_shift = ~0;
  117. /*
  118. * We use a special marker for the end of memory and it uses the extra (+1) slot
  119. */
  120. struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1] __initdata;
  121. static int num_rsvd_regions __initdata;
  122. /*
  123. * Filter incoming memory segments based on the primitive map created from the boot
  124. * parameters. Segments contained in the map are removed from the memory ranges. A
  125. * caller-specified function is called with the memory ranges that remain after filtering.
  126. * This routine does not assume the incoming segments are sorted.
  127. */
  128. int __init
  129. filter_rsvd_memory (u64 start, u64 end, void *arg)
  130. {
  131. u64 range_start, range_end, prev_start;
  132. void (*func)(unsigned long, unsigned long, int);
  133. int i;
  134. #if IGNORE_PFN0
  135. if (start == PAGE_OFFSET) {
  136. printk(KERN_WARNING "warning: skipping physical page 0\n");
  137. start += PAGE_SIZE;
  138. if (start >= end) return 0;
  139. }
  140. #endif
  141. /*
  142. * lowest possible address(walker uses virtual)
  143. */
  144. prev_start = PAGE_OFFSET;
  145. func = arg;
  146. for (i = 0; i < num_rsvd_regions; ++i) {
  147. range_start = max(start, prev_start);
  148. range_end = min(end, rsvd_region[i].start);
  149. if (range_start < range_end)
  150. call_pernode_memory(__pa(range_start), range_end - range_start, func);
  151. /* nothing more available in this segment */
  152. if (range_end == end) return 0;
  153. prev_start = rsvd_region[i].end;
  154. }
  155. /* end of memory marker allows full processing inside loop body */
  156. return 0;
  157. }
  158. /*
  159. * Similar to "filter_rsvd_memory()", but the reserved memory ranges
  160. * are not filtered out.
  161. */
  162. int __init
  163. filter_memory(u64 start, u64 end, void *arg)
  164. {
  165. void (*func)(unsigned long, unsigned long, int);
  166. #if IGNORE_PFN0
  167. if (start == PAGE_OFFSET) {
  168. printk(KERN_WARNING "warning: skipping physical page 0\n");
  169. start += PAGE_SIZE;
  170. if (start >= end)
  171. return 0;
  172. }
  173. #endif
  174. func = arg;
  175. if (start < end)
  176. call_pernode_memory(__pa(start), end - start, func);
  177. return 0;
  178. }
  179. static void __init
  180. sort_regions (struct rsvd_region *rsvd_region, int max)
  181. {
  182. int j;
  183. /* simple bubble sorting */
  184. while (max--) {
  185. for (j = 0; j < max; ++j) {
  186. if (rsvd_region[j].start > rsvd_region[j+1].start) {
  187. swap(rsvd_region[j], rsvd_region[j + 1]);
  188. }
  189. }
  190. }
  191. }
  192. /* merge overlaps */
  193. static int __init
  194. merge_regions (struct rsvd_region *rsvd_region, int max)
  195. {
  196. int i;
  197. for (i = 1; i < max; ++i) {
  198. if (rsvd_region[i].start >= rsvd_region[i-1].end)
  199. continue;
  200. if (rsvd_region[i].end > rsvd_region[i-1].end)
  201. rsvd_region[i-1].end = rsvd_region[i].end;
  202. --max;
  203. memmove(&rsvd_region[i], &rsvd_region[i+1],
  204. (max - i) * sizeof(struct rsvd_region));
  205. }
  206. return max;
  207. }
  208. /*
  209. * Request address space for all standard resources
  210. */
  211. static int __init register_memory(void)
  212. {
  213. code_resource.start = ia64_tpa(_text);
  214. code_resource.end = ia64_tpa(_etext) - 1;
  215. data_resource.start = ia64_tpa(_etext);
  216. data_resource.end = ia64_tpa(_edata) - 1;
  217. bss_resource.start = ia64_tpa(__bss_start);
  218. bss_resource.end = ia64_tpa(_end) - 1;
  219. efi_initialize_iomem_resources(&code_resource, &data_resource,
  220. &bss_resource);
  221. return 0;
  222. }
  223. __initcall(register_memory);
  224. #ifdef CONFIG_KEXEC
  225. /*
  226. * This function checks if the reserved crashkernel is allowed on the specific
  227. * IA64 machine flavour. Machines without an IO TLB use swiotlb and require
  228. * some memory below 4 GB (i.e. in 32 bit area), see the implementation of
  229. * kernel/dma/swiotlb.c. The hpzx1 architecture has an IO TLB but cannot use that
  230. * in kdump case. See the comment in sba_init() in sba_iommu.c.
  231. *
  232. * So, the only machvec that really supports loading the kdump kernel
  233. * over 4 GB is "uv".
  234. */
  235. static int __init check_crashkernel_memory(unsigned long pbase, size_t size)
  236. {
  237. if (is_uv_system())
  238. return 1;
  239. else
  240. return pbase < (1UL << 32);
  241. }
  242. static void __init setup_crashkernel(unsigned long total, int *n)
  243. {
  244. unsigned long long base = 0, size = 0;
  245. int ret;
  246. ret = parse_crashkernel(boot_command_line, total,
  247. &size, &base);
  248. if (ret == 0 && size > 0) {
  249. if (!base) {
  250. sort_regions(rsvd_region, *n);
  251. *n = merge_regions(rsvd_region, *n);
  252. base = kdump_find_rsvd_region(size,
  253. rsvd_region, *n);
  254. }
  255. if (!check_crashkernel_memory(base, size)) {
  256. pr_warn("crashkernel: There would be kdump memory "
  257. "at %ld GB but this is unusable because it "
  258. "must\nbe below 4 GB. Change the memory "
  259. "configuration of the machine.\n",
  260. (unsigned long)(base >> 30));
  261. return;
  262. }
  263. if (base != ~0UL) {
  264. printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
  265. "for crashkernel (System RAM: %ldMB)\n",
  266. (unsigned long)(size >> 20),
  267. (unsigned long)(base >> 20),
  268. (unsigned long)(total >> 20));
  269. rsvd_region[*n].start =
  270. (unsigned long)__va(base);
  271. rsvd_region[*n].end =
  272. (unsigned long)__va(base + size);
  273. (*n)++;
  274. crashk_res.start = base;
  275. crashk_res.end = base + size - 1;
  276. }
  277. }
  278. efi_memmap_res.start = ia64_boot_param->efi_memmap;
  279. efi_memmap_res.end = efi_memmap_res.start +
  280. ia64_boot_param->efi_memmap_size;
  281. boot_param_res.start = __pa(ia64_boot_param);
  282. boot_param_res.end = boot_param_res.start +
  283. sizeof(*ia64_boot_param);
  284. }
  285. #else
  286. static inline void __init setup_crashkernel(unsigned long total, int *n)
  287. {}
  288. #endif
  289. #ifdef CONFIG_CRASH_DUMP
  290. static int __init reserve_elfcorehdr(u64 *start, u64 *end)
  291. {
  292. u64 length;
  293. /* We get the address using the kernel command line,
  294. * but the size is extracted from the EFI tables.
  295. * Both address and size are required for reservation
  296. * to work properly.
  297. */
  298. if (!is_vmcore_usable())
  299. return -EINVAL;
  300. if ((length = vmcore_find_descriptor_size(elfcorehdr_addr)) == 0) {
  301. vmcore_unusable();
  302. return -EINVAL;
  303. }
  304. *start = (unsigned long)__va(elfcorehdr_addr);
  305. *end = *start + length;
  306. return 0;
  307. }
  308. #endif /* CONFIG_CRASH_DUMP */
  309. /**
  310. * reserve_memory - setup reserved memory areas
  311. *
  312. * Setup the reserved memory areas set aside for the boot parameters,
  313. * initrd, etc. There are currently %IA64_MAX_RSVD_REGIONS defined,
  314. * see arch/ia64/include/asm/meminit.h if you need to define more.
  315. */
  316. void __init
  317. reserve_memory (void)
  318. {
  319. int n = 0;
  320. unsigned long total_memory;
  321. /*
  322. * none of the entries in this table overlap
  323. */
  324. rsvd_region[n].start = (unsigned long) ia64_boot_param;
  325. rsvd_region[n].end = rsvd_region[n].start + sizeof(*ia64_boot_param);
  326. n++;
  327. rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
  328. rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
  329. n++;
  330. rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
  331. rsvd_region[n].end = (rsvd_region[n].start
  332. + strlen(__va(ia64_boot_param->command_line)) + 1);
  333. n++;
  334. rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
  335. rsvd_region[n].end = (unsigned long) ia64_imva(_end);
  336. n++;
  337. #ifdef CONFIG_BLK_DEV_INITRD
  338. if (ia64_boot_param->initrd_start) {
  339. rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
  340. rsvd_region[n].end = rsvd_region[n].start + ia64_boot_param->initrd_size;
  341. n++;
  342. }
  343. #endif
  344. #ifdef CONFIG_CRASH_DUMP
  345. if (reserve_elfcorehdr(&rsvd_region[n].start,
  346. &rsvd_region[n].end) == 0)
  347. n++;
  348. #endif
  349. total_memory = efi_memmap_init(&rsvd_region[n].start, &rsvd_region[n].end);
  350. n++;
  351. setup_crashkernel(total_memory, &n);
  352. /* end of memory marker */
  353. rsvd_region[n].start = ~0UL;
  354. rsvd_region[n].end = ~0UL;
  355. n++;
  356. num_rsvd_regions = n;
  357. BUG_ON(IA64_MAX_RSVD_REGIONS + 1 < n);
  358. sort_regions(rsvd_region, num_rsvd_regions);
  359. num_rsvd_regions = merge_regions(rsvd_region, num_rsvd_regions);
  360. /* reserve all regions except the end of memory marker with memblock */
  361. for (n = 0; n < num_rsvd_regions - 1; n++) {
  362. struct rsvd_region *region = &rsvd_region[n];
  363. phys_addr_t addr = __pa(region->start);
  364. phys_addr_t size = region->end - region->start;
  365. memblock_reserve(addr, size);
  366. }
  367. }
  368. /**
  369. * find_initrd - get initrd parameters from the boot parameter structure
  370. *
  371. * Grab the initrd start and end from the boot parameter struct given us by
  372. * the boot loader.
  373. */
  374. void __init
  375. find_initrd (void)
  376. {
  377. #ifdef CONFIG_BLK_DEV_INITRD
  378. if (ia64_boot_param->initrd_start) {
  379. initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
  380. initrd_end = initrd_start+ia64_boot_param->initrd_size;
  381. printk(KERN_INFO "Initial ramdisk at: 0x%lx (%llu bytes)\n",
  382. initrd_start, ia64_boot_param->initrd_size);
  383. }
  384. #endif
  385. }
  386. static void __init
  387. io_port_init (void)
  388. {
  389. unsigned long phys_iobase;
  390. /*
  391. * Set `iobase' based on the EFI memory map or, failing that, the
  392. * value firmware left in ar.k0.
  393. *
  394. * Note that in ia32 mode, IN/OUT instructions use ar.k0 to compute
  395. * the port's virtual address, so ia32_load_state() loads it with a
  396. * user virtual address. But in ia64 mode, glibc uses the
  397. * *physical* address in ar.k0 to mmap the appropriate area from
  398. * /dev/mem, and the inX()/outX() interfaces use MMIO. In both
  399. * cases, user-mode can only use the legacy 0-64K I/O port space.
  400. *
  401. * ar.k0 is not involved in kernel I/O port accesses, which can use
  402. * any of the I/O port spaces and are done via MMIO using the
  403. * virtual mmio_base from the appropriate io_space[].
  404. */
  405. phys_iobase = efi_get_iobase();
  406. if (!phys_iobase) {
  407. phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
  408. printk(KERN_INFO "No I/O port range found in EFI memory map, "
  409. "falling back to AR.KR0 (0x%lx)\n", phys_iobase);
  410. }
  411. ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
  412. ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
  413. /* setup legacy IO port space */
  414. io_space[0].mmio_base = ia64_iobase;
  415. io_space[0].sparse = 1;
  416. num_io_spaces = 1;
  417. }
  418. /**
  419. * early_console_setup - setup debugging console
  420. *
  421. * Consoles started here require little enough setup that we can start using
  422. * them very early in the boot process, either right after the machine
  423. * vector initialization, or even before if the drivers can detect their hw.
  424. *
  425. * Returns non-zero if a console couldn't be setup.
  426. */
  427. static inline int __init
  428. early_console_setup (char *cmdline)
  429. {
  430. #ifdef CONFIG_EFI_PCDP
  431. if (!efi_setup_pcdp_console(cmdline))
  432. return 0;
  433. #endif
  434. return -1;
  435. }
  436. static void __init
  437. screen_info_setup(void)
  438. {
  439. unsigned int orig_x, orig_y, num_cols, num_rows, font_height;
  440. memset(&screen_info, 0, sizeof(screen_info));
  441. if (!ia64_boot_param->console_info.num_rows ||
  442. !ia64_boot_param->console_info.num_cols) {
  443. printk(KERN_WARNING "invalid screen-info, guessing 80x25\n");
  444. orig_x = 0;
  445. orig_y = 0;
  446. num_cols = 80;
  447. num_rows = 25;
  448. font_height = 16;
  449. } else {
  450. orig_x = ia64_boot_param->console_info.orig_x;
  451. orig_y = ia64_boot_param->console_info.orig_y;
  452. num_cols = ia64_boot_param->console_info.num_cols;
  453. num_rows = ia64_boot_param->console_info.num_rows;
  454. font_height = 400 / num_rows;
  455. }
  456. screen_info.orig_x = orig_x;
  457. screen_info.orig_y = orig_y;
  458. screen_info.orig_video_cols = num_cols;
  459. screen_info.orig_video_lines = num_rows;
  460. screen_info.orig_video_points = font_height;
  461. screen_info.orig_video_mode = 3; /* XXX fake */
  462. screen_info.orig_video_isVGA = 1; /* XXX fake */
  463. screen_info.orig_video_ega_bx = 3; /* XXX fake */
  464. }
  465. static inline void
  466. mark_bsp_online (void)
  467. {
  468. #ifdef CONFIG_SMP
  469. /* If we register an early console, allow CPU 0 to printk */
  470. set_cpu_online(smp_processor_id(), true);
  471. #endif
  472. }
  473. static __initdata int nomca;
  474. static __init int setup_nomca(char *s)
  475. {
  476. nomca = 1;
  477. return 0;
  478. }
  479. early_param("nomca", setup_nomca);
  480. void __init
  481. setup_arch (char **cmdline_p)
  482. {
  483. unw_init();
  484. ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
  485. *cmdline_p = __va(ia64_boot_param->command_line);
  486. strscpy(boot_command_line, *cmdline_p, COMMAND_LINE_SIZE);
  487. efi_init();
  488. io_port_init();
  489. uv_probe_system_type();
  490. parse_early_param();
  491. if (early_console_setup(*cmdline_p) == 0)
  492. mark_bsp_online();
  493. /* Initialize the ACPI boot-time table parser */
  494. acpi_table_init();
  495. early_acpi_boot_init();
  496. #ifdef CONFIG_ACPI_NUMA
  497. acpi_numa_init();
  498. acpi_numa_fixup();
  499. #ifdef CONFIG_ACPI_HOTPLUG_CPU
  500. prefill_possible_map();
  501. #endif
  502. per_cpu_scan_finalize((cpumask_empty(&early_cpu_possible_map) ?
  503. 32 : cpumask_weight(&early_cpu_possible_map)),
  504. additional_cpus > 0 ? additional_cpus : 0);
  505. #endif /* CONFIG_ACPI_NUMA */
  506. #ifdef CONFIG_SMP
  507. smp_build_cpu_map();
  508. #endif
  509. find_memory();
  510. /* process SAL system table: */
  511. ia64_sal_init(__va(sal_systab_phys));
  512. #ifdef CONFIG_ITANIUM
  513. ia64_patch_rse((u64) __start___rse_patchlist, (u64) __end___rse_patchlist);
  514. #else
  515. {
  516. unsigned long num_phys_stacked;
  517. if (ia64_pal_rse_info(&num_phys_stacked, 0) == 0 && num_phys_stacked > 96)
  518. ia64_patch_rse((u64) __start___rse_patchlist, (u64) __end___rse_patchlist);
  519. }
  520. #endif
  521. #ifdef CONFIG_SMP
  522. cpu_physical_id(0) = hard_smp_processor_id();
  523. #endif
  524. cpu_init(); /* initialize the bootstrap CPU */
  525. mmu_context_init(); /* initialize context_id bitmap */
  526. #ifdef CONFIG_VT
  527. if (!conswitchp) {
  528. # if defined(CONFIG_VGA_CONSOLE)
  529. /*
  530. * Non-legacy systems may route legacy VGA MMIO range to system
  531. * memory. vga_con probes the MMIO hole, so memory looks like
  532. * a VGA device to it. The EFI memory map can tell us if it's
  533. * memory so we can avoid this problem.
  534. */
  535. if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
  536. conswitchp = &vga_con;
  537. # endif
  538. }
  539. #endif
  540. /* enable IA-64 Machine Check Abort Handling unless disabled */
  541. if (!nomca)
  542. ia64_mca_init();
  543. /*
  544. * Default to /dev/sda2. This assumes that the EFI partition
  545. * is physical disk 1 partition 1 and the Linux root disk is
  546. * physical disk 1 partition 2.
  547. */
  548. ROOT_DEV = Root_SDA2; /* default to second partition on first drive */
  549. if (is_uv_system())
  550. uv_setup(cmdline_p);
  551. #ifdef CONFIG_SMP
  552. else
  553. init_smp_config();
  554. #endif
  555. screen_info_setup();
  556. paging_init();
  557. clear_sched_clock_stable();
  558. }
  559. /*
  560. * Display cpu info for all CPUs.
  561. */
  562. static int
  563. show_cpuinfo (struct seq_file *m, void *v)
  564. {
  565. #ifdef CONFIG_SMP
  566. # define lpj c->loops_per_jiffy
  567. # define cpunum c->cpu
  568. #else
  569. # define lpj loops_per_jiffy
  570. # define cpunum 0
  571. #endif
  572. static struct {
  573. unsigned long mask;
  574. const char *feature_name;
  575. } feature_bits[] = {
  576. { 1UL << 0, "branchlong" },
  577. { 1UL << 1, "spontaneous deferral"},
  578. { 1UL << 2, "16-byte atomic ops" }
  579. };
  580. char features[128], *cp, *sep;
  581. struct cpuinfo_ia64 *c = v;
  582. unsigned long mask;
  583. unsigned long proc_freq;
  584. int i, size;
  585. mask = c->features;
  586. /* build the feature string: */
  587. memcpy(features, "standard", 9);
  588. cp = features;
  589. size = sizeof(features);
  590. sep = "";
  591. for (i = 0; i < ARRAY_SIZE(feature_bits) && size > 1; ++i) {
  592. if (mask & feature_bits[i].mask) {
  593. cp += snprintf(cp, size, "%s%s", sep,
  594. feature_bits[i].feature_name),
  595. sep = ", ";
  596. mask &= ~feature_bits[i].mask;
  597. size = sizeof(features) - (cp - features);
  598. }
  599. }
  600. if (mask && size > 1) {
  601. /* print unknown features as a hex value */
  602. snprintf(cp, size, "%s0x%lx", sep, mask);
  603. }
  604. proc_freq = cpufreq_quick_get(cpunum);
  605. if (!proc_freq)
  606. proc_freq = c->proc_freq / 1000;
  607. seq_printf(m,
  608. "processor : %d\n"
  609. "vendor : %s\n"
  610. "arch : IA-64\n"
  611. "family : %u\n"
  612. "model : %u\n"
  613. "model name : %s\n"
  614. "revision : %u\n"
  615. "archrev : %u\n"
  616. "features : %s\n"
  617. "cpu number : %lu\n"
  618. "cpu regs : %u\n"
  619. "cpu MHz : %lu.%03lu\n"
  620. "itc MHz : %lu.%06lu\n"
  621. "BogoMIPS : %lu.%02lu\n",
  622. cpunum, c->vendor, c->family, c->model,
  623. c->model_name, c->revision, c->archrev,
  624. features, c->ppn, c->number,
  625. proc_freq / 1000, proc_freq % 1000,
  626. c->itc_freq / 1000000, c->itc_freq % 1000000,
  627. lpj*HZ/500000, (lpj*HZ/5000) % 100);
  628. #ifdef CONFIG_SMP
  629. seq_printf(m, "siblings : %u\n",
  630. cpumask_weight(&cpu_core_map[cpunum]));
  631. if (c->socket_id != -1)
  632. seq_printf(m, "physical id: %u\n", c->socket_id);
  633. if (c->threads_per_core > 1 || c->cores_per_socket > 1)
  634. seq_printf(m,
  635. "core id : %u\n"
  636. "thread id : %u\n",
  637. c->core_id, c->thread_id);
  638. #endif
  639. seq_printf(m,"\n");
  640. return 0;
  641. }
  642. static void *
  643. c_start (struct seq_file *m, loff_t *pos)
  644. {
  645. #ifdef CONFIG_SMP
  646. while (*pos < nr_cpu_ids && !cpu_online(*pos))
  647. ++*pos;
  648. #endif
  649. return *pos < nr_cpu_ids ? cpu_data(*pos) : NULL;
  650. }
  651. static void *
  652. c_next (struct seq_file *m, void *v, loff_t *pos)
  653. {
  654. ++*pos;
  655. return c_start(m, pos);
  656. }
  657. static void
  658. c_stop (struct seq_file *m, void *v)
  659. {
  660. }
  661. const struct seq_operations cpuinfo_op = {
  662. .start = c_start,
  663. .next = c_next,
  664. .stop = c_stop,
  665. .show = show_cpuinfo
  666. };
  667. #define MAX_BRANDS 8
  668. static char brandname[MAX_BRANDS][128];
  669. static char *
  670. get_model_name(__u8 family, __u8 model)
  671. {
  672. static int overflow;
  673. char brand[128];
  674. int i;
  675. memcpy(brand, "Unknown", 8);
  676. if (ia64_pal_get_brand_info(brand)) {
  677. if (family == 0x7)
  678. memcpy(brand, "Merced", 7);
  679. else if (family == 0x1f) switch (model) {
  680. case 0: memcpy(brand, "McKinley", 9); break;
  681. case 1: memcpy(brand, "Madison", 8); break;
  682. case 2: memcpy(brand, "Madison up to 9M cache", 23); break;
  683. }
  684. }
  685. for (i = 0; i < MAX_BRANDS; i++)
  686. if (strcmp(brandname[i], brand) == 0)
  687. return brandname[i];
  688. for (i = 0; i < MAX_BRANDS; i++)
  689. if (brandname[i][0] == '\0')
  690. return strcpy(brandname[i], brand);
  691. if (overflow++ == 0)
  692. printk(KERN_ERR
  693. "%s: Table overflow. Some processor model information will be missing\n",
  694. __func__);
  695. return "Unknown";
  696. }
  697. static void
  698. identify_cpu (struct cpuinfo_ia64 *c)
  699. {
  700. union {
  701. unsigned long bits[5];
  702. struct {
  703. /* id 0 & 1: */
  704. char vendor[16];
  705. /* id 2 */
  706. u64 ppn; /* processor serial number */
  707. /* id 3: */
  708. unsigned number : 8;
  709. unsigned revision : 8;
  710. unsigned model : 8;
  711. unsigned family : 8;
  712. unsigned archrev : 8;
  713. unsigned reserved : 24;
  714. /* id 4: */
  715. u64 features;
  716. } field;
  717. } cpuid;
  718. pal_vm_info_1_u_t vm1;
  719. pal_vm_info_2_u_t vm2;
  720. pal_status_t status;
  721. unsigned long impl_va_msb = 50, phys_addr_size = 44; /* Itanium defaults */
  722. int i;
  723. for (i = 0; i < 5; ++i)
  724. cpuid.bits[i] = ia64_get_cpuid(i);
  725. memcpy(c->vendor, cpuid.field.vendor, 16);
  726. #ifdef CONFIG_SMP
  727. c->cpu = smp_processor_id();
  728. /* below default values will be overwritten by identify_siblings()
  729. * for Multi-Threading/Multi-Core capable CPUs
  730. */
  731. c->threads_per_core = c->cores_per_socket = c->num_log = 1;
  732. c->socket_id = -1;
  733. identify_siblings(c);
  734. if (c->threads_per_core > smp_num_siblings)
  735. smp_num_siblings = c->threads_per_core;
  736. #endif
  737. c->ppn = cpuid.field.ppn;
  738. c->number = cpuid.field.number;
  739. c->revision = cpuid.field.revision;
  740. c->model = cpuid.field.model;
  741. c->family = cpuid.field.family;
  742. c->archrev = cpuid.field.archrev;
  743. c->features = cpuid.field.features;
  744. c->model_name = get_model_name(c->family, c->model);
  745. status = ia64_pal_vm_summary(&vm1, &vm2);
  746. if (status == PAL_STATUS_SUCCESS) {
  747. impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
  748. phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
  749. }
  750. c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
  751. c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
  752. }
  753. /*
  754. * Do the following calculations:
  755. *
  756. * 1. the max. cache line size.
  757. * 2. the minimum of the i-cache stride sizes for "flush_icache_range()".
  758. * 3. the minimum of the cache stride sizes for "clflush_cache_range()".
  759. */
  760. static void
  761. get_cache_info(void)
  762. {
  763. unsigned long line_size, max = 1;
  764. unsigned long l, levels, unique_caches;
  765. pal_cache_config_info_t cci;
  766. long status;
  767. status = ia64_pal_cache_summary(&levels, &unique_caches);
  768. if (status != 0) {
  769. printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
  770. __func__, status);
  771. max = SMP_CACHE_BYTES;
  772. /* Safest setup for "flush_icache_range()" */
  773. ia64_i_cache_stride_shift = I_CACHE_STRIDE_SHIFT;
  774. /* Safest setup for "clflush_cache_range()" */
  775. ia64_cache_stride_shift = CACHE_STRIDE_SHIFT;
  776. goto out;
  777. }
  778. for (l = 0; l < levels; ++l) {
  779. /* cache_type (data_or_unified)=2 */
  780. status = ia64_pal_cache_config_info(l, 2, &cci);
  781. if (status != 0) {
  782. printk(KERN_ERR "%s: ia64_pal_cache_config_info"
  783. "(l=%lu, 2) failed (status=%ld)\n",
  784. __func__, l, status);
  785. max = SMP_CACHE_BYTES;
  786. /* The safest setup for "flush_icache_range()" */
  787. cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
  788. /* The safest setup for "clflush_cache_range()" */
  789. ia64_cache_stride_shift = CACHE_STRIDE_SHIFT;
  790. cci.pcci_unified = 1;
  791. } else {
  792. if (cci.pcci_stride < ia64_cache_stride_shift)
  793. ia64_cache_stride_shift = cci.pcci_stride;
  794. line_size = 1 << cci.pcci_line_size;
  795. if (line_size > max)
  796. max = line_size;
  797. }
  798. if (!cci.pcci_unified) {
  799. /* cache_type (instruction)=1*/
  800. status = ia64_pal_cache_config_info(l, 1, &cci);
  801. if (status != 0) {
  802. printk(KERN_ERR "%s: ia64_pal_cache_config_info"
  803. "(l=%lu, 1) failed (status=%ld)\n",
  804. __func__, l, status);
  805. /* The safest setup for flush_icache_range() */
  806. cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
  807. }
  808. }
  809. if (cci.pcci_stride < ia64_i_cache_stride_shift)
  810. ia64_i_cache_stride_shift = cci.pcci_stride;
  811. }
  812. out:
  813. if (max > ia64_max_cacheline_size)
  814. ia64_max_cacheline_size = max;
  815. }
  816. /*
  817. * cpu_init() initializes state that is per-CPU. This function acts
  818. * as a 'CPU state barrier', nothing should get across.
  819. */
  820. void
  821. cpu_init (void)
  822. {
  823. extern void ia64_mmu_init(void *);
  824. static unsigned long max_num_phys_stacked = IA64_NUM_PHYS_STACK_REG;
  825. unsigned long num_phys_stacked;
  826. pal_vm_info_2_u_t vmi;
  827. unsigned int max_ctx;
  828. struct cpuinfo_ia64 *cpu_info;
  829. void *cpu_data;
  830. cpu_data = per_cpu_init();
  831. #ifdef CONFIG_SMP
  832. /*
  833. * insert boot cpu into sibling and core mapes
  834. * (must be done after per_cpu area is setup)
  835. */
  836. if (smp_processor_id() == 0) {
  837. cpumask_set_cpu(0, &per_cpu(cpu_sibling_map, 0));
  838. cpumask_set_cpu(0, &cpu_core_map[0]);
  839. } else {
  840. /*
  841. * Set ar.k3 so that assembly code in MCA handler can compute
  842. * physical addresses of per cpu variables with a simple:
  843. * phys = ar.k3 + &per_cpu_var
  844. * and the alt-dtlb-miss handler can set per-cpu mapping into
  845. * the TLB when needed. head.S already did this for cpu0.
  846. */
  847. ia64_set_kr(IA64_KR_PER_CPU_DATA,
  848. ia64_tpa(cpu_data) - (long) __per_cpu_start);
  849. }
  850. #endif
  851. get_cache_info();
  852. /*
  853. * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
  854. * ia64_mmu_init() yet. And we can't call ia64_mmu_init() first because it
  855. * depends on the data returned by identify_cpu(). We break the dependency by
  856. * accessing cpu_data() through the canonical per-CPU address.
  857. */
  858. cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(ia64_cpu_info) - __per_cpu_start);
  859. identify_cpu(cpu_info);
  860. #ifdef CONFIG_MCKINLEY
  861. {
  862. # define FEATURE_SET 16
  863. struct ia64_pal_retval iprv;
  864. if (cpu_info->family == 0x1f) {
  865. PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
  866. if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
  867. PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
  868. (iprv.v1 | 0x80), FEATURE_SET, 0);
  869. }
  870. }
  871. #endif
  872. /* Clear the stack memory reserved for pt_regs: */
  873. memset(task_pt_regs(current), 0, sizeof(struct pt_regs));
  874. ia64_set_kr(IA64_KR_FPU_OWNER, 0);
  875. /*
  876. * Initialize the page-table base register to a global
  877. * directory with all zeroes. This ensure that we can handle
  878. * TLB-misses to user address-space even before we created the
  879. * first user address-space. This may happen, e.g., due to
  880. * aggressive use of lfetch.fault.
  881. */
  882. ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
  883. /*
  884. * Initialize default control register to defer speculative faults except
  885. * for those arising from TLB misses, which are not deferred. The
  886. * kernel MUST NOT depend on a particular setting of these bits (in other words,
  887. * the kernel must have recovery code for all speculative accesses). Turn on
  888. * dcr.lc as per recommendation by the architecture team. Most IA-32 apps
  889. * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
  890. * be fine).
  891. */
  892. ia64_setreg(_IA64_REG_CR_DCR, ( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
  893. | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
  894. mmgrab(&init_mm);
  895. current->active_mm = &init_mm;
  896. BUG_ON(current->mm);
  897. ia64_mmu_init(ia64_imva(cpu_data));
  898. ia64_mca_cpu_init(ia64_imva(cpu_data));
  899. /* Clear ITC to eliminate sched_clock() overflows in human time. */
  900. ia64_set_itc(0);
  901. /* disable all local interrupt sources: */
  902. ia64_set_itv(1 << 16);
  903. ia64_set_lrr0(1 << 16);
  904. ia64_set_lrr1(1 << 16);
  905. ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
  906. ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
  907. /* clear TPR & XTP to enable all interrupt classes: */
  908. ia64_setreg(_IA64_REG_CR_TPR, 0);
  909. /* Clear any pending interrupts left by SAL/EFI */
  910. while (ia64_get_ivr() != IA64_SPURIOUS_INT_VECTOR)
  911. ia64_eoi();
  912. #ifdef CONFIG_SMP
  913. normal_xtp();
  914. #endif
  915. /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
  916. if (ia64_pal_vm_summary(NULL, &vmi) == 0) {
  917. max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
  918. setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, NPTCG_FROM_PAL);
  919. } else {
  920. printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
  921. max_ctx = (1U << 15) - 1; /* use architected minimum */
  922. }
  923. while (max_ctx < ia64_ctx.max_ctx) {
  924. unsigned int old = ia64_ctx.max_ctx;
  925. if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
  926. break;
  927. }
  928. if (ia64_pal_rse_info(&num_phys_stacked, NULL) != 0) {
  929. printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
  930. "stacked regs\n");
  931. num_phys_stacked = 96;
  932. }
  933. /* size of physical stacked register partition plus 8 bytes: */
  934. if (num_phys_stacked > max_num_phys_stacked) {
  935. ia64_patch_phys_stack_reg(num_phys_stacked*8 + 8);
  936. max_num_phys_stacked = num_phys_stacked;
  937. }
  938. }
  939. void __init arch_cpu_finalize_init(void)
  940. {
  941. ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
  942. (unsigned long) __end___mckinley_e9_bundles);
  943. }
  944. static int __init run_dmi_scan(void)
  945. {
  946. dmi_setup();
  947. return 0;
  948. }
  949. core_initcall(run_dmi_scan);