entry.h 3.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Preserved registers that are shared between code in ivt.S and
  4. * entry.S. Be careful not to step on these!
  5. */
  6. #define PRED_LEAVE_SYSCALL 1 /* TRUE iff leave from syscall */
  7. #define PRED_KERNEL_STACK 2 /* returning to kernel-stacks? */
  8. #define PRED_USER_STACK 3 /* returning to user-stacks? */
  9. #define PRED_SYSCALL 4 /* inside a system call? */
  10. #define PRED_NON_SYSCALL 5 /* complement of PRED_SYSCALL */
  11. #ifdef __ASSEMBLY__
  12. # define PASTE2(x,y) x##y
  13. # define PASTE(x,y) PASTE2(x,y)
  14. # define pLvSys PASTE(p,PRED_LEAVE_SYSCALL)
  15. # define pKStk PASTE(p,PRED_KERNEL_STACK)
  16. # define pUStk PASTE(p,PRED_USER_STACK)
  17. # define pSys PASTE(p,PRED_SYSCALL)
  18. # define pNonSys PASTE(p,PRED_NON_SYSCALL)
  19. #endif
  20. #define PT(f) (IA64_PT_REGS_##f##_OFFSET)
  21. #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET)
  22. #define SOS(f) (IA64_SAL_OS_STATE_##f##_OFFSET)
  23. #define PT_REGS_SAVES(off) \
  24. .unwabi 3, 'i'; \
  25. .fframe IA64_PT_REGS_SIZE+16+(off); \
  26. .spillsp rp, PT(CR_IIP)+16+(off); \
  27. .spillsp ar.pfs, PT(CR_IFS)+16+(off); \
  28. .spillsp ar.unat, PT(AR_UNAT)+16+(off); \
  29. .spillsp ar.fpsr, PT(AR_FPSR)+16+(off); \
  30. .spillsp pr, PT(PR)+16+(off);
  31. #define PT_REGS_UNWIND_INFO(off) \
  32. .prologue; \
  33. PT_REGS_SAVES(off); \
  34. .body
  35. #define SWITCH_STACK_SAVES(off) \
  36. .savesp ar.unat,SW(CALLER_UNAT)+16+(off); \
  37. .savesp ar.fpsr,SW(AR_FPSR)+16+(off); \
  38. .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \
  39. .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \
  40. .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \
  41. .spillsp f18,SW(F18)+16+(off); .spillsp f19,SW(F19)+16+(off); \
  42. .spillsp f20,SW(F20)+16+(off); .spillsp f21,SW(F21)+16+(off); \
  43. .spillsp f22,SW(F22)+16+(off); .spillsp f23,SW(F23)+16+(off); \
  44. .spillsp f24,SW(F24)+16+(off); .spillsp f25,SW(F25)+16+(off); \
  45. .spillsp f26,SW(F26)+16+(off); .spillsp f27,SW(F27)+16+(off); \
  46. .spillsp f28,SW(F28)+16+(off); .spillsp f29,SW(F29)+16+(off); \
  47. .spillsp f30,SW(F30)+16+(off); .spillsp f31,SW(F31)+16+(off); \
  48. .spillsp r4,SW(R4)+16+(off); .spillsp r5,SW(R5)+16+(off); \
  49. .spillsp r6,SW(R6)+16+(off); .spillsp r7,SW(R7)+16+(off); \
  50. .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off); \
  51. .spillsp b2,SW(B2)+16+(off); .spillsp b3,SW(B3)+16+(off); \
  52. .spillsp b4,SW(B4)+16+(off); .spillsp b5,SW(B5)+16+(off); \
  53. .spillsp ar.pfs,SW(AR_PFS)+16+(off); .spillsp ar.lc,SW(AR_LC)+16+(off); \
  54. .spillsp @priunat,SW(AR_UNAT)+16+(off); \
  55. .spillsp ar.rnat,SW(AR_RNAT)+16+(off); \
  56. .spillsp ar.bspstore,SW(AR_BSPSTORE)+16+(off); \
  57. .spillsp pr,SW(PR)+16+(off)
  58. #define DO_SAVE_SWITCH_STACK \
  59. movl r28=1f; \
  60. ;; \
  61. .fframe IA64_SWITCH_STACK_SIZE; \
  62. adds sp=-IA64_SWITCH_STACK_SIZE,sp; \
  63. mov.ret.sptk b7=r28,1f; \
  64. SWITCH_STACK_SAVES(0); \
  65. br.cond.sptk.many save_switch_stack; \
  66. 1:
  67. #define DO_LOAD_SWITCH_STACK \
  68. movl r28=1f; \
  69. ;; \
  70. invala; \
  71. mov.ret.sptk b7=r28,1f; \
  72. br.cond.sptk.many load_switch_stack; \
  73. 1: .restore sp; \
  74. adds sp=IA64_SWITCH_STACK_SIZE,sp