actions-arm.c 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2012 Rabin Vincent <rabin at rab.in>
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/types.h>
  7. #include <linux/stddef.h>
  8. #include <linux/wait.h>
  9. #include <linux/uprobes.h>
  10. #include <linux/module.h>
  11. #include "../decode.h"
  12. #include "../decode-arm.h"
  13. #include "core.h"
  14. static int uprobes_substitute_pc(unsigned long *pinsn, u32 oregs)
  15. {
  16. probes_opcode_t insn = __mem_to_opcode_arm(*pinsn);
  17. probes_opcode_t temp;
  18. probes_opcode_t mask;
  19. int freereg;
  20. u32 free = 0xffff;
  21. u32 regs;
  22. for (regs = oregs; regs; regs >>= 4, insn >>= 4) {
  23. if ((regs & 0xf) == REG_TYPE_NONE)
  24. continue;
  25. free &= ~(1 << (insn & 0xf));
  26. }
  27. /* No PC, no problem */
  28. if (free & (1 << 15))
  29. return 15;
  30. if (!free)
  31. return -1;
  32. /*
  33. * fls instead of ffs ensures that for "ldrd r0, r1, [pc]" we would
  34. * pick LR instead of R1.
  35. */
  36. freereg = free = fls(free) - 1;
  37. temp = __mem_to_opcode_arm(*pinsn);
  38. insn = temp;
  39. regs = oregs;
  40. mask = 0xf;
  41. for (; regs; regs >>= 4, mask <<= 4, free <<= 4, temp >>= 4) {
  42. if ((regs & 0xf) == REG_TYPE_NONE)
  43. continue;
  44. if ((temp & 0xf) != 15)
  45. continue;
  46. insn &= ~mask;
  47. insn |= free & mask;
  48. }
  49. *pinsn = __opcode_to_mem_arm(insn);
  50. return freereg;
  51. }
  52. static void uprobe_set_pc(struct arch_uprobe *auprobe,
  53. struct arch_uprobe_task *autask,
  54. struct pt_regs *regs)
  55. {
  56. u32 pcreg = auprobe->pcreg;
  57. autask->backup = regs->uregs[pcreg];
  58. regs->uregs[pcreg] = regs->ARM_pc + 8;
  59. }
  60. static void uprobe_unset_pc(struct arch_uprobe *auprobe,
  61. struct arch_uprobe_task *autask,
  62. struct pt_regs *regs)
  63. {
  64. /* PC will be taken care of by common code */
  65. regs->uregs[auprobe->pcreg] = autask->backup;
  66. }
  67. static void uprobe_aluwrite_pc(struct arch_uprobe *auprobe,
  68. struct arch_uprobe_task *autask,
  69. struct pt_regs *regs)
  70. {
  71. u32 pcreg = auprobe->pcreg;
  72. alu_write_pc(regs->uregs[pcreg], regs);
  73. regs->uregs[pcreg] = autask->backup;
  74. }
  75. static void uprobe_write_pc(struct arch_uprobe *auprobe,
  76. struct arch_uprobe_task *autask,
  77. struct pt_regs *regs)
  78. {
  79. u32 pcreg = auprobe->pcreg;
  80. load_write_pc(regs->uregs[pcreg], regs);
  81. regs->uregs[pcreg] = autask->backup;
  82. }
  83. enum probes_insn
  84. decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi,
  85. const struct decode_header *d)
  86. {
  87. struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
  88. asi);
  89. struct decode_emulate *decode = (struct decode_emulate *) d;
  90. u32 regs = decode->header.type_regs.bits >> DECODE_TYPE_BITS;
  91. int reg;
  92. reg = uprobes_substitute_pc(&auprobe->ixol[0], regs);
  93. if (reg == 15)
  94. return INSN_GOOD;
  95. if (reg == -1)
  96. return INSN_REJECTED;
  97. auprobe->pcreg = reg;
  98. auprobe->prehandler = uprobe_set_pc;
  99. auprobe->posthandler = uprobe_unset_pc;
  100. return INSN_GOOD;
  101. }
  102. enum probes_insn
  103. decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi,
  104. const struct decode_header *d, bool alu)
  105. {
  106. struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
  107. asi);
  108. enum probes_insn ret = decode_pc_ro(insn, asi, d);
  109. if (((insn >> 12) & 0xf) == 15)
  110. auprobe->posthandler = alu ? uprobe_aluwrite_pc
  111. : uprobe_write_pc;
  112. return ret;
  113. }
  114. enum probes_insn
  115. decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn,
  116. struct arch_probes_insn *asi,
  117. const struct decode_header *d)
  118. {
  119. return decode_wb_pc(insn, asi, d, true);
  120. }
  121. enum probes_insn
  122. decode_ldr(probes_opcode_t insn, struct arch_probes_insn *asi,
  123. const struct decode_header *d)
  124. {
  125. return decode_wb_pc(insn, asi, d, false);
  126. }
  127. enum probes_insn
  128. uprobe_decode_ldmstm(probes_opcode_t insn,
  129. struct arch_probes_insn *asi,
  130. const struct decode_header *d)
  131. {
  132. struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
  133. asi);
  134. unsigned reglist = insn & 0xffff;
  135. int rn = (insn >> 16) & 0xf;
  136. int lbit = insn & (1 << 20);
  137. unsigned used = reglist | (1 << rn);
  138. if (rn == 15)
  139. return INSN_REJECTED;
  140. if (!(used & (1 << 15)))
  141. return INSN_GOOD;
  142. if (used & (1 << 14))
  143. return INSN_REJECTED;
  144. /* Use LR instead of PC */
  145. insn ^= 0xc000;
  146. auprobe->pcreg = 14;
  147. auprobe->ixol[0] = __opcode_to_mem_arm(insn);
  148. auprobe->prehandler = uprobe_set_pc;
  149. if (lbit)
  150. auprobe->posthandler = uprobe_write_pc;
  151. else
  152. auprobe->posthandler = uprobe_unset_pc;
  153. return INSN_GOOD;
  154. }
  155. const union decode_action uprobes_probes_actions[] = {
  156. [PROBES_PRELOAD_IMM] = {.handler = probes_simulate_nop},
  157. [PROBES_PRELOAD_REG] = {.handler = probes_simulate_nop},
  158. [PROBES_BRANCH_IMM] = {.handler = simulate_blx1},
  159. [PROBES_MRS] = {.handler = simulate_mrs},
  160. [PROBES_BRANCH_REG] = {.handler = simulate_blx2bx},
  161. [PROBES_CLZ] = {.handler = probes_simulate_nop},
  162. [PROBES_SATURATING_ARITHMETIC] = {.handler = probes_simulate_nop},
  163. [PROBES_MUL1] = {.handler = probes_simulate_nop},
  164. [PROBES_MUL2] = {.handler = probes_simulate_nop},
  165. [PROBES_SWP] = {.handler = probes_simulate_nop},
  166. [PROBES_LDRSTRD] = {.decoder = decode_pc_ro},
  167. [PROBES_LOAD_EXTRA] = {.decoder = decode_pc_ro},
  168. [PROBES_LOAD] = {.decoder = decode_ldr},
  169. [PROBES_STORE_EXTRA] = {.decoder = decode_pc_ro},
  170. [PROBES_STORE] = {.decoder = decode_pc_ro},
  171. [PROBES_MOV_IP_SP] = {.handler = simulate_mov_ipsp},
  172. [PROBES_DATA_PROCESSING_REG] = {
  173. .decoder = decode_rd12rn16rm0rs8_rwflags},
  174. [PROBES_DATA_PROCESSING_IMM] = {
  175. .decoder = decode_rd12rn16rm0rs8_rwflags},
  176. [PROBES_MOV_HALFWORD] = {.handler = probes_simulate_nop},
  177. [PROBES_SEV] = {.handler = probes_simulate_nop},
  178. [PROBES_WFE] = {.handler = probes_simulate_nop},
  179. [PROBES_SATURATE] = {.handler = probes_simulate_nop},
  180. [PROBES_REV] = {.handler = probes_simulate_nop},
  181. [PROBES_MMI] = {.handler = probes_simulate_nop},
  182. [PROBES_PACK] = {.handler = probes_simulate_nop},
  183. [PROBES_EXTEND] = {.handler = probes_simulate_nop},
  184. [PROBES_EXTEND_ADD] = {.handler = probes_simulate_nop},
  185. [PROBES_MUL_ADD_LONG] = {.handler = probes_simulate_nop},
  186. [PROBES_MUL_ADD] = {.handler = probes_simulate_nop},
  187. [PROBES_BITFIELD] = {.handler = probes_simulate_nop},
  188. [PROBES_BRANCH] = {.handler = simulate_bbl},
  189. [PROBES_LDMSTM] = {.decoder = uprobe_decode_ldmstm}
  190. };