entry.S 3.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. NetWinder Floating Point Emulator
  4. (c) Rebel.COM, 1998
  5. (c) 1998, 1999 Philip Blundell
  6. Direct questions, comments to Scott Bambrough <[email protected]>
  7. */
  8. #include <asm/assembler.h>
  9. #include <asm/opcodes.h>
  10. /* This is the kernel's entry point into the floating point emulator.
  11. It is called from the kernel with code similar to this:
  12. sub r4, r5, #4
  13. ldrt r0, [r4] @ r0 = instruction
  14. adrsvc al, r9, ret_from_exception @ r9 = normal FP return
  15. adrsvc al, lr, fpundefinstr @ lr = undefined instr return
  16. get_current_task r10
  17. mov r8, #1
  18. strb r8, [r10, #TSK_USED_MATH] @ set current->used_math
  19. add r10, r10, #TSS_FPESAVE @ r10 = workspace
  20. ldr r4, .LC2
  21. ldr pc, [r4] @ Call FP emulator entry point
  22. The kernel expects the emulator to return via one of two possible
  23. points of return it passes to the emulator. The emulator, if
  24. successful in its emulation, jumps to ret_from_exception (passed in
  25. r9) and the kernel takes care of returning control from the trap to
  26. the user code. If the emulator is unable to emulate the instruction,
  27. it returns via _fpundefinstr (passed via lr) and the kernel halts the
  28. user program with a core dump.
  29. On entry to the emulator r10 points to an area of private FP workspace
  30. reserved in the thread structure for this process. This is where the
  31. emulator saves its registers across calls. The first word of this area
  32. is used as a flag to detect the first time a process uses floating point,
  33. so that the emulator startup cost can be avoided for tasks that don't
  34. want it.
  35. This routine does three things:
  36. 1) The kernel has created a struct pt_regs on the stack and saved the
  37. user registers into it. See /usr/include/asm/proc/ptrace.h for details.
  38. 2) It calls EmulateAll to emulate a floating point instruction.
  39. EmulateAll returns 1 if the emulation was successful, or 0 if not.
  40. 3) If an instruction has been emulated successfully, it looks ahead at
  41. the next instruction. If it is a floating point instruction, it
  42. executes the instruction, without returning to user space. In this
  43. way it repeatedly looks ahead and executes floating point instructions
  44. until it encounters a non floating point instruction, at which time it
  45. returns via _fpreturn.
  46. This is done to reduce the effect of the trap overhead on each
  47. floating point instructions. GCC attempts to group floating point
  48. instructions to allow the emulator to spread the cost of the trap over
  49. several floating point instructions. */
  50. #include <asm/asm-offsets.h>
  51. .globl nwfpe_enter
  52. nwfpe_enter:
  53. mov r4, lr @ save the failure-return addresses
  54. mov sl, sp @ we access the registers via 'sl'
  55. ldr r5, [sp, #S_PC] @ get contents of PC;
  56. mov r6, r0 @ save the opcode
  57. emulate:
  58. ldr r1, [sp, #S_PSR] @ fetch the PSR
  59. bl arm_check_condition @ check the condition
  60. cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed?
  61. @ if condition code failed to match, next insn
  62. bne next @ get the next instruction;
  63. mov r0, r6 @ prepare for EmulateAll()
  64. bl EmulateAll @ emulate the instruction
  65. cmp r0, #0 @ was emulation successful
  66. reteq r4 @ no, return failure
  67. next:
  68. uaccess_enable r3
  69. .Lx1: ldrt r6, [r5], #4 @ get the next instruction and
  70. @ increment PC
  71. uaccess_disable r3
  72. and r2, r6, #0x0F000000 @ test for FP insns
  73. teq r2, #0x0C000000
  74. teqne r2, #0x0D000000
  75. teqne r2, #0x0E000000
  76. retne r9 @ return ok if not a fp insn
  77. str r5, [sp, #S_PC] @ update PC copy in regs
  78. mov r0, r6 @ save a copy
  79. b emulate @ check condition and emulate
  80. @ We need to be prepared for the instructions at .Lx1 and .Lx2
  81. @ to fault. Emit the appropriate exception gunk to fix things up.
  82. @ ??? For some reason, faults can happen at .Lx2 even with a
  83. @ plain LDR instruction. Weird, but it seems harmless.
  84. .pushsection .text.fixup,"ax"
  85. .align 2
  86. .Lfix: ret r9 @ let the user eat segfaults
  87. .popsection
  88. .pushsection __ex_table,"a"
  89. .align 3
  90. .long .Lx1, .Lfix
  91. .popsection