pv-fixup-asm.S 1.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2015 Russell King
  4. *
  5. * This assembly is required to safely remap the physical address space
  6. * for Keystone 2
  7. */
  8. #include <linux/linkage.h>
  9. #include <linux/pgtable.h>
  10. #include <asm/asm-offsets.h>
  11. #include <asm/cp15.h>
  12. #include <asm/memory.h>
  13. .section ".idmap.text", "ax"
  14. #define L1_ORDER 3
  15. #define L2_ORDER 3
  16. ENTRY(lpae_pgtables_remap_asm)
  17. stmfd sp!, {r4-r8, lr}
  18. mrc p15, 0, r8, c1, c0, 0 @ read control reg
  19. bic ip, r8, #CR_M @ disable caches and MMU
  20. mcr p15, 0, ip, c1, c0, 0
  21. dsb
  22. isb
  23. /* Update level 2 entries covering the kernel */
  24. ldr r6, =(_end - 1)
  25. add r7, r2, #0x1000
  26. add r6, r7, r6, lsr #SECTION_SHIFT - L2_ORDER
  27. add r7, r7, #KERNEL_OFFSET >> (SECTION_SHIFT - L2_ORDER)
  28. 1: ldrd r4, r5, [r7]
  29. adds r4, r4, r0
  30. adc r5, r5, r1
  31. strd r4, r5, [r7], #1 << L2_ORDER
  32. cmp r7, r6
  33. bls 1b
  34. /* Update level 2 entries for the boot data */
  35. add r7, r2, #0x1000
  36. movw r3, #FDT_FIXED_BASE >> (SECTION_SHIFT - L2_ORDER)
  37. add r7, r7, r3
  38. ldrd r4, r5, [r7]
  39. adds r4, r4, r0
  40. adc r5, r5, r1
  41. strd r4, r5, [r7], #1 << L2_ORDER
  42. ldrd r4, r5, [r7]
  43. adds r4, r4, r0
  44. adc r5, r5, r1
  45. strd r4, r5, [r7]
  46. /* Update level 1 entries */
  47. mov r6, #4
  48. mov r7, r2
  49. 2: ldrd r4, r5, [r7]
  50. adds r4, r4, r0
  51. adc r5, r5, r1
  52. strd r4, r5, [r7], #1 << L1_ORDER
  53. subs r6, r6, #1
  54. bne 2b
  55. mrrc p15, 0, r4, r5, c2 @ read TTBR0
  56. adds r4, r4, r0 @ update physical address
  57. adc r5, r5, r1
  58. mcrr p15, 0, r4, r5, c2 @ write back TTBR0
  59. mrrc p15, 1, r4, r5, c2 @ read TTBR1
  60. adds r4, r4, r0 @ update physical address
  61. adc r5, r5, r1
  62. mcrr p15, 1, r4, r5, c2 @ write back TTBR1
  63. dsb
  64. mov ip, #0
  65. mcr p15, 0, ip, c7, c5, 0 @ I+BTB cache invalidate
  66. mcr p15, 0, ip, c8, c7, 0 @ local_flush_tlb_all()
  67. dsb
  68. isb
  69. mcr p15, 0, r8, c1, c0, 0 @ re-enable MMU
  70. dsb
  71. isb
  72. ldmfd sp!, {r4-r8, pc}
  73. ENDPROC(lpae_pgtables_remap_asm)