dma-mapping-nommu.c 1.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Based on linux/arch/arm/mm/dma-mapping.c
  4. *
  5. * Copyright (C) 2000-2004 Russell King
  6. */
  7. #include <linux/dma-map-ops.h>
  8. #include <asm/cachetype.h>
  9. #include <asm/cacheflush.h>
  10. #include <asm/outercache.h>
  11. #include <asm/cp15.h>
  12. #include "dma.h"
  13. void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
  14. enum dma_data_direction dir)
  15. {
  16. dmac_map_area(__va(paddr), size, dir);
  17. if (dir == DMA_FROM_DEVICE)
  18. outer_inv_range(paddr, paddr + size);
  19. else
  20. outer_clean_range(paddr, paddr + size);
  21. }
  22. void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
  23. enum dma_data_direction dir)
  24. {
  25. if (dir != DMA_TO_DEVICE) {
  26. outer_inv_range(paddr, paddr + size);
  27. dmac_unmap_area(__va(paddr), size, dir);
  28. }
  29. }
  30. void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
  31. const struct iommu_ops *iommu, bool coherent)
  32. {
  33. if (IS_ENABLED(CONFIG_CPU_V7M)) {
  34. /*
  35. * Cache support for v7m is optional, so can be treated as
  36. * coherent if no cache has been detected. Note that it is not
  37. * enough to check if MPU is in use or not since in absense of
  38. * MPU system memory map is used.
  39. */
  40. dev->dma_coherent = cacheid ? coherent : true;
  41. } else {
  42. /*
  43. * Assume coherent DMA in case MMU/MPU has not been set up.
  44. */
  45. dev->dma_coherent = (get_cr() & CR_M) ? coherent : true;
  46. }
  47. }